| Commit message (Collapse) | Author | Age | Files | Lines |
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This exposes a -segmented-stacks bug.
llvm-svn: 140429
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This is still a hack until we can teach tblgen to generate the
optional CPSR operand rather than an implicit CPSR def. But the
strangeness is now limited to the selection DAG. ADD/SUB MI's no
longer have implicit CPSR defs, nor do we allow flag setting variants
of these opcodes in machine code. There are several corner cases to
consider, and getting one wrong would previously lead to nasty
miscompilation. It's not the first time I've debugged one, so this
time I added enough verification to ensure it won't happen again.
llvm-svn: 140228
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There is only one legitimate use remaining, in addIntervalsForSpills().
All other calls to hasPHIKill() are only used to update PHIKill flags.
The addIntervalsForSpills() function is part of the old spilling
framework, only used by linearscan.
llvm-svn: 139783
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The ARM target depends on CPSR liveness being tracked after register
allocation.
llvm-svn: 136548
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This includes registers like EFLAGS and ST0-ST7. We don't check for
liveness issues in the verifier and scavenger because registers will
never be allocated from these classes.
While in SSA form, we do care about the liveness of unallocatable
unreserved registers. Liveness of EFLAGS and ST0 neds to be correct for
MachineDCE and MachineSinking.
llvm-svn: 136541
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llvm-svn: 136535
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sink them into MC layer.
- Added MCInstrInfo, which captures the tablegen generated static data. Chang
TargetInstrInfo so it's based off MCInstrInfo.
llvm-svn: 134021
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llvm-svn: 133944
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No functional change.
llvm-svn: 132455
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on CodeGen/X86/2007-05-07-InvokeSRet.ll. There is probably a bug here that was
fixed by r128961, but since there is no test or reference to a source file I have
to revert it.
llvm-svn: 131618
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landing pad as its successor.
SjLj exception handling jumps to the correct landing pad via a switch statement
that's generated right before code-gen. Loosen the constraint in the machine
instruction verifier to allow for this. Note, this isn't the most rigorous check
since we cannot determine where that switch statement came from. But it's
marginally better than turning this check off when SjLj exceptions are used.
<rdar://problem/9187612>
llvm-svn: 130881
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Treat the landing pad as a normal successor when that happens.
llvm-svn: 128961
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llvm-svn: 128643
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This way, shrinkToUses() will ignore the instruction that is about to be
deleted, and we avoid leaving invalid live ranges that SplitKit doesn't like.
Fix a misunderstanding in MachineVerifier about <def,undef> operands. The
<undef> flag is valid on def operands where it has the same meaning as <undef>
on a use operand. It only applies to sub-register defines which also read the
full register.
llvm-svn: 128642
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Allow a live range to end with a kill flag, but don't allow a kill flag that
doesn't end the live range.
This makes the machine code verifier more useful during register allocation when
kill flag computation is deferred.
llvm-svn: 124838
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The slot indexes must be monotonically increasing through the function.
llvm-svn: 123324
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llvm-svn: 123322
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without a TRI instance.
Print virtual registers numbered from 0 instead of the arbitrary
FirstVirtualRegister. The first virtual register is printed as %vreg0.
TRI::NoRegister is printed as %noreg.
llvm-svn: 123107
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virtual registers.
llvm-svn: 123100
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in the most obvious way.
llvm-svn: 122610
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valno verification. The "Different value live out of predecessor" check is
incorrect in the case of phi-def valnos, so just skip that check for phi-def
valnos and instead check that all of the valnos for predecessors have phi-kill.
Fixes PR8863.
llvm-svn: 122581
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out-edges. Fixes PR8824.
llvm-svn: 122228
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begin at DEF slots. Fixes the second half of PR8813.
llvm-svn: 122225
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llvm-svn: 122224
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the register; it may be a dead def instead. Fixes PR8820.
llvm-svn: 122218
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PR8822.
llvm-svn: 122207
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half of PR8813.
llvm-svn: 122205
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llvm-svn: 122199
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createMachineVerifierPass and MachineFunction::verify.
The banner is printed before the machine code dump, just like the printer pass.
llvm-svn: 122113
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the operand uses the same register as a tied operand:
%r1 = add %r1, %r1
If add were a three-address instruction, kill flags would be required on at
least one of the uses. Since it is a two-address instruction, the tied use
operand must not have a kill flag.
This change makes the kill flag on the untied use operand optional.
llvm-svn: 122082
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operands in a variadic instruction.
llvm-svn: 119446
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(and likely) wrong about anyhow.
llvm-svn: 119320
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It is legal for an instruction to have two operands using the same register,
only one a kill. This is interpreted as a kill.
llvm-svn: 117981
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At least X86FloatingPoint requires correct kill flags after register allocation,
and targets using register scavenging benefit. Conservative kill flags are not
enough.
llvm-svn: 117960
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When an instruction refers to a spill slot with a LiveStacks entry, check that
the spill slot is live at the instruction.
llvm-svn: 117944
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llvm-svn: 117762
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multiplicity.
llvm-svn: 117630
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llvm-svn: 117602
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Only virtuals should be requires to be connected.
llvm-svn: 117422
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components, each should get its own virtual register.
llvm-svn: 117407
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SlotIndexes when available.
llvm-svn: 117392
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llvm-svn: 117391
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Magic is happening that we don't understand.
llvm-svn: 117370
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of all predecessors.
llvm-svn: 117191
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llvm-svn: 117170
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unconditional branch.
llvm-svn: 117041
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exposes an initializeMyPassFunction(), which
must be called in the pass's constructor. This function uses static dependency declarations to recursively initialize
the pass's dependencies.
Clients that only create passes through the createFooPass() APIs will require no changes. Clients that want to use the
CommandLine options for passes will need to manually call the appropriate initialization functions in PassInitialization.h
before parsing commandline arguments.
I have tested this with all standard configurations of clang and llvm-gcc on Darwin. It is possible that there are problems
with the static dependencies that will only be visible with non-standard options. If you encounter any crash in pass
registration/creation, please send the testcase to me directly.
llvm-svn: 116820
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llvm-svn: 115996
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llvm-svn: 115874
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llvm-svn: 115408
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