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path: root/llvm/lib/CodeGen/MachineSink.cpp
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* [DebugInfo] Make postra sinking of DBG_VALUEs subregister-safeJeremy Morse2019-08-191-9/+28
* Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVMDaniel Sanders2019-08-151-9/+9
* Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Re...Daniel Sanders2019-08-011-9/+8
* Use llvm::stable_sortFangrui Song2019-04-231-3/+2
* [CodeGen] Add "const" to MachineInstr::mayAliasBjorn Pettersson2019-04-191-1/+1
* Add skipFunction to PostRA machine sinking pass.Xin Tong2019-02-211-0/+3
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* [CodeGen][NFC] Make `TII::getMemOpBaseImmOfs` return a base operandFrancis Visoiu Mistrih2018-11-281-3/+6
* [MachineSink][DebugInfo] Correctly sink DBG_VALUEsJeremy Morse2018-11-021-10/+47
* [PostRASink] Make sure to remove subregisters from live-ins as wellKrzysztof Parzyszek2018-09-181-2/+5
* [DWARF] Missing location debug information with -O2.Carlos Alberto Enciso2018-08-301-20/+1
* Remove trailing spaceFangrui Song2018-07-301-1/+1
* [DebugInfo] Ignore DBG_VALUE instructions in PostRA Machine SinkMatt Davis2018-06-211-25/+36
* Rename DEBUG macro to LLVM_DEBUG.Nicola Zaghen2018-05-141-17/+17
* [DebugInfo] Examine all uses of isDebugValue() for debug instructions.Shiva Chen2018-05-091-1/+1
* Remove \brief commands from doxygen comments.Adrian Prantl2018-05-011-2/+2
* [PostRASink] extend the live-in check for all aliased registersJun Bum Lim2018-04-271-11/+11
* [CodeGen] Use RegUnits to track register aliases (NFC)Jun Bum Lim2018-04-271-29/+28
* [PostRASink]Add register dependency check for implicit operandsJun Bum Lim2018-04-131-23/+103
* [CodeGen]Add NoVRegs property on PostRASink and ShrinkWrapJun Bum Lim2018-04-031-0/+5
* [PostRAMachineSink] preserve CFGJun Bum Lim2018-03-281-0/+5
* [CodeGen] Add a new pass for PostRA sinkJun Bum Lim2018-03-221-0/+188
* MachineFunction: Return reference from getFunction(); NFCMatthias Braun2017-12-151-1/+1
* Fix out-of-order stepping behavior in programs with sunk instructions.Paul Robinson2017-12-091-1/+11
* [CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.Francis Visoiu Mistrih2017-12-071-3/+3
* [CodeGen] Unify MBB reference format in both MIR and debug outputFrancis Visoiu Mistrih2017-12-041-23/+23
* [CodeGen] Print register names in lowercase in both MIR and debug outputFrancis Visoiu Mistrih2017-11-281-2/+2
* Revert "Fix out-of-order stepping behavior in programs with sunk instructions."Paul Robinson2017-11-201-11/+0
* Fix out-of-order stepping behavior in programs with sunk instructions.Paul Robinson2017-11-201-0/+11
* Fix a bunch more layering of CodeGen headers that are in TargetDavid Blaikie2017-11-171-2/+2
* Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layeringDavid Blaikie2017-11-081-1/+1
* [CodeGen] Fix some Clang-tidy modernize-use-using and Include What You Use wa...Eugene Zelenko2017-08-291-8/+13
* Sort the remaining #include lines in include/... and lib/....Chandler Carruth2017-06-061-1/+1
* CodeGen: Rename DEBUG_TYPE to match passnamesMatthias Braun2017-05-251-4/+4
* MachineRegisterInfo: Remove unused arg from isConstantPhysReg(); NFCMatthias Braun2016-10-281-1/+1
* Using branch probability to guide critical edge splitting.Dehao Chen2016-10-201-0/+18
* Revert r284545 again as the regression in ppc still exists. There is bug in M...Dehao Chen2016-10-191-18/+0
* Using branch probability to guide critical edge splitting.Dehao Chen2016-10-181-0/+18
* revert r284541.Dehao Chen2016-10-181-17/+0
* Using branch probability to guide critical edge splitting.Dehao Chen2016-10-181-0/+17
* Fix some Clang-tidy modernize-use-using and Include What You Use warnings; ot...Eugene Zelenko2016-08-251-4/+18
* Rename AnalyzeBranch* to analyzeBranch*.Jacques Pienaar2016-07-151-1/+1
* CodeGen: Use MachineInstr& in MachineSink, NFCDuncan P. N. Exon Smith2016-07-011-52/+49
* CodeGen: Use MachineInstr& in TargetInstrInfo, NFCDuncan P. N. Exon Smith2016-06-301-2/+2
* Re-commit optimization bisect support (r267022) without new pass manager supp...Andrew Kaylor2016-04-221-1/+1
* Revert "Initial implementation of optimization bisect support."Vedant Kumar2016-04-221-1/+1
* [MachineBasicBlock] Make the pass argument truly mandatory whenQuentin Colombet2016-04-211-1/+1
* Initial implementation of optimization bisect support.Andrew Kaylor2016-04-211-1/+1
* MachineSink: make shouldSink a TII target hookFiona Glaser2016-03-291-7/+2
* [TII] Allow getMemOpBaseRegImmOfs() to accept negative offsets. NFC.Chad Rosier2016-03-091-1/+2
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