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path: root/llvm/lib/CodeGen/MachineScheduler.cpp
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* [Dominators][CodeGen] Fix MachineDominatorTree preservation in PHIEliminationJakub Kuderski2019-10-011-2/+3
* [AMDGPU] Add VerifyScheduling support.Jay Foad2019-10-011-3/+4
* [ScheduleDAGMILive] Fix typo in comment.Mingjie Xing2019-09-141-1/+1
* Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVMDaniel Sanders2019-08-151-3/+3
* [llvm] Migrate llvm::make_unique to std::make_uniqueJonas Devlieghere2019-08-151-8/+8
* Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Re...Daniel Sanders2019-08-011-12/+11
* [MachineScheduler] checkResourceLimit boundary condition updateJinsong Ji2019-06-071-5/+11
* MISched: Fix -misched-regpressure=0 if subreg liveness enabledMatt Arsenault2019-05-301-1/+3
* Adjust MachineScheduler to use ProcResource countsMomchil Velikov2019-05-101-17/+55
* [CodeGen] Add "const" to MachineInstr::mayAliasBjorn Pettersson2019-04-191-3/+3
* [PATCH] [MachineScheduler] Check pending instructions when an instruction is ...James Molloy2019-04-191-0/+2
* [ScheduleDAG] Move `Topo` and `addEdge` to base class.Clement Courbet2019-03-291-26/+3
* MISched: Don't schedule regions with 0 instructionsMatt Arsenault2019-03-251-2/+6
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* [NFC] fix trivial typos in commentsHiroshi Inoue2019-01-091-2/+2
* [MachineScheduler] Order FI-based memops based on stack directionFrancis Visoiu Mistrih2018-11-291-4/+18
* [MachineScheduler] Add support for clustering mem ops with FI base operandsFrancis Visoiu Mistrih2018-11-281-2/+14
* [CodeGen][NFC] Make `TII::getMemOpBaseImmOfs` return a base operandFrancis Visoiu Mistrih2018-11-281-11/+11
* Bias physical register immediate assignmentsNirav Dave2018-11-141-25/+42
* Type safe version of MachinePassRegistrySerge Guelton2018-11-091-1/+2
* llvm::sort(C.begin(), C.end(), ...) -> llvm::sort(C, ...)Fangrui Song2018-09-271-1/+1
* MachineScheduler: Add -misched-print-dags flagMatthias Braun2018-09-191-1/+6
* ScheduleDAG: Cleanup dumping code; NFCMatthias Braun2018-09-191-24/+29
* MachineScheduler: Refactor setPolicy() to limit computing remaining latencyTom Stellard2018-08-211-28/+60
* [NFC] fix trivial typos in commentsHiroshi Inoue2018-06-201-5/+5
* Rename DEBUG macro to LLVM_DEBUG.Nicola Zaghen2018-05-141-187/+175
* [DebugInfo] Examine all uses of isDebugValue() for debug instructions.Shiva Chen2018-05-091-4/+4
* Remove \brief commands from doxygen comments.Adrian Prantl2018-05-011-8/+8
* IWYU for llvm-config.h in llvm, additions.Nico Weber2018-04-301-0/+1
* [MachineScheduler] NFC refactoringJonas Paulsson2018-04-121-21/+25
* [CodeGen] Change std::sort to llvm::sort in response to r327219Mandeep Singh Grang2018-04-061-1/+1
* Fix layering of MachineValueType.h by moving it from CodeGen to SupportDavid Blaikie2018-03-231-1/+1
* [MachineScheduler] Dump SUnits before calling SchedImpl->initialize()Jonas Paulsson2018-03-051-4/+4
* Revert "[CodeGen] Move printing '\n' from MachineInstr::print to MachineBasic...Francis Visoiu Mistrih2018-02-191-11/+6
* [CodeGen] Move printing '\n' from MachineInstr::print to MachineBasicBlock::p...Francis Visoiu Mistrih2018-02-081-6/+11
* CodeGen: Fix assertion in ScheduleDAGMILive::scheduleMI due to llvm.dbg.valueYaxun Liu2018-01-231-0/+1
* MachineFunction: Return reference from getFunction(); NFCMatthias Braun2017-12-151-2/+2
* Recommit CodeGen: Fix assertion in machine inst sheduler due to llvm.dbg.valueYaxun Liu2017-12-151-2/+6
* Revert CodeGen: Fix assertion in machine inst sheduler due to llvm.dbg.valueYaxun Liu2017-12-141-6/+2
* CodeGen: Fix assertion in machine inst sheduler due to llvm.dbg.valueYaxun Liu2017-12-131-2/+6
* Rename LiveIntervalAnalysis.h to LiveIntervals.hMatthias Braun2017-12-131-1/+1
* [CodeGen] Unify MBB reference format in both MIR and debug outputFrancis Visoiu Mistrih2017-12-041-15/+14
* [CodeGen] Rename functions PrintReg* to printReg*Francis Visoiu Mistrih2017-11-281-2/+2
* Fix a bunch more layering of CodeGen headers that are in TargetDavid Blaikie2017-11-171-3/+3
* Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layeringDavid Blaikie2017-11-081-1/+1
* [MachineScheduler] Minor refactoring.Jonas Paulsson2017-10-251-13/+18
* Reverting r315590; it did not include changes for llvm-tblgen, which is causi...Aaron Ballman2017-10-151-4/+4
* [dump] Remove NDEBUG from test to enable dump methods [NFC]Don Hinton2017-10-121-4/+4
* CodeGen: Minor cleanups to use MachineInstr::getMF. NFCJustin Bogner2017-10-101-1/+1
* [MiSched] - Simplify ProcResEntry accessJaved Absar2017-10-031-6/+8
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