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* Register pressure and instruction latency aware machine LICM. Work in progress.Evan Cheng2010-10-141-26/+242
| | | | llvm-svn: 116465
* Begin adding static dependence information to passes, which will allow us toOwen Anderson2010-10-121-1/+6
| | | | | | | | | perform initialization without static constructors AND without explicit initialization by the client. For the moment, passes are required to initialize both their (potential) dependencies and any passes they preserve. I hope to be able to relax the latter requirement in the future. llvm-svn: 116334
* Don't waste time unfolding simple loads. The unfolded copy won't be hoisted.Evan Cheng2010-10-081-0/+4
| | | | llvm-svn: 116081
* Now with fewer extraneous semicolons!Owen Anderson2010-10-071-1/+1
| | | | llvm-svn: 115996
* Reapply r110396, with fixes to appease the Linux buildbot gods.Owen Anderson2010-08-061-2/+2
| | | | llvm-svn: 110460
* Revert r110396 to fix buildbots.Owen Anderson2010-08-061-2/+2
| | | | llvm-svn: 110410
* Don't use PassInfo* as a type identifier for passes. Instead, use the ↵Owen Anderson2010-08-051-2/+2
| | | | | | | | address of the static ID member as the sole unique type identifier. Clean up APIs related to this change. llvm-svn: 110396
* Comment typo.Dale Johannesen2010-07-291-1/+1
| | | | llvm-svn: 109765
* Fix batch of converting RegisterPass<> to INTIALIZE_PASS().Owen Anderson2010-07-211-2/+2
| | | | llvm-svn: 109045
* Fix test for switch statements and increaseDale Johannesen2010-07-201-2/+3
| | | | | | threshold a bit per experimentation. llvm-svn: 108935
* Don't hoist things out of a large switch inside aDale Johannesen2010-07-201-2/+6
| | | | | | | | | | loop, for the reasons in the comments. This is a major win on 253.perlbmk on ARM Darwin. I expect it to be a good heuristic in general, but it's possible some things will regress; I'll be watching. 7940152. llvm-svn: 108792
* Teach ProcessImplicitDefs to transform more COPY instructions into ↵Evan Cheng2010-07-141-6/+3
| | | | | | IMPLICIT_DEF (and subsequently eliminate them). This allows machine LICM to hoist IMPLICIT_DEF's. PR7620. llvm-svn: 108304
* change machinelicm to use MachineInstr::isSafeToMove. NoChris Lattner2010-07-121-18/+8
| | | | | | | | intended functionality change. The avoidance of hoistiing implicitdef seems wrong though. llvm-svn: 108109
* Fix MachineLICM to actually visit inner loops.Dan Gohman2010-07-091-3/+11
| | | | llvm-svn: 108001
* Move PHIElimination's SplitCriticalEdge for MachineBasicBlocks outDan Gohman2010-06-221-23/+50
| | | | | | | into a utility routine, teach it how to update MachineLoopInfo, and make use of it in MachineLICM to split critical edges on demand. llvm-svn: 106555
* Doh. Machine LICM is re-initializing the CSE map over and over. Patch by ↵Evan Cheng2010-05-291-2/+7
| | | | | | Anna Zaks. rdar://8037934. llvm-svn: 105065
* Teach MachineLICM and MachineSink how to clear kill flags conservativelyDan Gohman2010-05-131-1/+12
| | | | | | when they move instructions. llvm-svn: 103737
* When MachineLICM is hoisting a physical register after regalloc, make sure theJakob Stoklund Olesen2010-04-201-4/+17
| | | | | | | | | | | register is not killed in the loop. This fixes 188.ammp on ARM where the post-ra scheduler would grab a register that looked available but wasn't. A testcase would be huge and fragile, sorry. llvm-svn: 101930
* Postra machine licm must add registers defined by loop invariants to *all* ofEvan Cheng2010-04-171-48/+23
| | | | | | | | the live-in sets of BBs in the loop. Otherwise later pass may end up using the registers and override the invariant. rdar://7852937 No reasonablly sized test case possible. llvm-svn: 101626
* Fast path implicit_def check.Evan Cheng2010-04-131-5/+5
| | | | llvm-svn: 101183
* Avoid variable shadowing.Evan Cheng2010-04-131-2/+2
| | | | llvm-svn: 101170
* Expand postra machine licm's capability a little more. If an instruction's ↵Evan Cheng2010-04-131-8/+24
| | | | | | register operands are all loop invariants, then it's safe to hoist it. llvm-svn: 101167
* Teach postra machine licm to hoist more obvious invariants, e.g. ↵Evan Cheng2010-04-131-17/+38
| | | | | | instructions with no source operands. llvm-svn: 101154
* Eliminate MachineBasicBlock::const_livein_iterator and makeDan Gohman2010-04-131-1/+1
| | | | | | | | MachineBasicBlock::livein_iterator a const_iterator, because clients shouldn't ever be using the iterator interface to mutate the livein set. llvm-svn: 101147
* Plug trivial leak.Benjamin Kramer2010-04-121-0/+2
| | | | llvm-svn: 101034
* Delete this obsolete comment.Dan Gohman2010-04-091-4/+0
| | | | llvm-svn: 100858
* Make post regalloc machine licm functional. It now passes all of MultiSource.Evan Cheng2010-04-081-79/+169
| | | | llvm-svn: 100742
* Add comments for missed opportunities.Evan Cheng2010-04-071-1/+4
| | | | llvm-svn: 100610
* Fix typo.Evan Cheng2010-04-071-1/+1
| | | | llvm-svn: 100609
* Post regalloc LICM. Work in progress.Evan Cheng2010-04-071-11/+162
| | | | llvm-svn: 100592
* - Change MachineInstr::isIdenticalTo to take a new option that determines ↵Evan Cheng2010-03-031-1/+1
| | | | | | | | whether it should skip checking defs or at least virtual register defs. This subsumes part of the TargetInstrInfo::isIdentical functionality. - Eliminate TargetInstrInfo::isIdentical and replace it with produceSameValue. In the default case, produceSameValue just checks whether two machine instructions are identical (except for virtual register defs). But targets may override it to check for unusual cases (e.g. ARM pic loads from constant pools). llvm-svn: 97628
* Don't try to replace physical registers when doing CSE.Dan Gohman2010-02-281-1/+12
| | | | llvm-svn: 97360
* Don't unconditionally suppress hoisting of instructions with implicitDan Gohman2010-02-281-26/+4
| | | | | | | | defs or uses. The regular def and use checking below covers them, and can be more precise. It's safe to hoist an instruction with a dead implicit def if the register isn't live into the loop header. llvm-svn: 97352
* move target-independent opcodes out of TargetInstrInfoChris Lattner2010-02-091-2/+2
| | | | | | | | | into TargetOpcodes.h. #include the new TargetOpcodes.h into MachineInstr. Add new inline accessors (like isPHI()) to MachineInstr, and start using them throughout the codebase. llvm-svn: 95687
* Change errs() to dbgs().David Greene2010-01-051-12/+12
| | | | llvm-svn: 92547
* Add Loop contains utility methods for testing whether a loopDan Gohman2009-12-181-1/+1
| | | | | | | | contains another loop, or an instruction. The loop form is substantially more efficient on large loops than the typical code it replaces. llvm-svn: 91654
* Enable hoisting load from constant memories.Evan Cheng2009-11-201-21/+6
| | | | llvm-svn: 89510
* Add option -licm-const-load to hoist all loads from constant memory.Evan Cheng2009-11-201-19/+56
| | | | llvm-svn: 89477
* Add MachineBasicBlock::getName, and use it in place of getBasicBlock()->getName.Jakob Stoklund Olesen2009-11-201-2/+2
| | | | | | Fix debug code that assumes getBasicBlock never returns NULL. llvm-svn: 89428
* Fix comment.Evan Cheng2009-11-171-3/+3
| | | | llvm-svn: 89129
* - Add TargetInstrInfo::isIdentical(). It's similar to MachineInstr::isIdenticalEvan Cheng2009-11-071-35/+24
| | | | | | | | | | except it doesn't care if the definitions' virtual registers differ. This is used by machine LICM and other MI passes to perform CSE. - Teach Thumb2InstrInfo::isIdentical() to check two t2LDRpci_pic are identical. Since pc relative constantpool entries are always different, this requires it it check if the values can actually the same. llvm-svn: 86328
* Code refactoring.Evan Cheng2009-11-051-49/+58
| | | | llvm-svn: 86085
* Re-apply 85799. It turns out my code isn't buggy.Evan Cheng2009-11-031-17/+46
| | | | llvm-svn: 85947
* Revert 85799 for now. It might be breaking llvm-gcc driver.Evan Cheng2009-11-021-46/+17
| | | | llvm-svn: 85827
* Initilize the machine LICM CSE map upon the first time an instruction is ↵Evan Cheng2009-11-021-17/+46
| | | | | | | | | | hoisted to the loop preheader. Add instructions which are already in the preheader block that may be common expressions of those that are hoisted out. These does get a few more instructions CSE'ed. llvm-svn: 85799
* Fix MachineLICM to use the correct virtual register class whenDan Gohman2009-10-301-2/+4
| | | | | | | | | | unfolding loads for hoisting. getOpcodeAfterMemoryUnfold returns the opcode of the original operation without the load, not the load itself, MachineLICM needs to know the operand index in order to get the correct register class. Extend getOpcodeAfterMemoryUnfold to return this information. llvm-svn: 85622
* Refactor the code for unfolding a load into a separate function.Dan Gohman2009-10-291-50/+62
| | | | llvm-svn: 85515
* Simplify this code: if the unfolded load can't be hoisted, just deleteDan Gohman2009-10-281-16/+3
| | | | | | the new instructions and leave the old one in place. llvm-svn: 85393
* Teach MachineLICM to unfold loads from constant memory fromDan Gohman2009-10-281-17/+83
| | | | | | | otherwise unhoistable instructions in order to allow the loads to be hoisted. llvm-svn: 85364
* Remove includes of Support/Compiler.h that are no longer needed after theNick Lewycky2009-10-251-1/+0
| | | | | | VISIBILITY_HIDDEN removal. llvm-svn: 85043
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