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path: root/llvm/lib/CodeGen/MachineInstr.cpp
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* [DebugInfo] Make sure all DBG_VALUEs' reguse operands have IsDebug propertyMikael Holmen2018-06-211-12/+34
* [NFC] make MIFlag accessor functions consistant with usage modelMichael Berg2018-06-181-1/+1
* [MIR][MachineCSE] Implementing proper MachineInstr::getNumExplicitDefs()Roman Tereshin2018-06-121-6/+24
* [DebugInfo] Examine all uses of isDebugValue() for debug instructions.Shiva Chen2018-05-091-3/+4
* [DebugInfo] Convert intrinsic llvm.dbg.label to MachineInstr.Shiva Chen2018-05-091-0/+16
* [MachineVerifier][GlobalISel] Checking that generic instrs have LLTs on all v...Roman Tereshin2018-05-071-2/+6
* MachineInst support mapping SDNode fast math flags for support in Back End co...Michael Berg2018-05-031-0/+14
* IWYU for llvm-config.h in llvm, additions.Nico Weber2018-04-301-0/+1
* [CodeGen] Print user-friendly debug locations as MI commentsFrancis Visoiu Mistrih2018-04-241-1/+14
* [CodeGen] Fix printing bundles in MIR outputKrzysztof Parzyszek2018-04-101-3/+5
* [CodeGen] Use MIR syntax for MachineMemOperand printingFrancis Visoiu Mistrih2018-03-141-10/+18
* [AArch64] Keep track of MIFlags in the LoadStoreOptimizerFrancis Visoiu Mistrih2018-03-141-0/+6
* [MIR] Allow frame-setup and frame-destroy on the same instructionFrancis Visoiu Mistrih2018-03-131-1/+1
* The final step to close D41278 [MachineCombiner] Improve debug output (NFC).Andrew V. Tischenko2018-02-261-0/+2
* [MachineOperand][Target] MachineOperand::isRenamable semantics changesGeoff Berry2018-02-231-5/+1
* Revert "[CodeGen] Move printing '\n' from MachineInstr::print to MachineBasic...Francis Visoiu Mistrih2018-02-191-0/+2
* [CodeGen] Move printing '\n' from MachineInstr::print to MachineBasicBlock::p...Francis Visoiu Mistrih2018-02-081-2/+0
* [AMDGPU][X86][Mips] Make sure renamable bit not set for reserved regsGeoff Berry2018-01-291-3/+6
* [CodeGen] Unify printing format of debug-location in both MIR and -debugFrancis Visoiu Mistrih2018-01-191-7/+12
* [CodeGen][NFC] Rename IsVerbose to IsStandalone in Machine*::printFrancis Visoiu Mistrih2018-01-181-7/+7
* [CodeGen] Print RegClasses on MI in verbose modeFrancis Visoiu Mistrih2018-01-181-9/+9
* [CodeGen][NFC] Refactor MachineInstr::printFrancis Visoiu Mistrih2018-01-181-21/+45
* [CodeGen] Remove special case of printing subRegIdx from MachineInstr::printFrancis Visoiu Mistrih2018-01-161-3/+0
* [CodeGen][NFC] Correct case for printSubRegIdxFrancis Visoiu Mistrih2018-01-161-1/+1
* [CodeGen] Don't print "pred:" and "opt:" in -debug outputFrancis Visoiu Mistrih2018-01-091-7/+1
* [CodeGen] Print frame-setup/destroy flags in -debug output like we do in MIRFrancis Visoiu Mistrih2018-01-091-15/+5
* [CodeGen] Don't print register classes in -debug outputFrancis Visoiu Mistrih2018-01-091-37/+0
* MachineFunction: Return reference from getFunction(); NFCMatthias Braun2017-12-151-1/+1
* [CodeGen] Move printing MO_Immediate operands to MachineOperand::printFrancis Visoiu Mistrih2017-12-081-2/+5
* [CodeGen] Fix index when printing tied machine operandsFrancis Visoiu Mistrih2017-12-071-3/+3
* [CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.Francis Visoiu Mistrih2017-12-071-15/+74
* [CodeGen] Separate MachineOperand implementation from MachineInstrFrancis Visoiu Mistrih2017-11-281-701/+0
* [CodeGen] Cleanup MachineOperandFrancis Visoiu Mistrih2017-11-281-24/+0
* [CodeGen] Rename functions PrintReg* to printReg*Francis Visoiu Mistrih2017-11-281-4/+4
* Fix a bunch more layering of CodeGen headers that are in TargetDavid Blaikie2017-11-171-2/+2
* MI: Print ranges on MMOMatt Arsenault2017-11-131-0/+15
* Revert "Correct dwarf unwind information in function epilogue for X86"Reid Kleckner2017-11-081-46/+4
* Set hasSideEffects=0 for PHI and fix affected passesAlex Bradbury2017-11-081-1/+1
* Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layeringDavid Blaikie2017-11-081-1/+1
* Reland "Correct dwarf unwind information in function epilogue for X86"Petar Jovanovic2017-11-071-4/+46
* Revert "Correct dwarf unwind information in function epilogue for X86"Petar Jovanovic2017-11-011-46/+4
* Correct dwarf unwind information in function epilogue for X86Petar Jovanovic2017-11-011-4/+46
* Reverting r315590; it did not include changes for llvm-tblgen, which is causi...Aaron Ballman2017-10-151-2/+2
* [dump] Remove NDEBUG from test to enable dump methods [NFC]Don Hinton2017-10-121-2/+2
* MachineInstr: Make isEqual agree with getHashValue in MachineInstrExpressionT...Diana Picus2017-10-121-3/+3
* CodeGen: Minor cleanups to use MachineInstr::getMF. NFCJustin Bogner2017-10-101-5/+5
* CodeGen: Add MachineInstr::getMF(). NFCJustin Bogner2017-10-101-0/+4
* [DebugInfo] Add missing DW_OP_deref when an NRVO pointer is spilledReid Kleckner2017-09-151-15/+25
* Add AddresSpace to PseudoSourceValue.Jan Sjodin2017-09-141-1/+5
* Re-land MachineInstr: Reason locally about some memory objects before going t...Balaram Makam2017-08-301-17/+43
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