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* [ARM] Promote small global constants to constant poolsJames Molloy2016-09-261-3/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If a constant is unamed_addr and is only used within one function, we can save on the code size and runtime cost of an indirection by changing the global's storage to inside the constant pool. For example, instead of: ldr r0, .CPI0 bl printf bx lr .CPI0: &format_string format_string: .asciz "hello, world!\n" We can emit: adr r0, .CPI0 bl printf bx lr .CPI0: .asciz "hello, world!\n" This can cause significant code size savings when many small strings are used in one function (4 bytes per string). This recommit contains fixes for a nasty bug related to fast-isel fallback - because fast-isel doesn't know about this optimization, if it runs and emits references to a string that we inline (because fast-isel fell back to SDAG) we will end up with an inlined string and also an out-of-line string, and we won't emit the out-of-line string, causing backend failures. It also contains fixes for emitting .text relocations which made the sanitizer bots unhappy. llvm-svn: 282387
* Fixed spill stack objects are mutableKrzysztof Parzyszek2016-08-311-3/+3
| | | | | | Differential Revision: https://reviews.llvm.org/D24039 llvm-svn: 280244
* ADT: Split ilist_node_traits into alloc and callback, NFCDuncan P. N. Exon Smith2016-08-301-1/+1
| | | | | | | | | | | | | | | | Many lists want to override only allocation semantics, or callbacks for iplist. Split these up to prevent code duplication. - Specialize ilist_alloc_traits to change the implementations of deleteNode() and createNode(). - One common desire is to do nothing deleteNode() and disable createNode(). Specialize ilist_alloc_traits to inherit from ilist_noalloc_traits for that behaviour. - Specialize ilist_callback_traits to use the addNodeToList(), removeNodeFromList(), and transferNodesFromList() callbacks. As a drive-by, add some coverage to the callback-related unit tests. llvm-svn: 280128
* [MFProperties] Introduce a FailedISel property.Quentin Colombet2016-08-261-0/+1
| | | | | | | | | | | This is used to communicate that the instruction selection pipeline failed at some point. Another way to achieve that would be to have some kind of conditional scheduling in the PassManager, such that we only schedule a pass based on the success/failure of another one. The property approach has the advantage of being lightweight and solve the problem at stake. llvm-svn: 279885
* [MachineFunction] Introduce a reset method.Quentin Colombet2016-08-261-5/+14
| | | | | | | | | | This method allows to reset the state of a MachineFunction as if it was just created. This will be used during the bring-up of GlobalISel to provide a way to fallback on SelectionDAG. That way, we can start doing correctness testing even if we are not able to select all functions via the global instruction selector. llvm-svn: 279876
* MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, ↵Matthias Braun2016-08-251-1/+1
| | | | | | | | | | | | | compute it Rename AllVRegsAllocated to NoVRegs. This avoids the connotation of running after register and simply describes that no vregs are used in a machine function. With that we can simply compute the property and do not need to dump/parse it in .mir files. Differential Revision: http://reviews.llvm.org/D23850 llvm-svn: 279698
* MachineFunction: Introduce NoPHIs propertyMatthias Braun2016-08-231-0/+1
| | | | | | | | | | | | | I want to compute the SSA property of .mir files automatically in upcoming patches. The problem with this is that some inputs will be reported as static single assignment with some passes claiming not to support SSA form. In reality though those passes do not support PHI instructions => Track the presence of PHI instructions separate from the SSA property. Differential Revision: https://reviews.llvm.org/D22719 llvm-svn: 279573
* MachineFunction: Add llvm_unreachable for missing propertiesMatthias Braun2016-08-191-0/+1
| | | | | | Most compilers should give you a warning anyway though. llvm-svn: 279346
* MachineFunction: Cleanup/simplify MachineFunctionProperties::print()Matthias Braun2016-08-191-34/+18
| | | | | | | | | | - Always compile print() regardless of LLVM_ENABLE_DUMP. (We usually only gard dump() functions with that). - Only show the set properties to reduce output clutter. - Remove the unused variant that even shows the unset properties. - Fix comments llvm-svn: 279338
* MachineFunction: Make LastProperty an alias of the last propertyMatthias Braun2016-08-191-2/+0
| | | | | | | This avoids unnecessary cases in switch statements covering all properties. llvm-svn: 279337
* [GlobalISel] Add Selected MachineFunction property.Ahmed Bougacha2016-08-021-0/+3
| | | | | | | | | | | | | | | | Selected: the InstructionSelect pass ran and all pre-isel generic instructions have been eliminated; i.e., all instructions are now target-specific or non-pre-isel generic instructions (e.g., COPY). Since only pre-isel generic instructions can have generic virtual register operands, this also means that all generic virtual registers have been constrained to virtual registers (assigned to register classes) and that all sizes attached to them have been eliminated. This lets us enforce certain invariants across passes. This property is GlobalISel-specific, but is always available. llvm-svn: 277482
* [GlobalISel] Add RegBankSelected MachineFunction property.Ahmed Bougacha2016-08-021-0/+3
| | | | | | | | | | RegBankSelected: the RegBankSelect pass ran and all generic virtual registers have been assigned to a register bank. This lets us enforce certain invariants across passes. This property is GlobalISel-specific, but is always available. llvm-svn: 277475
* [GlobalISel] Add Legalized MachineFunction property.Ahmed Bougacha2016-08-021-0/+3
| | | | | | | | | | | | | Legalized: The MachineLegalizer ran; all pre-isel generic instructions have been legalized, i.e., all instructions are now one of: - generic and always legal (e.g., COPY) - target-specific - legal pre-isel generic instructions. This lets us enforce certain invariants across passes. This property is GlobalISel-specific, but is always available. llvm-svn: 277470
* [CodeGen] Generalize MachineFunctionProperties::print comma handling.Ahmed Bougacha2016-08-021-2/+7
| | | | | | | | This is only used for debug prints, but the previous hardcoded ", " caused it to be printed unnecessarily when OnlySet, and is annoying when adding new properties. llvm-svn: 277465
* [CodeGen] Take a MachineMemOperand::Flags in ↵Justin Lebar2016-07-151-9/+4
| | | | | | | | | | | | | | | | | MachineFunction::getMachineMemOperand. Summary: Previously we took an unsigned. Hooray for type-safety. Reviewers: chandlerc Subscribers: dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D22282 llvm-svn: 275591
* [CodeGen] Refactor MachineMemOperand's Flags enum.Justin Lebar2016-07-141-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | Summary: - Give it a shorter name (because we're going to refer to it often from SelectionDAG and friends). - Split the flags and alignment into separate variables. - Specialize FlagsEnumTraits for it, so we can do bitwise ops on it without losing type information. - Make some enum values constants in MachineMemOperand instead. MOMaxBits should not be a valid Flag. - Simplify some of the bitwise ops for dealing with Flags. Reviewers: chandlerc Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D22281 llvm-svn: 275438
* Pass DebugLoc and SDLoc by const ref.Benjamin Kramer2016-06-121-3/+3
| | | | | | | | This used to be free, copying and moving DebugLocs became expensive after the metadata rewrite. Passing by reference eliminates a ton of track/untrack operations. No functionality change intended. llvm-svn: 272512
* MachineFunction: Add a const modifier to print() parameterMatthias Braun2016-05-051-1/+1
| | | | llvm-svn: 268657
* Improve error message reporting for MachineFunctionPropertiesDerek Schuff2016-04-211-1/+3
| | | | | | | | When printing the properties required by a pass, only print the properties that are set, and not those that are clear (only properties that are set are verified, clear properties are "don't-care"). llvm-svn: 267070
* Replace MachineRegisterInfo::TracksLiveness with a MachineFunctionPropertyDerek Schuff2016-04-111-7/+6
| | | | | | | | | | Use the MachineFunctionProperty mechanism to indicate whether the liveness info is accurate instead of a bool flag on MRI. Keeps the MRI accessor function for convenience. NFC Differential Revision: http://reviews.llvm.org/D18767 llvm-svn: 266020
* Combine redundant stack realignment booleans in MachineFrameInfoReid Kleckner2016-04-111-17/+14
| | | | | | | | | MachineFrameInfo does not need to be able to distinguish between the user asking us not to realign the stack and the target telling us it doesn't support stack realignment. Either way, fixed stack objects have their alignment clamped. llvm-svn: 265971
* [CodeGen] Don't assume that fixed stack objects are aligned in a ↵Charles Davis2016-04-091-5/+16
| | | | | | | | | | | | | | | | | | | | stack-realigned function. Summary: After we make the adjustment, we can assume that for local allocas, but not for stack parameters, the return address, or any other fixed stack object (which has a negative offset and therefore lies prior to the adjusted SP). Fixes PR26662. Reviewers: hfinkel, qcolombet, rnk Subscribers: rnk, llvm-commits Differential Revision: http://reviews.llvm.org/D18471 llvm-svn: 265886
* Replace MachineRegisterInfo::isSSA() with a MachineFunctionPropertyDerek Schuff2016-04-041-15/+13
| | | | | | | | | Use the MachineFunctionProperty mechanism to indicate whether a MachineFunction is in SSA form instead of a custom method on MachineRegisterInfo. NFC Differential Revision: http://reviews.llvm.org/D18574 llvm-svn: 265318
* Add a print method to MachineFunctionProperties for better error messagesDerek Schuff2016-03-291-0/+25
| | | | | | | | | This makes check failures much easier to understand. Make it empty (but leave it in the class) for NDEBUG builds. Differential Revision: http://reviews.llvm.org/D18529 llvm-svn: 264780
* [X86] Create mergeable constant pool entries for AVXDavid Majnemer2016-02-221-0/+2
| | | | | | | We supported creating mergeable constant pool entries for smaller constants but not for 32-byte AVX constants. llvm-svn: 261584
* Annotate dump() methods with LLVM_DUMP_METHOD, addressing Richard Smith ↵Yaron Keren2016-01-291-3/+3
| | | | | | | | r259192 post commit comment. clang part in r259232, this is the LLVM part of the patch. llvm-svn: 259240
* Introduce ConstantFoldCastOperand function and migrate some callers of ↵Manuel Jacob2016-01-211-8/+8
| | | | | | | | | | | | | | | | | ConstantFoldInstOperands to use it. NFC. Summary: Although this is a slight cleanup on its own, the main motivation is to refactor the constant folding API to ease migration to opaque pointers. This will be follow-up work. Reviewers: eddyb Subscribers: zzheng, dblaikie, llvm-commits Differential Revision: http://reviews.llvm.org/D16380 llvm-svn: 258390
* [MachineFunction] Constify getter. NFC.Quentin Colombet2016-01-191-1/+1
| | | | llvm-svn: 258207
* Add command line options to force function/loop alignments.Chad Rosier2015-12-291-0/+8
| | | | | | | These are being added for testing purposes. http://reviews.llvm.org/D15648 llvm-svn: 256571
* Move EH-specific helper functions to a more appropriate placeDavid Majnemer2015-12-021-1/+1
| | | | | | No functionality change is intended. llvm-svn: 254562
* Expand subregisters in MachineFrameInfo::getPristineRegsKrzysztof Parzyszek2015-11-191-4/+3
| | | | | | http://reviews.llvm.org/D14719 llvm-svn: 253600
* [WinEH] Move WinEHFuncInfo from MachineModuleInfo to MachineFunctionReid Kleckner2015-11-171-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Now that there is a one-to-one mapping from MachineFunction to WinEHFuncInfo, we don't need to use a DenseMap to select the right WinEHFuncInfo for the current funclet. The main challenge here is that X86WinEHStatePass is an IR pass that doesn't have access to the MachineFunction. I gave it its own WinEHFuncInfo object that it uses to calculate state numbers, which it then throws away. As long as nobody creates or removes EH pads between this pass and SDAG construction, we will get the same state numbers. The other thing X86WinEHStatePass does is to mark the EH registration node. Instead of communicating which alloca was the registration through WinEHFuncInfo, I added the llvm.x86.seh.ehregnode intrinsic. This intrinsic generates no code and simply marks the alloca in use. Reviewers: JCTremoulet Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D14668 llvm-svn: 253378
* Drop prelink support.Rafael Espindola2015-11-171-29/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The way prelink used to work was * The compiler decides if a given section only has relocations that are know to point to the same DSO. If so, it names it .data.rel.ro.local<something>. * The static linker puts all of these together. * The prelinker program assigns addresses to each library and resolves the local relocations. There are many problems with this: * It is incompatible with address space randomization. * The information passed by the compiler is redundant. The linker knows if a given relocation is in the same DSO or not. If could sort by that if so desired. * There are newer ways of speeding up DSO (gnu hash for example). * Even if we want to implement this again in the compiler, the previous implementation is pretty broken. It talks about relocations that are "resolved by the static linker". If they are resolved, there are none left for the prelinker. What one needs to track is if an expression will require only dynamic relocations that point to the same DSO. At this point it looks like the prelinker is an historical curiosity. For example, fedora has retired it because it failed to build for two releases (http://pkgs.fedoraproject.org/cgit/prelink.git/commit/?id=eb43100a8331d91c801ee3dcdb0a0bb9babfdc1f) This patch removes support for it. That is, it stops printing the ".local" sections. llvm-svn: 253280
* CodeGen: Continue removing ilist iterator implicit conversionsDuncan P. N. Exon Smith2015-10-091-2/+2
| | | | llvm-svn: 249884
* Revert "Disable targetdatalayoutcheck"Tobias Grosser2015-08-171-0/+5
| | | | | | | I committed by accident a local hack that should not have made it upstream. Sorry for the noise. llvm-svn: 245212
* Disable targetdatalayoutcheckTobias Grosser2015-08-171-5/+0
| | | | llvm-svn: 245210
* PseudoSourceValue: Replace global manager with a manager in a machine function.Alex Lorenz2015-08-111-0/+3
| | | | | | | | | | | | | | | | | | | | | | This commit removes the global manager variable which is responsible for storing and allocating pseudo source values and instead it introduces a new manager class named 'PseudoSourceValueManager'. Machine functions now own an instance of the pseudo source value manager class. This commit also modifies the 'get...' methods in the 'MachinePointerInfo' class to construct pseudo source values using the instance of the pseudo source value manager object from the machine function. This commit updates calls to the 'get...' methods from the 'MachinePointerInfo' class in a lot of different files because those calls now need to pass in a reference to a machine function to those methods. This change will make it easier to serialize pseudo source values as it will enable me to transform the mips specific MipsCallEntry PseudoSourceValue subclass into two target independent subclasses. Reviewers: Akira Hatanaka llvm-svn: 244693
* wrap OptSize and MinSize attributes for easier and consistent access (NFCI)Sanjay Patel2015-08-041-0/+1
| | | | | | | | | | | | | | | | | Create wrapper methods in the Function class for the OptimizeForSize and MinSize attributes. We want to hide the logic of "or'ing" them together when optimizing just for size (-Os). Currently, we are not consistent about this and rely on a front-end to always set OptimizeForSize (-Os) if MinSize (-Oz) is on. Thus, there are 18 FIXME changes here that should be added as follow-on patches with regression tests. This patch is NFC-intended: it just replaces existing direct accesses of the attributes by the equivalent wrapper call. Differential Revision: http://reviews.llvm.org/D11734 llvm-svn: 243994
* Add a TargetMachine hook that verifies DataLayout compatibilityMehdi Amini2015-07-301-0/+4
| | | | | | | | | | | | | Summary: Also provide the associated assertion when CodeGen starts. Reviewers: echristo Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D11654 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 243682
* MIR Serialization: Serialize the external symbol machine operands.Alex Lorenz2015-07-211-0/+7
| | | | | Reviewers: Duncan P. N. Exon Smith llvm-svn: 242806
* Redirect DataLayout from TargetMachine to Module in MachineFunctionMehdi Amini2015-07-071-20/+20
| | | | | | | | | | | | | | | | Summary: This change is part of a series of commits dedicated to have a single DataLayout during compilation by using always the one owned by the module. Reviewers: echristo Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10984 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 241610
* CodeGen: Use a single SlotTracker in MachineFunction::print()Duncan P. N. Exon Smith2015-06-261-1/+4
| | | | | | | | | | | | | Expose enough of the IR-level `SlotTracker` so that `MachineFunction::print()` can use a single one for printing `BasicBlock`s. Next step would be to lift this through a few more APIs so that we can make other print methods faster. Fixes PR23865, changing the runtime of `llc -print-machineinstrs` from many minutes (killed after 3 minutes, but it wasn't very close) to 13 seconds for a 502185 line dump. llvm-svn: 240842
* Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)Alexander Kornienko2015-06-231-1/+1
| | | | | | Apparently, the style needs to be agreed upon first. llvm-svn: 240390
* Fixed/added namespace ending comments using clang-tidy. NFCAlexander Kornienko2015-06-191-1/+1
| | | | | | | | | | | | | The patch is generated using this command: tools/clang/tools/extra/clang-tidy/tool/run-clang-tidy.py -fix \ -checks=-*,llvm-namespace-comment -header-filter='llvm/.*|clang/.*' \ llvm/lib/ Thanks to Eugene Kosov for the original patch! llvm-svn: 240137
* MIR Serialization: Connect the machine function analysis pass to the MIR parser.Alex Lorenz2015-06-151-0/+3
| | | | | | | | | | | | | | | | | | | | | This commit connects the machine function analysis pass (which creates machine functions) to the MIR parser, which will initialize the machine functions with the state from the MIR file and reconstruct the machine IR. This commit introduces a new interface called 'MachineFunctionInitializer', which can be used to provide custom initialization for the machine functions. This commit also introduces a new diagnostic class called 'DiagnosticInfoMIRParser' which is used for MIR parsing errors. This commit modifies the default diagnostic handling in LLVMContext - now the the diagnostics are printed directly into llvm::errs() so that the MIR parsing errors can be printed with colours. Reviewers: Justin Bogner Differential Revision: http://reviews.llvm.org/D9928 llvm-svn: 239753
* remove function names from comments and clean up; NFCSanjay Patel2015-06-131-58/+40
| | | | llvm-svn: 239680
* MachineFrameInfo: Simplify pristine register calculation.Matthias Braun2015-05-281-46/+4
| | | | | | | | | | | | | | | | | | | | | | | | | About pristine regsiters: Pristine registers "hold a value that is useless to the current function, but that must be preserved - they are callee saved registers that have not been saved." This concept saves compile time as it frees the prologue/epilogue inserter from adding every such register to every basic blocks live-in list. However the current code in getPristineRegs is formulated in a complicated way: Inside the function prologue and epilogue all callee saves are considered pristine, while in the rest of the code only the non-saved ones are considered pristine. This requires logic to differentiate between prologue/epilogue and the rest and in the presence of shrink-wrapping this even becomes complicated/expensive. It's also unnecessary because the prologue epilogue inserters already mark callee-save registers that are saved/restores properly in the respective blocks in the prologue/epilogue (see updateLiveness() in PrologueEpilogueInserter.cpp). So only declaring non-saved/restored callee saved registers as pristine just works. Differential Revision: http://reviews.llvm.org/D10101 llvm-svn: 238524
* MC: Clean up method names in MCContext.Jim Grosbach2015-05-181-2/+2
| | | | | | | The naming was a mish-mash of old and new style. Update to be consistent with the new. NFC. llvm-svn: 237594
* [ShrinkWrap] Add (a simplified version) of shrink-wrapping.Quentin Colombet2015-05-051-2/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch introduces a new pass that computes the safe point to insert the prologue and epilogue of the function. The interest is to find safe points that are cheaper than the entry and exits blocks. As an example and to avoid regressions to be introduce, this patch also implements the required bits to enable the shrink-wrapping pass for AArch64. ** Context ** Currently we insert the prologue and epilogue of the method/function in the entry and exits blocks. Although this is correct, we can do a better job when those are not immediately required and insert them at less frequently executed places. The job of the shrink-wrapping pass is to identify such places. ** Motivating example ** Let us consider the following function that perform a call only in one branch of a if: define i32 @f(i32 %a, i32 %b) { %tmp = alloca i32, align 4 %tmp2 = icmp slt i32 %a, %b br i1 %tmp2, label %true, label %false true: store i32 %a, i32* %tmp, align 4 %tmp4 = call i32 @doSomething(i32 0, i32* %tmp) br label %false false: %tmp.0 = phi i32 [ %tmp4, %true ], [ %a, %0 ] ret i32 %tmp.0 } On AArch64 this code generates (removing the cfi directives to ease readabilities): _f: ; @f ; BB#0: stp x29, x30, [sp, #-16]! mov x29, sp sub sp, sp, #16 ; =16 cmp w0, w1 b.ge LBB0_2 ; BB#1: ; %true stur w0, [x29, #-4] sub x1, x29, #4 ; =4 mov w0, wzr bl _doSomething LBB0_2: ; %false mov sp, x29 ldp x29, x30, [sp], #16 ret With shrink-wrapping we could generate: _f: ; @f ; BB#0: cmp w0, w1 b.ge LBB0_2 ; BB#1: ; %true stp x29, x30, [sp, #-16]! mov x29, sp sub sp, sp, #16 ; =16 stur w0, [x29, #-4] sub x1, x29, #4 ; =4 mov w0, wzr bl _doSomething add sp, x29, #16 ; =16 ldp x29, x30, [sp], #16 LBB0_2: ; %false ret Therefore, we would pay the overhead of setting up/destroying the frame only if we actually do the call. ** Proposed Solution ** This patch introduces a new machine pass that perform the shrink-wrapping analysis (See the comments at the beginning of ShrinkWrap.cpp for more details). It then stores the safe save and restore point into the MachineFrameInfo attached to the MachineFunction. This information is then used by the PrologEpilogInserter (PEI) to place the related code at the right place. This pass runs right before the PEI. Unlike the original paper of Chow from PLDI’88, this implementation of shrink-wrapping does not use expensive data-flow analysis and does not need hack to properly avoid frequently executed point. Instead, it relies on dominance and loop properties. The pass is off by default and each target can opt-in by setting the EnableShrinkWrap boolean to true in their derived class of TargetPassConfig. This setting can also be overwritten on the command line by using -enable-shrink-wrap. Before you try out the pass for your target, make sure you properly fix your emitProlog/emitEpilog/adjustForXXX method to cope with basic blocks that are not necessarily the entry block. ** Design Decisions ** 1. ShrinkWrap is its own pass right now. It could frankly be merged into PEI but for debugging and clarity I thought it was best to have its own file. 2. Right now, we only support one save point and one restore point. At some point we can expand this to several save point and restore point, the impacted component would then be: - The pass itself: New algorithm needed. - MachineFrameInfo: Hold a list or set of Save/Restore point instead of one pointer. - PEI: Should loop over the save point and restore point. Anyhow, at least for this first iteration, I do not believe this is interesting to support the complex cases. We should revisit that when we motivating examples. Differential Revision: http://reviews.llvm.org/D9210 <rdar://problem/3201744> llvm-svn: 236507
* Remove superfluous .str() and replace std::string concatenation with Twine.Yaron Keren2015-03-271-2/+2
| | | | llvm-svn: 233392
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