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path: root/llvm/lib/CodeGen/MIRParser/MIParser.cpp
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* GlobalISel: Change representation of shuffle masksMatt Arsenault2019-08-131-0/+46
* Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Re...Daniel Sanders2019-08-011-5/+5
* Allow target to handle STRICT floating-point nodesUlrich Weigand2019-06-051-1/+4
* Make sub-registers index names case sensitive in the MIRParserMarkus Lavin2019-05-091-1/+1
* [DebugInfo] DW_OP_deref_size in PrologEpilogInserter.Markus Lavin2019-04-301-0/+5
* Revert r358268 "[DebugInfo] DW_OP_deref_size in PrologEpilogInserter."Hans Wennborg2019-04-121-5/+0
* [DebugInfo] DW_OP_deref_size in PrologEpilogInserter.Markus Lavin2019-04-121-0/+5
* MIR: Allow targets to serialize MachineFunctionInfoMatt Arsenault2019-03-141-1/+1
* MIR: Stop reinitializing target information for every useMatt Arsenault2019-03-121-257/+253
* MIR: Validate LLT types when parsingMatt Arsenault2019-02-041-6/+35
* MIR: Reject non-power-of-4 alignments in MMO parsingMatt Arsenault2019-01-301-0/+4
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* [AArch64] - Return address signing dwarf supportLuke Cheeseman2018-12-181-0/+4
* [mir] Fix uninitialized variable in r349035 noticed by clang-atom-d525-fedora...Daniel Sanders2018-12-131-1/+1
* [mir] Serialize DILocation inline when not possible to use a metadata referenceDaniel Sanders2018-12-131-4/+115
* Revert r347490 as it breaks address sanitizer buildsLuke Cheeseman2018-11-231-4/+0
* Revert r343341Luke Cheeseman2018-11-231-0/+4
* MachineOperand/MIParser: Do not print debug-use flag, infer itMatthias Braun2018-10-301-0/+2
* MIRParser: Check that instructions only reference DILocation metadataMatthias Braun2018-10-011-0/+2
* Revert r343317Luke Cheeseman2018-09-281-4/+0
* Reapply changes reverted by r343235Luke Cheeseman2018-09-281-0/+4
* Revert r343192 as an ubsan build is currently failingLuke Cheeseman2018-09-271-4/+0
* Reapply changes reverted in r343114, lldb patch to follow shortlyLuke Cheeseman2018-09-271-0/+4
* Revert r343112 as CallFrameString API change has broken lldb buildsLuke Cheeseman2018-09-261-4/+0
* [AArch64] - Return address signing dwarf supportLuke Cheeseman2018-09-261-0/+4
* Revert r343089 "[AArch64] - Return address signing dwarf support"Hans Wennborg2018-09-261-4/+0
* [AArch64] - Return address signing dwarf supportLuke Cheeseman2018-09-261-0/+4
* add IR flags to MIMichael Berg2018-09-111-1/+10
* Consistently use MemoryLocation::UnknownSize to indicate unknown access sizeKrzysztof Parzyszek2018-08-201-6/+13
* [x86/MIR] Implement support for pre- and post-instruction symbols, asChandler Carruth2018-08-161-4/+63
* [MI] Change the array of `MachineMemOperand` pointers to beChandler Carruth2018-08-161-4/+1
* CodeGen: Cleanup regmask construction; NFCMatthias Braun2018-07-261-6/+2
* [CodeGen] Fix inconsistent declaration parameter nameFangrui Song2018-07-161-2/+2
* [MIRParser] Update a diagnostic message to use the correct register sigil. NFCMatt Davis2018-06-191-1/+1
* [MIRParser] Add parser support for 'true' and 'false' i1s.Amara Emerson2018-06-051-2/+5
* [MIRParser][GlobalISel] Parsing vector pointer types (<M x pA>)Roman Tereshin2018-05-081-13/+20
* [MIRPraser] Improve error checking for typed immediate operandsHeejin Ahn2018-05-051-6/+13
* [MIRParser] Allow register class names in the form of integer/scalarHeejin Ahn2018-05-051-7/+18
* MachineInst support mapping SDNode fast math flags for support in Back End co...Michael Berg2018-05-031-6/+29
* [MIR] Adding support for Named Virtual Registers in MIR.Puyan Lotfi2018-03-301-0/+26
* [MIR] Allow frame-setup and frame-destroy on the same instructionFrancis Visoiu Mistrih2018-03-131-5/+7
* [MIR] Add support for addrspace in MIRFrancis Visoiu Mistrih2018-01-261-0/+16
* [MIR] Add support for the frame-destroy MachineInstr flagFrancis Visoiu Mistrih2018-01-091-0/+3
* MachineFunction: Return reference from getFunction(); NFCMatthias Braun2017-12-151-11/+11
* [MIR] Add support for missing CFI directivesFrancis Visoiu Mistrih2017-12-151-0/+67
* Remove redundant includes from lib/CodeGen.Michael Zolotukhin2017-12-131-1/+0
* [MachineOperand][MIR] Add isRenamable to MachineOperand.Geoff Berry2017-12-121-1/+6
* [CodeGen] Unify MBB reference format in both MIR and debug outputFrancis Visoiu Mistrih2017-12-041-0/+2
* [mir] Print/Parse both MOLoad and MOStore when they occur together.Daniel Sanders2017-11-281-1/+11
* Fix a bunch more layering of CodeGen headers that are in TargetDavid Blaikie2017-11-171-2/+2
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