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* Minor bug fix. LowerSubregs should translate Evan Cheng2009-09-221-0/+1
| | | | | | | | | | %S0<def> = EXTRACT_SUBREG %Q0<kill>, 1 to %S0<def> = IMPLICIT_DEF %Q0<imp-use,kill> Implicit_def does not *read* any register so the operand should be marked "implicit". The missing "implicit" marker on the operand is wrong, but it doesn't actually break anything. llvm-svn: 82503
* Convert DOUT to DEBUG(errs()...).Bill Wendling2009-08-221-30/+27
| | | | llvm-svn: 79753
* Remove RegisterScavenger::isSuperRegUsed(). This completely reverses the ↵Jakob Stoklund Olesen2009-08-081-6/+7
| | | | | | | | | | | | | | | mistaken commit r77904. Now there is no special treatment of instructions that redefine part of a super-register. Instead, the super-register is marked with <imp-use,kill> and <imp-def>. For instance, from LowerSubregs on ARM: subreg: CONVERTING: %Q1<def> = INSERT_SUBREG %Q1<undef>, %D1<kill>, 5 subreg: %D2<def> = FCPYD %D1<kill>, 14, %reg0, %Q1<imp-def> subreg: CONVERTING: %Q1<def> = INSERT_SUBREG %Q1, %D0<kill>, 6 subreg: %D3<def> = FCPYD %D0<kill>, 14, %reg0, %Q1<imp-use,kill>, %Q1<imp-def> llvm-svn: 78466
* Turn some insert_subreg, extract_subreg, subreg_to_reg into implicit_defs.Evan Cheng2009-08-051-0/+1
| | | | llvm-svn: 78151
* One more. Transfer kill of the larger register when lowering an EXTRACT_SUBREG.Evan Cheng2009-08-051-4/+6
| | | | llvm-svn: 78145
* One more place where subreg lowering forgot to transfer undefness.Evan Cheng2009-08-051-3/+6
| | | | llvm-svn: 78144
* If the insert_subreg source is <undef>, insert an implicit_def instead of a ↵Evan Cheng2009-08-051-2/+8
| | | | | | copy. llvm-svn: 78141
* LowerSubregsInstructionPass::LowerExtract should not extend the live range ↵Jakob Stoklund Olesen2009-08-041-14/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | of registers. When LowerExtract eliminates an EXTRACT_SUBREG with a kill flag, it moves the kill flag to the place where the sub-register is killed. This can accidentally overlap with the use of a sibling sub-register, and we have trouble. In the test case we have this code: Live Ins: %R0 %R1 %R2 %R2L<def> = EXTRACT_SUBREG %R2<kill>, 1 %R2H<def> = LOAD16fi <fi#-1>, 0, Mem:LD(2,4) [FixedStack-1 + 0] %R1L<def> = EXTRACT_SUBREG %R1<kill>, 1 %R0L<def> = EXTRACT_SUBREG %R0<kill>, 1 %R0H<def> = ADD16 %R2H<kill>, %R2L<kill>, %AZ<imp-def>, %AN<imp-def>, %AC0<imp-def>, %V<imp-def>, %VS<imp-def> subreg: CONVERTING: %R2L<def> = EXTRACT_SUBREG %R2<kill>, 1 subreg: eliminated! subreg: killed here: %R0H<def> = ADD16 %R2H, %R2L, %R2<imp-use,kill>, %AZ<imp-def>, %AN<imp-def>, %AC0<imp-def>, %V<imp-def>, %VS<imp-def> The kill flag on %R2 is moved to the last instruction, and the live range overlaps with the definition of %R2H: *** Bad machine code: Redefining a live physical register *** - function: f - basic block: 0x18358c0 (#0) - instruction: %R2H<def> = LOAD16fi <fi#-1>, 0, Mem:LD(2,4) [FixedStack-1 + 0] Register R2H was defined but already live. The fix is to replace EXTRACT_SUBREG with IMPLICIT_DEF instead of eliminating it completely: subreg: CONVERTING: %R2L<def> = EXTRACT_SUBREG %R2<kill>, 1 subreg: replace by: %R2L<def> = IMPLICIT_DEF %R2<kill> Note that these IMPLICIT_DEF instructions survive to the asm output. It is necessary to fix the stack-color-with-reg test case because of that. llvm-svn: 78093
* Fix Bug 4657: register scavenger asserts with subreg loweringJakob Stoklund Olesen2009-08-031-8/+31
| | | | | | | | | | | | | | | When LowerSubregsInstructionPass::LowerInsert eliminates an INSERT_SUBREG instriction because it is an identity copy, make sure that the same registers are alive before and after the elimination. When the super-register is marked <undef> this requires inserting an IMPLICIT_DEF instruction to make sure the super register is live. Fix a related bug where a kill flag on the inserted sub-register was not transferred properly. Finally, clear the undef flag in MachineInstr::addRegisterKilled. Undef implies dead and kill implies live, so they cant both be valid. llvm-svn: 77989
* Use setPreservesAll and setPreservesCFG in CodeGen passes.Dan Gohman2009-07-311-0/+1
| | | | llvm-svn: 77754
* More migration to raw_ostream, the water has dried up around the iostream hole.Daniel Dunbar2009-07-251-1/+3
| | | | | | | | | | - Some clients which used DOUT have moved to DEBUG. We are deprecating the "magic" DOUT behavior which avoided calling printing functions when the statement was disabled. In addition to being unnecessary magic, it had the downside of leaving code in -Asserts builds, and of hiding potentially unnecessary computations. llvm-svn: 77019
* Let RegisterInfo decide whether it can emit cross-class copy or notAnton Korobeynikov2009-07-161-4/+5
| | | | llvm-svn: 75955
* Do not fold away subreg_to_reg if the source register has a sub-register ↵Evan Cheng2009-03-231-3/+9
| | | | | | | | | | index. That means the source register is taking a sub-register of a larger register. e.g. On x86 %RAX<def> = ... %RAX<def> = SUBREG_TO_REG 0, %EAX:3<kill>, 3 The first def is defining RAX, not EAX so the top bits were not zero-extended. llvm-svn: 67511
* Teach LowerSubregs to preserve kill/dead information when loweringDan Gohman2008-12-181-1/+63
| | | | | | subreg instructions. llvm-svn: 61220
* Make LowerSubregs' debug output for EXTRACT_SUBREG consistent withDan Gohman2008-12-181-1/+6
| | | | | | that of INSERT_SUBREG and SUBREG_TO_REG. llvm-svn: 61218
* Fix a copy+pasto in an assertion message.Dan Gohman2008-12-181-1/+1
| | | | llvm-svn: 61217
* Fix indentation level.Dan Gohman2008-12-181-33/+33
| | | | llvm-svn: 61216
* Silence unused variable warnings.Devang Patel2008-11-211-0/+2
| | | | llvm-svn: 59841
* Switch the MachineOperand accessors back to the short names likeDan Gohman2008-10-031-11/+11
| | | | | | isReg, etc., from isRegister, etc. llvm-svn: 57006
* Give LowerSubregs.cpp a top-level description.Dan Gohman2008-09-241-0/+7
| | | | llvm-svn: 56596
* Instead of setPreservesAll, just mark them preseving machine loop info and ↵Evan Cheng2008-09-221-1/+2
| | | | | | machine dominators. llvm-svn: 56475
* Mark several codegen passes as preserving all analysis.Evan Cheng2008-09-221-0/+5
| | | | llvm-svn: 56469
* Tidy up several unbeseeming casts from pointer to intptr_t.Dan Gohman2008-09-041-1/+1
| | | | llvm-svn: 55779
* Fix indentation.Dan Gohman2008-08-201-2/+2
| | | | llvm-svn: 55049
* Re-enable elimination of unnecessary SUBREG_TO_REG instructions inDan Gohman2008-08-071-4/+9
| | | | | | | | | | | LowerSubregs, and fix an x86-64 isel bug that this exposed. SUBREG_TO_REG for x86-64 implicit zero extension is only safe for isel to generate when the source is known to always have zeros in the high 32 bits. The EXTRACT_SUBREG instruction does not clear the high 32 bits. llvm-svn: 54444
* Re-introduce LeakDetector support for MachineInstrs and MachineBasicBlocks.Dan Gohman2008-07-171-3/+3
| | | | | | | Fix a leak that this turned up in LowerSubregs.cpp. And, comment a leak in LiveIntervalAnalysis.cpp. llvm-svn: 53746
* It's not safe to remove SUBREG_TO_REG that looks like identity copies, e.g. ↵Evan Cheng2008-06-171-11/+6
| | | | | | movl %eax, %eax on x86-64 actually does a zero-extend. llvm-svn: 52421
* Do not issue identity copies.Evan Cheng2008-06-161-13/+22
| | | | llvm-svn: 52373
* Revert this.Evan Cheng2008-06-041-4/+0
| | | | llvm-svn: 51949
* LowerSubregs should not clobber any analysis.Evan Cheng2008-06-041-0/+4
| | | | llvm-svn: 51933
* Make insert_subreg a two-address instruction, vastly simplifying ↵Christopher Lamb2008-03-161-94/+61
| | | | | | LowerSubregs pass. Add a new TII, subreg_to_reg, which is like insert_subreg except that it takes an immediate implicit value to insert into rather than a register. llvm-svn: 48412
* Get rid of a pseudo instruction and replace it with subreg based operation ↵Christopher Lamb2008-03-131-10/+14
| | | | | | | on real instructions, ridding the asm printers of the hack used to do this previously. In the process, update LowerSubregs to be careful about eliminating copies that have side affects. Note: the coalescer will have to be careful about this too, when it starts coalescing insert_subreg nodes. llvm-svn: 48329
* Recommitting parts of r48130. These do not appear to cause the observed ↵Christopher Lamb2008-03-111-23/+12
| | | | | | failures. llvm-svn: 48223
* Use TargetRegisterInfo::getPhysicalRegisterRegClass. Remove duplicated code.Evan Cheng2008-03-111-21/+6
| | | | llvm-svn: 48221
* Revert 48125, 48126, and 48130 for now to unbreak some x86-64 tests.Evan Cheng2008-03-101-12/+23
| | | | llvm-svn: 48167
* Allow insert_subreg into implicit, target-specific values. Christopher Lamb2008-03-101-23/+12
| | | | | | | Change insert/extract subreg instructions to be able to be used in TableGen patterns. Use the above features to reimplement an x86-64 pseudo instruction as a pattern. llvm-svn: 48130
* Rename MRegisterInfo to TargetRegisterInfo.Dan Gohman2008-02-101-25/+25
| | | | llvm-svn: 46930
* Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of theOwen Anderson2007-12-311-4/+6
| | | | | | Machine-level API cleanup instigated by Chris. llvm-svn: 45470
* Rename SSARegMap -> MachineRegisterInfo in keeping with the idea Chris Lattner2007-12-311-5/+5
| | | | | | | | | | | | | | that "machine" classes are used to represent the current state of the code being compiled. Given this expanded name, we can start moving other stuff into it. For now, move the UsedPhysRegs and LiveIn/LoveOuts vectors from MachineFunction into it. Update all the clients to match. This also reduces some needless #includes, such as MachineModuleInfo from MachineFunction. llvm-svn: 45467
* Remove attribution from file headers, per discussion on llvmdev.Chris Lattner2007-12-291-2/+2
| | | | llvm-svn: 45418
* isSubRegOf() is a dup of isSubRegister.Evan Cheng2007-10-231-1/+1
| | | | llvm-svn: 43249
* Allow copyRegToReg to emit cross register classes copies.Evan Cheng2007-09-261-4/+4
| | | | | | Tested with "make check"! llvm-svn: 42346
* Remove isReg, isImm, and isMBB, and change all their users to use Dan Gohman2007-09-141-3/+3
| | | | | | | isRegister, isImmediate, and isMachineBasicBlock, which are equivalent, and more popular. llvm-svn: 41958
* Move isSubRegOf into MRegisterInfo. Fix a missed move elimination in ↵Christopher Lamb2007-08-101-17/+24
| | | | | | LowerSubregs and add more debugging output there. llvm-svn: 41005
* Implement review feedback. No functionality change.Christopher Lamb2007-08-061-137/+152
| | | | llvm-svn: 40863
* Add a MachineFunction pass, which runs post register allocation, that turns ↵Christopher Lamb2007-07-261-0/+226
subreg insert/extract instruction into register copies. This ensures correct code gen if the coalescer isn't able to remove all subreg instructions. llvm-svn: 40521
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