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path: root/llvm/lib/CodeGen/LLVMTargetMachine.cpp
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* Run the pre-register allocation tail duplication pass by default. RemoveBob Wilson2010-01-161-5/+3
| | | | | | | the -pre-regalloc-taildup command-line option, and add a new -disable-early-taildup option. llvm-svn: 93597
* Hook up llc's -filetype=obj to use MCStreamer if an MCCodeEmitter is available.Nate Begeman2010-01-151-3/+14
| | | | | | | | | Remove most of old Mach-O Writer support, it has been replaced by MCMachOStreamer Further refactoring to completely remove MachOWriter and drive the object file writer with the AsmPrinter MCInst/MCSection logic is forthcoming. llvm-svn: 93527
* Add comment explaining the necessity of r93456Jim Grosbach2010-01-141-0/+5
| | | | llvm-svn: 93459
* Dwarf EH prepare needs to be run after SjLj prepare. Otherwise,Jim Grosbach2010-01-141-1/+1
| | | | | | | | | catch info can get misplaced when a selector ends up more than one block removed from the parent invoke(s). This could happen when a landing pad is shared by multiple invokes and is also a target of a normal edge from elsewhere. llvm-svn: 93456
* Re-enable extension optimization pass.Evan Cheng2010-01-131-0/+1
| | | | llvm-svn: 93313
* Disable opt-ext pass to unbreak the build for now.Evan Cheng2010-01-131-1/+0
| | | | llvm-svn: 93286
* Remove debug option I accidentally left in.Evan Cheng2010-01-131-3/+0
| | | | llvm-svn: 93285
* Add a quick pass to optimize sign / zero extension instructions. For targets ↵Evan Cheng2010-01-131-0/+5
| | | | | | | | where the pre-extension values are available in the subreg of the result of the extension, replace the uses of the pre-extension value with the result + extract_subreg. For now, this pass is fairly conservative. It only perform the replacement when both the pre- and post- extension values are used in the block. It will miss cases where the post-extension values are live, but not used. llvm-svn: 93278
* Allow double defs after tail duplication.Jakob Stoklund Olesen2010-01-061-1/+2
| | | | llvm-svn: 92874
* Change errs() to dbgs().David Greene2010-01-041-4/+5
| | | | llvm-svn: 92524
* Fix setting and default setting of code model for jit. Do thisEric Christopher2009-12-211-0/+26
| | | | | | | | | | by allowing backends to override routines that will default the JIT and Static code generation to an appropriate code model for the architecture. Should fix PR 5773. llvm-svn: 91824
* Remove debugging code.Evan Cheng2009-12-171-24/+0
| | | | llvm-svn: 91604
* Revert 91280-91283, 91286-91289, 91291, 91293, 91295-91296. It apparently ↵Evan Cheng2009-12-171-0/+24
| | | | | | introduced a non-deterministic behavior in the optimizer somewhere. llvm-svn: 91598
* Add a pre-regalloc tail duplication pass.Evan Cheng2009-12-041-1/+11
| | | | llvm-svn: 90567
* Rename new TailDuplicationPass to avoid name conflict with the old one.Bob Wilson2009-11-261-2/+2
| | | | llvm-svn: 89968
* Split tail duplication into a separate pass. This is needed to avoidBob Wilson2009-11-261-0/+8
| | | | | | | | | running tail duplication when doing branch folding for if-conversion, and we also want to be able to run tail duplication earlier to fix some reg alloc problems. Move the CanFallThrough function from BranchFolding to MachineBasicBlock so that it can be shared by TailDuplication. llvm-svn: 89904
* Remove DebugLabelFolder pass. It is not used by dwarf writer anymore.Devang Patel2009-11-241-4/+0
| | | | llvm-svn: 89790
* Add an experimental option to run gep-splitting and no-load GVNDan Gohman2009-11-201-0/+11
| | | | | | just before codegen. llvm-svn: 89439
* Now that code placement optimization pass is run for JIT, make sure it's ↵Evan Cheng2009-11-051-3/+3
| | | | | | before pre-emit passes. llvm-svn: 86092
* Add some options to disable various code gen optimizations.Eric Christopher2009-11-041-8/+26
| | | | llvm-svn: 86044
* Factor out more code into addCommonCodeGenPasses. The JIT wasn'tDan Gohman2009-10-311-32/+30
| | | | | | | | previously running CodePlacementOpt. Also print headers before each dump in -print-machineinstrs mode, so that it's clear which dump is which. llvm-svn: 85681
* Remove CodeGenLICM. It's largely obsoleted by MachineLICM's new abilityDan Gohman2009-10-311-6/+1
| | | | | | to unfold loop-invariant loads. llvm-svn: 85657
* Don't put in these EH changes.Bill Wendling2009-10-291-2/+2
| | | | llvm-svn: 85460
* Reverting r85338 for now. It's causing a bootstrap failure on PPC darwin9.Bill Wendling2009-10-291-2/+2
| | | | | | | | --- Reverse-merging r85338 into '.': U lib/CodeGen/SimpleRegisterCoalescing.cpp U lib/CodeGen/SimpleRegisterCoalescing.h llvm-svn: 85454
* Revert r85346 change to control tail merging by CodeGenOpt::Level.Bob Wilson2009-10-281-1/+1
| | | | | | I'm going to redo this using the OptimizeForSize function attribute. llvm-svn: 85426
* Record CodeGen optimization level in the BranchFolding pass so that we canBob Wilson2009-10-271-1/+1
| | | | | | | | | | | | | | | | use it to control tail merging when there is a tradeoff between performance and code size. When there is only 1 instruction in the common tail, we have been merging. That can be good for code size but is a definite loss for performance. Now we will avoid tail merging in that case when the optimization level is "Aggressive", i.e., "-O3". Radar 7338114. Since the IfConversion pass invokes BranchFolding, it too needs to know the optimization level. Note that I removed the RegisterPass instantiation for IfConversion because it required a default constructor. If someone wants to keep that for some reason, we can add a default constructor with a hard-wired optimization level. llvm-svn: 85346
* Change createPostRAScheduler so it can be turned off at llc -O1.Evan Cheng2009-10-161-1/+1
| | | | llvm-svn: 84273
* Add a target hook to add pre- post-regalloc scheduling passes.Evan Cheng2009-09-301-0/+4
| | | | llvm-svn: 83144
* Remove -post-RA-schedule flag and add a TargetSubtarget method to enable ↵David Goodwin2009-09-301-9/+1
| | | | | | post-register-allocation scheduling. By default it is off. For ARM, enable/disable with -mattr=+/-postrasched. Enable by default for cortex-a8. llvm-svn: 83122
* Flip -disable-post-RA-scheduler to -post-RA-scheduler.Evan Cheng2009-09-251-5/+7
| | | | llvm-svn: 82803
* Add a new pass for doing late hoisting of floating-point and vectorDan Gohman2009-09-161-1/+6
| | | | | | | | | | | constants out of loops. These aren't covered by the regular LICM pass, because in LLVM IR constants don't require separate instructions. They're not always covered by the MachineLICM pass either, because it doesn't know how to unfold folded constant-pool loads. This is somewhat experimental at this point, and off by default. llvm-svn: 82076
* -fast is now -O0. -fast-isel is no longer experimental.Dan Gohman2009-08-261-2/+2
| | | | llvm-svn: 80104
* remove std::ostream versions of printing stuff for MBB and MF,Chris Lattner2009-08-231-6/+6
| | | | | | upgrading a few things to use raw_ostream llvm-svn: 79811
* Rename TargetAsmInfo (and its subclasses) to MCAsmInfo.Chris Lattner2009-08-221-3/+3
| | | | llvm-svn: 79763
* Move the sjlj exception handling conversions to a back-end pass where theyJim Grosbach2009-08-171-1/+4
| | | | | | | | | more properly belong. This allows removing the front-end conditionalized SJLJ code, and cleans up the generated IR considerably. All of the infrastructure code (calling _Unwind_SjLj_Register/Unregister, etc) is added by the SjLjEHPrepare pass. llvm-svn: 79250
* Allow double defs in the machine code verifier after the addPreRegAlloc passes.Jakob Stoklund Olesen2009-08-151-1/+1
| | | | llvm-svn: 79095
* TargetRegistry: Change AsmPrinter constructor to be typed as returning anDaniel Dunbar2009-08-131-0/+1
| | | | | | AsmPrinter instance (instead of just a FunctionPass) llvm-svn: 78962
* TargetRegistry: Reorganize AsmPrinter construction so that clients pass in theDaniel Dunbar2009-08-131-1/+2
| | | | | | | | | TargetAsmInfo. This eliminates a dependency on TargetMachine.h from TargetRegistry.h, which technically was a layering violation. - Clients probably can only sensibly pass in the same TargetAsmInfo as the TargetMachine has, but there are only limited clients of this API. llvm-svn: 78928
* Change TargetAsmInfo to be constructed via TargetRegistry from a Target+TripleChris Lattner2009-08-121-0/+9
| | | | | | | | pair instead of from a virtual method on TargetMachine. This cuts the final ties of TargetAsmInfo to TargetMachine, meaning that MC can now use TargetAsmInfo. llvm-svn: 78802
* Tidy #includes.Dan Gohman2009-08-111-1/+0
| | | | llvm-svn: 78677
* SjLj based exception handling unwinding support. This patch is nasty, brutishJim Grosbach2009-08-111-3/+10
| | | | | | | | | | | | | and short. Well, it's kinda short. Definitely nasty and brutish. The front-end generates the register/unregister calls into the SjLj runtime, call-site indices and landing pad dispatch. The back end fills in the LSDA with the call-site information provided by the front end. Catch blocks are not yet implemented. Built on Darwin and verified no llvm-core "make check" regressions. llvm-svn: 78625
* Disable stack coloring with register for now. It's not able to set kill markers.Evan Cheng2009-08-051-1/+3
| | | | llvm-svn: 78179
* Reapply r77654 with a fix: MachineFunctionPass's getAnalysisUsageDan Gohman2009-07-311-15/+4
| | | | | | | | shouldn't do AU.setPreservesCFG(), because even though CodeGen passes don't modify the LLVM IR CFG, they may modify the MachineFunction CFG, and passes like MachineLoop are registered with isCFGOnly set to true. llvm-svn: 77691
* Revert r77654, it appears to be causing llvm-gcc bootstrap failures, and manyDaniel Dunbar2009-07-311-4/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | failures when building assorted projects with clang. --- Reverse-merging r77654 into '.': U include/llvm/CodeGen/Passes.h U include/llvm/CodeGen/MachineFunctionPass.h U include/llvm/CodeGen/MachineFunction.h U include/llvm/CodeGen/LazyLiveness.h U include/llvm/CodeGen/SelectionDAGISel.h D include/llvm/CodeGen/MachineFunctionAnalysis.h U include/llvm/Function.h U lib/Target/CellSPU/SPUISelDAGToDAG.cpp U lib/Target/PowerPC/PPCISelDAGToDAG.cpp U lib/CodeGen/LLVMTargetMachine.cpp U lib/CodeGen/MachineVerifier.cpp U lib/CodeGen/MachineFunction.cpp U lib/CodeGen/PrologEpilogInserter.cpp U lib/CodeGen/MachineLoopInfo.cpp U lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp D lib/CodeGen/MachineFunctionAnalysis.cpp D lib/CodeGen/MachineFunctionPass.cpp U lib/CodeGen/LiveVariables.cpp llvm-svn: 77661
* Manage MachineFunctions with an analysis Pass instead of the AnnotableDan Gohman2009-07-311-15/+4
| | | | | | | mechanism. To support this, make MachineFunctionPass a little more complete. llvm-svn: 77654
* We don't need to use llvm_report_error, this interface can deal with errorsDaniel Dunbar2009-07-151-2/+2
| | | | | | (although we don't get a very good error message). llvm-svn: 75864
* Add missing includes.Daniel Dunbar2009-07-151-0/+2
| | | | llvm-svn: 75862
* Lift addAssemblyEmitter into LLVMTargetMachine.Daniel Dunbar2009-07-151-0/+11
| | | | | | - No functionality change. llvm-svn: 75859
* Lift DumpAsm / -print-emitted-asm functionality into LLVMTargetMachine.Daniel Dunbar2009-07-151-5/+15
| | | | | | - No intended functionality change. llvm-svn: 75848
* Have asm printers use formatted_raw_ostream directly to avoid aDavid Greene2009-07-141-2/+2
| | | | | | dynamic_cast<>. llvm-svn: 75670
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