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* GlobalISel: implement legalization pass, with just one transformation.Tim Northover2016-07-226-4/+210
| | | | | | | | | This adds the actual MachineLegalizeHelper to do the work and a trivial pass wrapper that legalizes all instructions in a MachineFunction. Currently the only transformation supported is splitting up a vector G_ADD into one acting on smaller vectors. llvm-svn: 276461
* GlobalISel: implement alloca instructionTim Northover2016-07-222-1/+34
| | | | llvm-svn: 276433
* [IRTranslator] Add G_SUB opcode.Quentin Colombet2016-07-211-0/+2
| | | | | | This commit adds a generic SUB opcode to global-isel. llvm-svn: 276308
* [IRTranslator] Add comments to explain the ordering of the switch. NFC.Quentin Colombet2016-07-211-0/+3
| | | | | | Group arithmetic operations, bitwise operations, and branch operations. llvm-svn: 276305
* [IRTranslator] Add G_AND opcode.Quentin Colombet2016-07-211-0/+2
| | | | | | This commit adds a generic AND opcode to global-isel. llvm-svn: 276297
* GlobalISel: implement Legalization querying framework.Tim Northover2016-07-202-0/+129
| | | | | | | This adds an (incomplete, inefficient) framework for deciding what to do with some operation on a given type. llvm-svn: 276184
* GlobalISel: implement low-level type with just size & vector lanes.Tim Northover2016-07-203-42/+22
| | | | | | | | This should be all the low-level instruction selection needs to determine how to implement an operation, with the remaining context taken from the opcode (e.g. G_ADD vs G_FADD) or other flags not based on type (e.g. fast-math). llvm-svn: 276158
* [GlobalISel] Simplify more RegClassOrRegBank is+get. NFC.Ahmed Bougacha2016-07-191-5/+3
| | | | llvm-svn: 276011
* [GlobalISel] Fix #include ordering/spacing. NFC.Ahmed Bougacha2016-07-142-3/+2
| | | | llvm-svn: 275423
* GlobalISel: freeze reserved regs after IRTranslator.Tim Northover2016-07-121-0/+5
| | | | | | | | | | We can freeze the registers after the MachineFrameInfo has been configured (by telling it about calls, inline asm, ...). This doesn't happen at all yet, but will be part of IR translation. Fixes -verify-machineinstrs assertion. llvm-svn: 275221
* [IRTranslator] Support the translation of or.Quentin Colombet2016-06-101-0/+2
| | | | | | Now or instructions get translated into G_OR. llvm-svn: 272433
* [IRTranslator] Refactor to expose a translateBinaryOp method.Quentin Colombet2016-06-101-3/+3
| | | | | | | | This method will be used for every binary operation. NFC. llvm-svn: 272431
* [RegBankSelect] Print out the actual mapping of the operands.Quentin Colombet2016-06-081-0/+1
| | | | | | This improves the debuggability of the pass. llvm-svn: 272210
* [RegBankSelect] Remove a debug print of a potentially dead instruction.Quentin Colombet2016-06-081-2/+2
| | | | | | | | For complex rewrittings, which do not occur currently, the related machine instruction may have been deleted in the process. Therefore, do not try to print it after the mapping is applied. llvm-svn: 272209
* [RegisterBankInfo] Avoid code duplication in OperandsMapper for the ↵Quentin Colombet2016-06-081-6/+17
| | | | | | | | | | | | | computation of the end of range. Refactor the code so that we do not compute in two different places the end iterator for the range of new virtual registers for a given operand. Although this refactoring was intended as NFC, this is not the case because it actually fixes a bug where we were returning a range off by 1 (too long). Right now, this could not result in an actual bug because we were accessing this range via the BreakDown size of the related operand. llvm-svn: 272208
* [RegisterBankInfo] Add dump/print methods for OperandsMapper.Quentin Colombet2016-06-081-2/+55
| | | | | | Improve debuggability of the OperandsMapper helper class. llvm-svn: 272207
* [RegBankSelect] Silence an unused variable warning in release mode.Quentin Colombet2016-06-081-0/+1
| | | | llvm-svn: 272177
* [RegBankSelect] Comment on how we could improve repairing with copies.Quentin Colombet2016-06-081-0/+11
| | | | | | | | | | | When repairing with a copy, instead of accounting for the cost of that copy and actually inserting it, we may be able to use an alternative source for the register to repair and just use it. Make sure this is documented, so that we consider that opportunity at some point. llvm-svn: 272176
* [RegBankSelect] Use RegisterBankInfo applyMapping method.Quentin Colombet2016-06-081-11/+8
| | | | | | | The RegBankSelect pass can now rely on the target to do the remapping of the instructions. llvm-svn: 272169
* [RegisterBankInfo] Implement the method to apply a mapping.Quentin Colombet2016-06-081-0/+27
| | | | | | | | | Now, the target will be able to provide its how implementation to remap an instruction. This open the way to crazier optimizations, but to beginning with, we will be able to handle something else than the default mapping. llvm-svn: 272165
* [RegBankSelect] Use the OperandMapper class to hold remap information.Quentin Colombet2016-06-081-10/+8
| | | | | | | | | Now that we have an entity that hold the remap information the rewritting should be easier to do. No functional changes. llvm-svn: 272164
* [RegBankSelect] Use const_iterator instead of iterator for repairReg.Quentin Colombet2016-06-081-1/+1
| | | | | | | The repairing code has no reason to change the source or destination of the registers. llvm-svn: 272163
* [RegisterBankInfo] Introduce OperandsMapper class.Quentin Colombet2016-06-081-0/+90
| | | | | | | This helper class is used to encapsulate the necessary information to remap an instruction. llvm-svn: 272161
* [RegBankSelect] Introduce a command line option to override the running mode.Quentin Colombet2016-06-081-0/+14
| | | | | | | | | | When the command line option is set, it overrides any thing that the target may have set. The rationale is that we get what we asked for. Options are respectively regbankselect-fast and regbankselect-greedy for fast and greedy mode. llvm-svn: 272158
* [RegBankSelect] Explain what it would take to support non-copyQuentin Colombet2016-06-081-0/+9
| | | | | | | | | | | repairing. Copies are easy because we repair only when there is a mismatch. For non-copy repairing, i.e., cases that involves breaking down or gathering up the value, one of the operand may not have a register bank yet. Thus, derivate a cost from that, requires more work. llvm-svn: 272157
* [RegisterBankInfo] Add a size argument for the cost of copy.Quentin Colombet2016-06-081-1/+3
| | | | | | | The cost of a copy may be different based on how many bits we have to copy around. E.g., a 8-bit copy may be different than a 32-bit copy. llvm-svn: 272084
* [RegisterBankInfo] Move a hidden function into a static method. NFC.Quentin Colombet2016-06-081-24/+22
| | | | | | This will allow code reuse in the coming commits. llvm-svn: 272083
* [RegBankSelect] Compute the repairing cost for copies.Quentin Colombet2016-05-211-15/+40
| | | | | | | Prior to this patch, we were using 1 for all the repairing costs. Now, we use the information from the target to get this information. llvm-svn: 270304
* [RegBankSelect] Look for the best mapping in greedy mode.Quentin Colombet2016-05-201-10/+38
| | | | | | | | | The Fast mode takes the first mapping, the greedy mode loops over all the possible mapping for an instruction and choose the cheaper one. Test case will come with target specific code, since we currently do not have instructions that have several mappings. llvm-svn: 270249
* [RegBankSelect] Get rid of a now dead method: setSafeInsertPoint.Quentin Colombet2016-05-201-34/+0
| | | | | | This is now encapsulated in the RepairingPlacement class. llvm-svn: 270247
* [RegBankSelect] Take advantage of a potential best cost information inQuentin Colombet2016-05-201-3/+18
| | | | | | | | | | | | | computeMapping. Computing the cost of a mapping takes some time. Since in Fast mode, the cost is irrelevant, just spare some cycles by not computing it. In Greedy mode, we need to choose the best cost, that means that when the local cost gets more expensive than the best cost, we can stop computing the repairing and cost for the current mapping. llvm-svn: 270245
* [RegBankSelect] Use frequency and probability information to computeQuentin Colombet2016-05-201-7/+28
| | | | | | | | | more precise cost in Greedy mode. In Fast mode the cost is irrelevant so do not bother requiring that those passes get scheduled. llvm-svn: 270244
* [RegBankSelect] Use the Fast mode for functions with the optnone attribute.Quentin Colombet2016-05-201-0/+6
| | | | llvm-svn: 270242
* [RegBankSelect] Specify different optimization mode for the pass.Quentin Colombet2016-05-201-2/+4
| | | | | | The mode should be choose by the target when instantiating the pass. llvm-svn: 270235
* [RegBankSelect] Add a method to avoid splitting while repairing.Quentin Colombet2016-05-201-0/+125
| | | | | | | | | | | | The previous choice of the insertion points for repairing was straightfoward but may introduce some basic block or edge splitting. In some situation this is something we can avoid. For instance, when repairing a phi argument, instead of placing the repairing on the related incoming edge, we may move it to the previous block, before the terminators. This is only possible when the argument is not defined by one of the terminator. llvm-svn: 270232
* [RegBankSelect] Refactor the code to split the repairing and mapping ofQuentin Colombet2016-05-201-131/+209
| | | | | | | | | | | an instruction. Use the previously introduced RepairingPlacement class to split the code computing the repairing placement from the code doing the actual placement. That way, we will be able to consider different placement and then, only apply the best one. llvm-svn: 270168
* [RegBankSelect] Add helper class for repairing code placement.Quentin Colombet2016-05-201-1/+215
| | | | | | | | | | | | | | | | | | | | When assigning the register banks we may have to insert repairing code to move already assigned values accross register banks. Introduce a few helper classes to keep track of what is involved in the repairing of an operand: - InsertPoint and its derived classes record the positions, in the CFG, where repairing has to be inserted. - RepairingPlacement holds all the insert points for the repairing of an operand plus the kind of action that is required to do the repairing. This is going to be used to keep track of how the repairing should be done, while comparing different solutions for an instruction. Indeed, we will need the repairing placement to capture the cost of a solution and we do not want to compute it a second time when we do the actual repairing. llvm-svn: 270167
* [RegBankSelect] Refactor assignmentMatch to avoid testing the currentQuentin Colombet2016-05-201-4/+10
| | | | | | | | | | | | | | register bank twice. Prior to this change, we were checking if the assignment for the current machine operand was matching, then we would check if the mismatch requires to insert repair code. We actually already have this information from the first check, so just pass it along. NFCI. llvm-svn: 270166
* [RegBankSelect] Introduce MappingCost helper class.Quentin Colombet2016-05-201-1/+125
| | | | | | | | | | | | | This helper class will be used to represent the cost of mapping an instruction to a specific register bank. The particularity of these costs is that they are mostly local, thus the frequency of the basic block is irrelevant. However, for few instructions (e.g., phis and terminators), the cost may be non-local and then, we need to account for the frequency of the involved basic blocks. This will be used by the greedy mode I am working on. llvm-svn: 270163
* Fix -Wunused-variable in non-asserts build.Eric Liu2016-04-221-0/+1
| | | | llvm-svn: 267128
* Fix more -Wunused-variable in non-asserts build.David Blaikie2016-04-211-3/+2
| | | | llvm-svn: 267077
* Fix some -Wunused-variable warnings in non-asserts builds.David Blaikie2016-04-211-5/+6
| | | | llvm-svn: 267073
* [RegisterBankInfo] Change the API for the verify methods.Quentin Colombet2016-04-213-10/+15
| | | | | | | Return bool instead of void so that it is natural to put the calls into asserts. llvm-svn: 267033
* [RegisterBankInfo] Change the representation of the partial mappings.Quentin Colombet2016-04-212-33/+26
| | | | | | | | | Instead of holding a mask, hold two value: the start index and the length of the mapping. This is a more compact representation, although less powerful. That being said, arbitrary masks would not have worked for the generic so do not allow them in the first place. llvm-svn: 267025
* [GlobalISel] Coding style and whitespace fixesTom Stellard2016-04-141-2/+2
| | | | | | | | | | Reviewers: qcolombet Subscribers: joker.eph, llvm-commits, vkalintiris Differential Revision: http://reviews.llvm.org/D19119 llvm-svn: 266342
* [RegBankSelect] Teach the repairing code how to handle physicalQuentin Colombet2016-04-121-2/+6
| | | | | | registers. llvm-svn: 266029
* [RegisterBankInfo] Do not provide a default mapping for non-reg of phiQuentin Colombet2016-04-121-0/+7
| | | | | | operations. llvm-svn: 266027
* [RegBankSelect] Teach how to repair definitions.Quentin Colombet2016-04-121-13/+112
| | | | | | | | | Although repairing definitions is not mandatory for correctness (only phis would be impacted because of the RPO traversal), not repairing might go against the cost model. Therefore, just repair when it is possible. llvm-svn: 266025
* [RegBankSelect] Use reverse post order traversal.Quentin Colombet2016-04-081-2/+12
| | | | | | | | When assigning the register banks of an instruction, it is best to know all the constraints of the input to have a good idea of how this will impact the cost of the whole function. llvm-svn: 265812
* [RegisterBankInfo] Change the implementation for the default mapping.Quentin Colombet2016-04-081-1/+14
| | | | | | | | | | Do not give that much importance to the current register bank of an operand. This is likely just a side effect of the current execution and it is properly wise to prefer a register bank that can be extracted from the information available statically (like encoding constraints and type). llvm-svn: 265810
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