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* [ARM] GlobalISel: Lower double precision FP argsDiana Picus2017-02-161-2/+10
| | | | | | | | | | | | | | For the hard float calling convention, we just use the D registers. For the soft-fp calling convention, we use the R registers and move values to/from the D registers by means of G_SEQUENCE/G_EXTRACT. While doing so, we make sure to honor the endianness of the target, since the CCAssignFn doesn't do that for us. For pure soft float targets, we still bail out because we don't support the libcalls yet. llvm-svn: 295295
* GlobalISel: merge invoke and call translation paths.Tim Northover2017-01-311-1/+12
| | | | | | | | Well, sort of. But the lower-level code that invoke used to be using completely botched the handling of varargs functions, which hopefully won't be possible if they're using the same code. llvm-svn: 293670
* GlobalISel: correctly handle varargsTim Northover2017-01-171-3/+4
| | | | | | | | | | | | Some platforms (notably iOS) use a different calling convention for unnamed vs named parameters in varargs functions, so we need to keep track of this information when translating calls. Since not many platforms are involved, the guts of the special handling is in the ValueHandler class (with a generic implementation that should work for most targets). llvm-svn: 292283
* [GlobalISel] Move extendRegister where it belongs. NFCIDiana Picus2016-12-131-0/+29
| | | | | | Apparently I missed this one when I moved ValueHandler back in r288658. Sorry! llvm-svn: 289528
* GlobalISel: correctly handle small args via memory.Tim Northover2016-12-061-1/+1
| | | | | | | We were rounding size in bits down rather than up, leading to 0-sized slots for i1 (assert!) and bugs for other types not byte-aligned. llvm-svn: 288848
* GlobalISel: handle pointer arguments that get assigned to the stack.Tim Northover2016-12-051-1/+4
| | | | llvm-svn: 288717
* [GlobalISel] Extract handleAssignments out of AArch64CallLoweringDiana Picus2016-12-051-2/+38
| | | | | | | | | | | | This function seems target-independent so far: all the target-specific behaviour is isolated in the CCAssignFn and the ValueHandler (which we're also extracting into the generic CallLowering). The intention is to use this in the ARM backend. Differential Revision: https://reviews.llvm.org/D27045 llvm-svn: 288658
* GlobalISel: produce correct code for signext/zeroext ABI flags.Tim Northover2016-09-211-4/+67
| | | | | | | | We still don't really have an equivalent of "AssertXExt" in DAG, so we don't exploit the guarantees on the receiving side yet, but this should produce conservatively correct code on iOS ABIs. llvm-svn: 282069
* GlobalISel: split aggregates for PCS loweringTim Northover2016-09-201-2/+1
| | | | | | | | | | | This should match the existing behaviour for passing complicated struct and array types, in particular HFAs come through like that from Clang. For C & C++ we still need to somehow support all the weird ABI flags, or at least those that are present in the IR (signext, byval, ...), and stack-based parameter passing. llvm-svn: 281977
* GlobalISel: use G_TYPE to annotate physregs with a type.Tim Northover2016-08-311-3/+3
| | | | | | | | | | More preparation for dropping source types from MachineInstrs: regsters coming out of already-selected code (i.e. non-generic instructions) don't have a type, but that information is needed so we must add it manually. This is done via a new G_TYPE instruction. llvm-svn: 280292
* GlobalISel: rework CallLowering so that it can be used for libcalls too.Tim Northover2016-08-291-0/+40
There should be no functional change here, I'm just making the implementation of "frem" (to libcall) legalization easier for a followup. llvm-svn: 279987
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