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path: root/llvm/lib/CodeGen/CMakeLists.txt
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* re-land [ExpandMemCmp] Split ExpandMemCmp from CodeGen into its own pass."Clement Courbet2017-11-031-0/+1
* mir-canon: First commit.Puyan Lotfi2017-11-021-0/+1
* Revert "Correct dwarf unwind information in function epilogue for X86"Petar Jovanovic2017-11-011-1/+0
* Correct dwarf unwind information in function epilogue for X86Petar Jovanovic2017-11-011-0/+1
* Revert "TargetMachine: Merge TargetMachine and LLVMTargetMachine"Matthias Braun2017-10-121-2/+1
* TargetMachine: Merge TargetMachine and LLVMTargetMachineMatthias Braun2017-10-121-1/+2
* Update branch coalescing to be a PowerPC specific passLei Huang2017-09-121-1/+0
* Temporarily revert "Update branch coalescing to be a PowerPC specific pass"Eric Christopher2017-08-311-0/+1
* Update branch coalescing to be a PowerPC specific passLei Huang2017-08-231-1/+0
* Revert "r306529 - [X86] Correct dwarf unwind information in function epilogue"Daniel Jasper2017-06-291-2/+0
* [X86] Correct dwarf unwind information in function epiloguePetar Jovanovic2017-06-281-0/+2
* Recommit rL305677: [CodeGen] Add generic MacroFusion passFlorian Hahn2017-06-191-0/+1
* Revert r305677 [CodeGen] Add generic MacroFusion pass.Florian Hahn2017-06-191-1/+0
* [CodeGen] Add generic MacroFusion pass.Florian Hahn2017-06-191-0/+1
* Add LiveRangeShrink pass to shrink live range within BB.Dehao Chen2017-05-311-0/+1
* Revert r302938 "Add LiveRangeShrink pass to shrink live range within BB."Hans Wennborg2017-05-181-1/+0
* [X86] Relocate code of replacement of subtarget unsupported masked memory int...Ayman Musa2017-05-151-0/+1
* Add LiveRangeShrink pass to shrink live range within BB.Dehao Chen2017-05-121-0/+1
* Add a late IR expansion pass for the experimental reduction intrinsics.Amara Emerson2017-05-101-0/+1
* MachineFrameInfo: Move implementation to an own file; NFCMatthias Braun2017-04-261-0/+1
* [Outliner] Fixed Asan bot failure in r296418Jessica Paquette2017-03-061-0/+1
* Improve scheduling with branch coalescingNemanja Ivanovic2017-03-011-0/+1
* Revert "Add MIR-level outlining pass"Matthias Braun2017-02-281-1/+0
* Add MIR-level outlining passMatthias Braun2017-02-281-0/+1
* Add new pass LazyMachineBlockFrequencyInfoAdam Nemet2017-02-141-0/+1
* [CMake] Fix pthread handling for out-of-tree buildsEric Fiselier2017-02-101-1/+1
* [X86] Implement -mfentryNirav Dave2017-01-311-0/+1
* New OptimizationRemarkEmitter pass for MIRAdam Nemet2017-01-251-0/+1
* CodeGen: Add/Factor out LiveRegUnits class; NFCIMatthias Braun2017-01-201-0/+1
* Move DwarfGenerator.cpp to unittestsDaniel Jasper2016-12-081-1/+0
* Make a DWARF generator so we can unit test DWARF APIs with gtest.Greg Clayton2016-12-081-0/+1
* TargetSubtargetInfo: Move implementation to lib/CodeGen; NFCMatthias Braun2016-11-221-0/+1
* [CMake] NFC. Updating CMake dependency specificationsChris Bieneman2016-11-171-2/+3
* Move AArch64BranchRelaxation to generic codeMatt Arsenault2016-10-061-0/+1
* Add a counter-function insertion passHal Finkel2016-09-011-0/+1
* [GlobalISel] Add a fallback path to SDISel.Quentin Colombet2016-08-271-0/+1
* CodeGen: Remove MachineFunctionAnalysis => Enable (Machine)ModulePassesMatthias Braun2016-08-241-1/+0
* Revert r279564. It introduces undefined behavior (binding a reference to aRichard Smith2016-08-231-0/+1
* CodeGen: Remove MachineFunctionAnalysis => Enable (Machine)ModulePassesMatthias Braun2016-08-231-1/+0
* Revert "(HEAD -> master, origin/master, origin/HEAD) CodeGen: Remove MachineF...Matthias Braun2016-08-231-0/+1
* CodeGen: Remove MachineFunctionAnalysis => Enable (Machine)ModulePassesMatthias Braun2016-08-231-1/+0
* Revert "RegScavenging: Add scavengeRegisterBackwards()"Matthias Braun2016-08-191-1/+0
* CodeGen: Add/Factor out LiveRegUnits class; NFCIMatthias Braun2016-08-181-0/+1
* MachinePipeliner pass that implements Swing Modulo SchedulingBrendon Cahoon2016-07-291-0/+1
* GlobalISel: implement low-level type with just size & vector lanes.Tim Northover2016-07-201-0/+1
* XRay: Add entry and exit sledsDean Michael Berris2016-07-141-0/+1
* StackColoring for SafeStack.Evgeniy Stepanov2016-06-291-0/+2
* Interprocedural Register Allocation (IPRA): add a Transformation PassMehdi Amini2016-06-101-0/+1
* Interprocedural Register Allocation (IPRA) AnalysisMehdi Amini2016-06-101-0/+2
* CodeGen: Refactor renameDisconnectedComponents() as a passMatthias Braun2016-05-311-0/+1
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