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path: root/llvm/lib/Analysis/TargetTransformInfo.cpp
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* [IR] move shuffle mask queries from TTI to ShuffleVectorInstSanjay Patel2018-06-191-168/+18
* Fix namespaces. No functionality change.Benjamin Kramer2018-06-161-1/+1
* [CostModel] Cleanup isSingleSourceVectorMask to match other shuffle matchers....Simon Pilgrim2018-06-141-10/+12
* [CostModel] Recognise REVERSE shuffle mask if the elements come from the seco...Simon Pilgrim2018-06-141-4/+11
* [CostModel] Recognise BROADCAST shuffle mask if the elements come from the se...Simon Pilgrim2018-06-131-4/+11
* [CostModel] Replace ShuffleKind::SK_Alternate with ShuffleKind::SK_Select (PR...Simon Pilgrim2018-06-121-19/+15
* Fix signed/unsigned warning. NFCI.Simon Pilgrim2018-06-121-2/+2
* [CostModel] Treat Identity shuffle masks as zero costSimon Pilgrim2018-06-121-0/+20
* [TTI] Add uniform/non-uniform constant Pow2 detection to TargetTransformInfo:...Simon Pilgrim2018-05-221-13/+28
* Remove \brief commands from doxygen comments.Adrian Prantl2018-05-011-1/+1
* [TTI, AArch64] Add transpose shuffle kindMatthew Simpson2018-04-261-10/+74
* [LV] Introduce TTI::getMinimumVFKrzysztof Parzyszek2018-04-131-0/+4
* Plumb useAA through TargetTransformInfo to remove Transforms->CodeGen header ...David Blaikie2018-03-281-0/+2
* [LV] Add TTI::shouldMaximizeVectorBandwidth to allow enabling it per targetKrzysztof Parzyszek2018-03-271-0/+4
* [LSR] Allow giving priority to post-incrementing addressing modesKrzysztof Parzyszek2018-03-261-0/+14
* [LoopStrengthReduce, x86] don't add cost for a cmp that will be macro-fused (...Sanjay Patel2018-02-051-0/+4
* Re-commit : [PowerPC] Add handling for ColdCC calling convention and a pass t...Zaara Syeda2018-01-301-0/+4
* Revert [PowerPC] This reverts commit rL322721Zaara Syeda2018-01-171-4/+0
* [PowerPC] Add handling for ColdCC calling convention and a pass to markZaara Syeda2018-01-171-0/+4
* Revert r321377, it causes regression to https://reviews.llvm.org/P8055.Guozhi Wei2017-12-281-4/+0
* [SimplifyCFG] Don't do if-conversion if there is a long dependence chainGuozhi Wei2017-12-221-0/+4
* [Memcpy Loop Lowering] Remove the fixed int8 lowering.Sean Fertile2017-12-181-9/+0
* [PartiallyInlineLibCalls][x86] add TTI hook to allow sqrt inlining to depend ...Sanjay Patel2017-11-271-0/+4
* [CodeGen][ExpandMemcmp] Allow memcmp to expand to vector loads (2).Clement Courbet2017-10-301-2/+3
* [NVPTX] allow address space inference for volatile loads/stores.Artem Belevich2017-10-241-0/+5
* Revert r314923: "Recommit : Use the basic cost if a GEP is not used as addres...Daniel Jasper2017-10-131-5/+0
* Recommit : Use the basic cost if a GEP is not used as addressing modeJun Bum Lim2017-10-041-0/+5
* Revert "Use the basic cost if a GEP is not used as addressing mode"Alex Shlyapnikov2017-09-291-5/+0
* Use the basic cost if a GEP is not used as addressing modeJun Bum Lim2017-09-291-0/+5
* [CodeGenPrepare][NFC] Rename TargetTransformInfo::expandMemCmp -> TargetTrans...Clement Courbet2017-09-251-2/+2
* [DivRempairs] add a pass to optimize div/rem pairs (PR31028)Sanjay Patel2017-09-091-0/+4
* [TargetTransformInfo] Add a new public interface getInstructionCostGuozhi Wei2017-09-081-0/+557
* [SLP] Support for horizontal min/max reduction.Alexey Bataev2017-09-081-0/+9
* Model cache size and associativity in TargetTransformInfoTobias Grosser2017-08-241-0/+10
* [LSR / TTI / SystemZ] Eliminate TargetTransformInfo::isFoldableMemAccess()Jonas Paulsson2017-08-091-5/+0
* [Cost] Rename getReductionCost() to getArithmeticReductionCost(), NFC.Alexey Bataev2017-07-311-3/+3
* [TTI] fixing a bug in the isLegalMaskedScatter APIMohammed Agabaria2017-07-271-1/+1
* [SystemZ, LoopStrengthReduce]Jonas Paulsson2017-07-211-2/+7
* [TTI] Refine the cost of EXT in getUserCost()Haicheng Wu2017-07-151-0/+5
* Extend memcpy expansion in Transform/Utils to handle wider operand types.Sean Fertile2017-07-071-0/+25
* [TargetTransformInfo, API] Add a list of operands to TTI::getUserCostEvgeny Astigeevich2017-06-291-2/+3
* [LoopUnroll] Pass SCEV to getUnrollingPreferences hook. NFCI.Geoff Berry2017-06-281-2/+2
* DivergencyAnalysis patch for reviewAlexander Timofeev2017-06-151-0/+4
* [Atomics][LoopIdiom] Recognize unordered atomic memcpyAnna Thomas2017-06-061-0/+4
* Fix PR23384 (part 2 of 3) NFCEvgeny Stupachenko2017-06-051-0/+4
* [PPC] Inline expansion of memcmpZaara Syeda2017-05-311-0/+4
* [LoopVectorizer] Let target prefer scalar addressing computations.Jonas Paulsson2017-05-241-0/+4
* [SLP] Enable 64-bit wide vectorization on AArch64Adam Nemet2017-05-151-0/+4
* Add a late IR expansion pass for the experimental reduction intrinsics.Amara Emerson2017-05-101-0/+3
* Introduce experimental generic intrinsics for horizontal vector reductions.Amara Emerson2017-05-091-0/+6
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