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* [globalisel][docs] Rework GMIR documentation and add an early GenericOpcode ↵Daniel Sanders2019-11-051-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | reference Summary: Rework the GMIR documentation to focus more on the end user than the implementation and tie it in to the MIR document. There was also some out-of-date information which has been removed. The quality of the GenericOpcode reference is highly variable and drops sharply as I worked through them all but we've got to start somewhere :-). It would be great if others could expand on this too as there is an awful lot to get through. Also fix a typo in the definition of G_FLOG. Previously, the comments said we had two base-2's (G_FLOG and G_FLOG2). Reviewers: aemerson, volkan, rovka, arsenm Reviewed By: rovka Subscribers: wdng, arphaman, jfb, Petar.Avramovic, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D69545
* [LLVM][Alignment] Make functions using log of alignment explicitGuillaume Chatelet2019-09-051-3/+9
| | | | | | | | | | | | | | | | | | | | | Summary: This patch renames functions that takes or returns alignment as log2, this patch will help with the transition to llvm::Align. The renaming makes it explicit that we deal with log(alignment) instead of a power of two alignment. A few renames uncovered dubious assignments: - `MirParser`/`MirPrinter` was expecting powers of two but `MachineFunction` and `MachineBasicBlock` were using deal with log2(align). This patch fixes it and updates the documentation. - `MachineBlockPlacement` exposes two flags (`align-all-blocks` and `align-all-nofallthru-blocks`) supposedly interpreted as power of two alignments, internally these values are interpreted as log2(align). This patch updates the documentation, - `MachineFunctionexposes` exposes `align-all-functions` also interpreted as power of two alignment, internally this value is interpreted as log2(align). This patch updates the documentation, Reviewers: lattner, thegameg, courbet Subscribers: dschuff, arsenm, jyknight, dylanmckay, sdardis, nemanjai, jvesely, nhaehnle, javed.absar, hiraditya, kbarton, fedor.sergeev, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, MaskRay, zzheng, edward-jones, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, dexonsmith, PkmX, jocewei, jsji, Jim, s.egerton, llvm-commits, courbet Tags: #llvm Differential Revision: https://reviews.llvm.org/D65945 llvm-svn: 371045
* [MachineFunction] Base support for call site info trackingDjordje Todorovic2019-06-271-0/+7
| | | | | | | | | | | | | | Add an attribute into the MachineFunction that tracks call site info. ([8/13] Introduce the debug entry values.) Co-authored-by: Ananth Sowda <asowda@cisco.com> Co-authored-by: Nikola Prica <nikola.prica@rt-rk.com> Co-authored-by: Ivan Baev <ibaev@cisco.com> Differential Revision: https://reviews.llvm.org/D61061 llvm-svn: 364506
* MIR: Add method to stop after specific runs of passesMatt Arsenault2018-12-041-0/+5
| | | | | | | | | | Currently if you use -{start,stop}-{before,after}, it picks the first instance with the matching pass name. If you run the same pass multiple times, there's no way to distinguish them. Allow specifying a run index wih ,N to specify which you mean. llvm-svn: 348285
* [x86/MIR] Implement support for pre- and post-instruction symbols, asChandler Carruth2018-08-161-7/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | well as MIR parsing support for `MCSymbol` `MachineOperand`s. The only real way to test pre- and post-instruction symbol support is to use them in operands, so I ended up implementing that within the patch as well. I can split out the operand support if folks really want but it doesn't really seem worth it. The functional implementation of pre- and post-instruction symbols is now *completely trivial*. Two tiny bits of code in the (misnamed) AsmPrinter. It should be completely target independent as well. We emit these exactly the same way as we emit basic block labels. Most of the code here is to give full dumping, MIR printing, and MIR parsing support so that we can write useful tests. The MIR parsing of MC symbol operands still isn't 100%, as it forces the symbols to be non-temporary and non-local symbols with names. However, those names often can encode most (if not all) of the special semantics desired, and unnamed symbols seem especially annoying to serialize and de-serialize. While this isn't perfect or full support, it seems plenty to write tests that exercise usage of these kinds of operands. The MIR support for pre-and post-instruction symbols was quite straightforward. I chose to print them out in an as-if-operand syntax similar to debug locations as this seemed the cleanest way and let me use nice introducer tokens rather than inventing more magic punctuation like we use for memoperands. However, supporting MIR-based parsing of these symbols caused me to change the design of the symbol support to allow setting arbitrary symbols. Without this, I don't see any reasonable way to test things with MIR. Differential Revision: https://reviews.llvm.org/D50833 llvm-svn: 339962
* [NFC] fix trivial typos in documentsHiroshi Inoue2018-06-151-1/+1
| | | | llvm-svn: 334799
* Updating MIR Language Reference to include new syntax for symbols and physregs.Puyan Lotfi2018-03-121-32/+32
| | | | | | | External symbols now get the sigil '&' while physical registers get the sigil '$' for their prefix. llvm-svn: 327276
* [MIR] Update MIRLangRef with documentation on bundled instructionsFrancis Visoiu Mistrih2018-01-101-1/+15
| | | | | | Differential Revision: https://reviews.llvm.org/D41872 llvm-svn: 322198
* [MIR] Add support for the frame-destroy MachineInstr flagFrancis Visoiu Mistrih2018-01-091-1/+6
| | | | | | | | | We are printing / parsing the `frame-setup` MachineInstr flag but not the `frame-destroy` one. Differential Revision: https://reviews.llvm.org/D41509 llvm-svn: 322071
* [CodeGen] Move printing MO_IntrinsicID operands to MachineOperand::printFrancis Visoiu Mistrih2017-12-191-0/+12
| | | | | | | Work towards the unification of MIR and debug output by refactoring the interfaces. llvm-svn: 321112
* [CodeGen] Move printing MO_IntrinsicID operands to MachineOperand::printFrancis Visoiu Mistrih2017-12-191-0/+11
| | | | | | | | | | Work towards the unification of MIR and debug output by refactoring the interfaces. Also add support for printing with a null TargetIntrinsicInfo and no MachineFunction. llvm-svn: 321111
* [CodeGen] Move printing MO_CFIIndex operands to MachineOperand::printFrancis Visoiu Mistrih2017-12-191-1/+21
| | | | | | | | | | Work towards the unification of MIR and debug output by refactoring the interfaces. Before this patch we printed "<call frame instruction>" in the debug output. llvm-svn: 321084
* [CodeGen] Print MCSymbol operands as <mcsymbol sym> in both MIR and debug outputFrancis Visoiu Mistrih2017-12-141-0/+13
| | | | | | | | | Work towards the unification of MIR and debug output by printing `<mcsymbol sym>` instead of `<MCSym=sym>`. Only debug syntax is affected. llvm-svn: 320685
* [CodeGen] Print external symbols as $symbol in both MIR and debug outputFrancis Visoiu Mistrih2017-12-141-2/+15
| | | | | | | | | Work towards the unification of MIR and debug output by printing `$symbol` instead of `<es:symbol>`. Only debug syntax is affected. llvm-svn: 320681
* [CodeGen] Print jump-table index operands as %jump-table.0 in both MIR and ↵Francis Visoiu Mistrih2017-12-131-2/+35
| | | | | | | | | | debug output Work towards the unification of MIR and debug output by printing `%jump-table.0` instead of `<jt#0>`. Only debug syntax is affected. llvm-svn: 320566
* [CodeGen] Print target index operands as target-index(target-specific) + 8 ↵Francis Visoiu Mistrih2017-12-131-1/+15
| | | | | | | | | | in both MIR and debug output Work towards the unification of MIR and debug output by printing `target-index(target-specific) + 8` instead of `<ti#0+8>` and `target-index(target-specific) + 8` instead of `<ti#0-8>`. Only debug syntax is affected. llvm-svn: 320565
* [CodeGen] Print constant pool index operands as %const.0 + 8 in both MIR and ↵Francis Visoiu Mistrih2017-12-131-2/+47
| | | | | | | | | | | | | | debug output Work towards the unification of MIR and debug output by printing `%const.0 + 8` instead of `<cp#0+8>` and `%const.0 - 8` instead of `<cp#0-8>`. Only debug syntax is affected. Differential Revision: https://reviews.llvm.org/D41116 llvm-svn: 320564
* [MachineOperand][MIR] Add isRenamable to MachineOperand.Geoff Berry2017-12-121-0/+3
| | | | | | | | | | | | | | | | | | Summary: Add isRenamable() predicate to MachineOperand. This predicate can be used by machine passes after register allocation to determine whether it is safe to rename a given register operand. Register operands that aren't marked as renamable may be required to be assigned their current register to satisfy constraints that are not captured by the machine IR (e.g. ABI or ISA constraints). Reviewers: qcolombet, MatzeB, hfinkel Subscribers: nemanjai, mcrosier, javed.absar, llvm-commits Differential Revision: https://reviews.llvm.org/D39400 llvm-svn: 320503
* [CodeGen] Move printing MO_Immediate operands to MachineOperand::printFrancis Visoiu Mistrih2017-12-081-0/+29
| | | | | | | | | | | | Work towards the unification of MIR and debug output by refactoring the interfaces. Add support for operand subreg index as an immediate to debug printing and use ::print in the MIRPrinter. Differential Review: https://reviews.llvm.org/D40965 llvm-svn: 320209
* [CodeGen] Move printing MO_CImmediate operands to MachineOperand::printFrancis Visoiu Mistrih2017-12-081-1/+5
| | | | | | | Work towards the unification of MIR and debug output by refactoring the interfaces. llvm-svn: 320140
* [CodeGen] Unify MBB reference format in both MIR and debug outputFrancis Visoiu Mistrih2017-12-041-2/+14
| | | | | | | | | | | | | | | | As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665
* MIParser/MIRPrinter: Compute block successors if not explicitely specifiedMatthias Braun2017-05-051-0/+2
| | | | | | | | | | | | | | | | | - MIParser: If the successor list is not specified successors will be added based on basic block operands in the block and possible fallthrough. - MIRPrinter: Adds a new `simplify-mir` option, with that option set: Skip printing of block successor lists in cases where the parser is guaranteed to reconstruct it. This means we still print the list if some successor cannot be determined (happens for example for jump tables), if the successor order changes or branch probabilities being unequal. Differential Revision: https://reviews.llvm.org/D31262 llvm-svn: 302289
* MIRLangRef: Add a section on simplifying .mir testsMatthias Braun2017-04-131-0/+47
| | | | | | Differential Revision: http://reviews.llvm.org/D32058 llvm-svn: 300282
* MIRLangRef: Simplify/update documentationMatthias Braun2017-04-131-15/+16
| | | | | | | | | | | - Refer to options by `-option` instead of `option` - Use `-mtriple=` instead of `-march` in the example (-march will still target the default operating system which is usually not what you want in a test) - Rephrase sentence because output does not go to stdout by default (you need -o - for that as should be expected). llvm-svn: 300268
* [docs] Fixing Sphinx warnings to unclog the buildbotRenato Golin2016-07-201-22/+20
| | | | | | | | | | | | | | | | | | | | | | | Lots of blocks had "llvm" or "nasm" syntax types but either weren't following the syntax, or the syntax has changed (and sphinx hasn't keep up) or the type doesn't even exist (nasm?). Other documents had :options: what were invalid. I only removed those that had warnings, and left the ones that didn't, in order to follow the principle of least surprise. This is like this for ages, but the buildbot is now failing on errors. It may take a while to upgrade the buildbot's sphinx, if that's even possible, but that shouldn't stop us from getting docs updates (which seem down for quite a while). Also, we're not losing any syntax highlight, since when it doesn't parse, it doesn't colour. Ie. those blocks are not being highlighted anyway. I'm trying to get all docs in one go, so that it's easy to revert later if we do fix, or at least easy to know what's to fix. llvm-svn: 276109
* MIRLangRef: Add documentation for the subregister indices.Alex Lorenz2015-09-081-2/+19
| | | | llvm-svn: 247005
* MIRLangRef: Add documentation for the global value machine operands.Alex Lorenz2015-09-081-1/+22
| | | | llvm-svn: 247004
* MIRLangRef: Add 'MIR Testing Guide' section.Alex Lorenz2015-08-211-0/+63
| | | | llvm-svn: 245757
* MIRLangRef: Describe the syntax for the immediate operands, register values,Alex Lorenz2015-08-211-6/+133
| | | | | | register operands and register flags. llvm-svn: 245738
* MIRLangRef: Describe the syntax for machine instruction names and flags.Alex Lorenz2015-08-211-1/+40
| | | | llvm-svn: 245710
* MIRLangRef: Describe the syntax that is used to represent machine basic blocks.Alex Lorenz2015-08-151-2/+111
| | | | llvm-svn: 245138
* Update MIRLangRef for MIR syntax change from r244982.Alex Lorenz2015-08-141-16/+11
| | | | llvm-svn: 244996
* Add initial documentation for the MIR serialization format.Alex Lorenz2015-08-061-0/+124
Differential Revision: http://reviews.llvm.org/D11736 llvm-svn: 244292
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