summaryrefslogtreecommitdiffstats
path: root/lldb/tools/debugserver/source/MacOSX/arm
Commit message (Collapse)AuthorAgeFilesLines
* typedef enum -> enumFangrui Song2019-05-141-2/+2
| | | | | | | | Reviewed By: labath Differential Revision: https://reviews.llvm.org/D61883 llvm-svn: 360654
* [NFC] Remove ASCII lines from commentsJonas Devlieghere2019-04-101-4/+0
| | | | | | | | | | | | | | | | | | | | | | | A lot of comments in LLDB are surrounded by an ASCII line to delimit the begging and end of the comment. Its use is not really consistent across the code base, sometimes the lines are longer, sometimes they are shorter and sometimes they are omitted. Furthermore, it looks kind of weird with the 80 column limit, where the comment actually extends past the line, but not by much. Furthermore, when /// is used for Doxygen comments, it looks particularly odd. And when // is used, it incorrectly gives the impression that it's actually a Doxygen comment. I assume these lines were added to improve distinguishing between comments and code. However, given that todays editors and IDEs do a great job at highlighting comments, I think it's worth to drop this for the sake of consistency. The alternative is fixing all the inconsistencies, which would create a lot more churn. Differential revision: https://reviews.llvm.org/D60508 llvm-svn: 358135
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-192-8/+6
| | | | | | | | | | | | | | | | | to reflect the new license. We understand that people may be surprised that we're moving the header entirely to discuss the new license. We checked this carefully with the Foundation's lawyer and we believe this is the correct approach. Essentially, all code in the project is now made available by the LLVM project under our new license, so you will see that the license headers include that license only. Some of our contributors have contributed code under our old license, and accordingly, we have retained a copy of our old license notice in the top-level files in each project and repository. llvm-svn: 351636
* Rename Error -> Status.Zachary Turner2017-05-121-2/+2
| | | | | | | | | | | | | | | This renames the LLDB error class to Status, as discussed on the lldb-dev mailing list. A change of this magnitude cannot easily be done without find and replace, but that has potential to catch unwanted occurrences of common strings such as "Error". Every effort was made to find all the obvious things such as the word "Error" appearing in a string, etc, but it's possible there are still some lingering occurences left around. Hopefully nothing too serious. llvm-svn: 302872
* *** This commit represents a complete reformatting of the LLDB source codeKate Stone2016-09-062-2073/+2098
| | | | | | | | | | | | | | | | | | | | | | | *** to conform to clang-format’s LLVM style. This kind of mass change has *** two obvious implications: Firstly, merging this particular commit into a downstream fork may be a huge effort. Alternatively, it may be worth merging all changes up to this commit, performing the same reformatting operation locally, and then discarding the merge for this particular commit. The commands used to accomplish this reformatting were as follows (with current working directory as the root of the repository): find . \( -iname "*.c" -or -iname "*.cpp" -or -iname "*.h" -or -iname "*.mm" \) -exec clang-format -i {} + find . -iname "*.py" -exec autopep8 --in-place --aggressive --aggressive {} + ; The version of clang-format used was 3.9.0, and autopep8 was 1.2.4. Secondly, “blame” style tools will generally point to this commit instead of a meaningful prior commit. There are alternatives available that will attempt to look through this change and find the appropriate prior commit. YMMV. llvm-svn: 280751
* A partner to the cleanup in r247741, change the variables names inJason Molenda2015-09-151-3/+3
| | | | | | | | | | | | | | debugserver to match. "gcc" is now "ehframe" and "gdb" is now "debugserver". Because this is debugserver, what we call the Process Plugin register numbers up in lldb are the debugserver register numbers down here - they are the register numbers that debugserver will use to refer to these registers over the gdb-remote protocol. debugserver was already reporting the registers with the key "ehframe"; this change is just cleaning up the internal variable names to match. llvm-svn: 247751
* Add UNUSED_IF_ASSERT_DISABLED and apply it.Bruce Mitchener2015-07-241-2/+2
| | | | | | | | | | | | | | | Summary: This replaces (void)x; usages where they x was subsequently involved in an assertion with this macro to make the intent more clear. Reviewers: clayborg Subscribers: lldb-commits Differential Revision: http://reviews.llvm.org/D11451 llvm-svn: 243074
* Fix warnings.Bruce Mitchener2015-07-222-2/+4
| | | | | | | | | | Reviewers: clayborg Subscribers: lldb-commits Differential Revision: http://reviews.llvm.org/D11404 llvm-svn: 242913
* Fix debugserver warnings on MacOSX.Greg Clayton2015-03-092-4/+4
| | | | llvm-svn: 231692
* Add comments explaining the unwind setup inJason Molenda2015-01-161-0/+22
| | | | | | | | | ABIMacOSX_i386::CreateFunctionEntryUnwindPlan, ABIMacOSX_i386::CreateDefaultUnwindPlan, ABISysV_x86_64::CreateFunctionEntryUnwindPlan, ABISysV_x86_64::CreateDefaultUnwindPlan llvm-svn: 226347
* Fixes to DNBArchImpl in debugserver to correctly get/setJason Molenda2015-01-162-11/+187
| | | | | | | | | | | | | the register state when debugging AArch32 programs (armv7 programs running on an armv8 processor). Most notably, there is no "fpscr" register in the register context - there is an fpsr and an fpcr. Also fix a bug where the floating point values could not be written in armv7 processes. <rdar://problem/18977767> llvm-svn: 226244
* Handle thumb IT instructions correctly all the time.Greg Clayton2014-12-091-3/+13
| | | | | | | | | | | | | | | | | | | | | | The issue with Thumb IT (if/then) instructions is the IT instruction preceeds up to four instructions that are made conditional. If a breakpoint is placed on one of the conditional instructions, the instruction either needs to match the thumb opcode size (2 or 4 bytes) or a BKPT instruction needs to be used as these are always unconditional (even in a IT instruction). If BKPT instructions are used, then we might end up stopping on an instruction that won't get executed. So if we do stop at a BKPT instruction, we need to continue if the condition is not true. When using the BKPT isntructions are easy in that you don't need to detect the size of the breakpoint that needs to be used when setting a breakpoint even in a thumb IT instruction. The bad part is you will now always stop at the opcode location and let LLDB determine if it should auto-continue. If the BKPT instruction is used, the BKPT that is used for ARM code should be something that also triggers the BKPT instruction in Thumb in case you set a breakpoint in the middle of code and the code is actually Thumb code. A value of 0xE120BE70 will work since the lower 16 bits being 0xBE70 happens to be a Thumb BKPT instruction. The alternative is to use trap or illegal instructions that the kernel will translate into breakpoint hits. On Mac this was 0xE7FFDEFE for ARM and 0xDEFE for Thumb. The darwin kernel currently doesn't recognize any 32 bit Thumb instruction as a instruction that will get turned into a breakpoint exception (EXC_BREAKPOINT), so we had to use the BKPT instruction on Mac. The linux kernel recognizes a 16 and a 32 bit instruction as valid thumb breakpoint opcodes. The benefit of using 16 or 32 bit instructions is you don't stop on opcodes in a IT block when the condition doesn't match. To further complicate things, single stepping on ARM is often implemented by modifying the BCR/BVR registers and setting the processor to stop when the PC is not equal to the current value. This means single stepping is another way the ARM target can stop on instructions that won't get executed. This patch does the following: 1 - Fix the internal debugserver for Apple to use the BKPT instruction for ARM and Thumb 2 - Fix LLDB to catch when we stop in the middle of a Thumb IT instruction and continue if we stop at an instruction that won't execute 3 - Fixes this in a way that will work for any target on any platform as long as it is ARM/Thumb 4 - Adds a patch for ignoring conditions that don't match when in ARM mode (see below) This patch also provides the code that implements the same thing for ARM instructions, though it is disabled for now. The ARM patch will check the condition of the instruction in ARM mode and continue if the condition isn't true (and therefore the instruction would not be executed). Again, this is not enable, but the code for it has been added. <rdar://problem/19145455> llvm-svn: 223851
* __arm64__ and __aarch64__ #ifdef adjustmentsTodd Fiala2014-07-092-10/+10
| | | | | | | | Change by Paul Osmialowski See http://reviews.llvm.org/D4379 for details. llvm-svn: 212583
* Fix typos.Bruce Mitchener2014-07-081-2/+2
| | | | llvm-svn: 212553
* Revert the debugserver part of r211868. While formally a fine change, ↵Jim Ingham2014-06-271-6/+4
| | | | | | | | | debugserver doesn't depend on llvm (it really doesn't even depend on anything in lldb) and this nicety isn't worth adding that dependence. llvm-svn: 211903
* lldb: remove adhoc implementation of array_sizeofSaleem Abdulrasool2014-06-271-4/+6
| | | | | | | | Replace adhoc inline implementation of llvm::array_lengthof in favour of the implementation in LLVM. This is simply a cleanup change, no functional change intended. llvm-svn: 211868
* Correct offsets in the debugserver arm back end for the s and d registers so ↵Jason Molenda2014-04-301-4/+4
| | | | | | | | | we get the offsets of these correct after the changes of r194302. <rdar://problem/16176270> llvm-svn: 207600
* lldb arm64 import.Jason Molenda2014-03-292-111/+225
| | | | | | | | | | | | | | | | These changes were written by Greg Clayton, Jim Ingham, Jason Molenda. It builds cleanly against TOT llvm with xcodebuild. I updated the cmake files by visual inspection but did not try a build. I haven't built these sources on any non-Mac platforms - I don't think this patch adds any code that requires darwin, but please let me know if I missed something. In debugserver, MachProcess.cpp and MachTask.cpp were renamed to MachProcess.mm and MachTask.mm as they picked up some new Objective-C code needed to launch processes when running on iOS. llvm-svn: 205113
* Fixes to get the arm native debugserver building again.Jason Molenda2013-11-212-7/+14
| | | | | | Fix a small typeo in the i386/x86_64 debugserver plugins. llvm-svn: 195308
* <rdar://problem/15172417>Greg Clayton2013-11-132-0/+54
| | | | | | | | | | | | | | | Added two new GDB server packets to debugserver: "QSaveRegisterState" and "QRestoreRegiterState". "QSaveRegisterState" makes the remote GDB server save all register values and it returns a save identifier as an unsigned integer. This packet can be used prior to running expressions to save all registers. All registers can them we later restored with "QRestoreRegiterState:SAVEID" what SAVEID is the integer identifier that was returned from the call to QSaveRegisterState. Cleaned up redundant code in lldb_private::Thread, lldb_private::ThreadPlanCallFunction. Moved the lldb_private::Thread::RegisterCheckpoint into its own header file and it is now in the lldb_private namespace. Trimmed down the RegisterCheckpoint class to omit stuff that wasn't used (the stack ID). Added a few new virtual methods to lldb_private::RegisterContext that allow subclasses to efficiently save/restore register states and changed the RegisterContextGDBRemote to take advantage of these new calls. llvm-svn: 194621
* Fixed up registers in debugserver.Greg Clayton2013-11-091-76/+85
| | | | | | | | | | | | - removed all gaps from the g/G packets - optimized registers for x86_64 to not send/receive xmm0-xmm15 as well as ymm0-ymm15, now we only send ymm0-15 and xmm0-15 are now pseudo regs - Fixed x86_64 floating point register gaps - Fixed x86_64 so that xmm8-xmm15 don't overlap with ymm0-ymm3. This could lead to bad values showing in the debugger and was due to bad register info structure contents - Fixed i386 so we only send ymm0-ymm7 and xmm0-xmm7 are now pseudo regs. - Fixed ARM register definitions to not have any gaps - Fixed it so value registers and invalidation registers are specified using register names which avoid games we had to play with register numbering in the ARM plugin. llvm-svn: 194302
* Didn't get the right version of these files in the checkin for r186132.Jim Ingham2013-07-182-17/+18
| | | | llvm-svn: 186596
* Get debugserver to call task_set_state to prime the control registers so ↵Jim Ingham2013-07-112-41/+19
| | | | | | | | | | | | | that watchpoints take for threads created while the program is running. Remove the testcase skips from TestConcurrentEvents.py, since they all pass now, and fix TestWatchpointMultipleThreads.py - which should have caught this problem - so it doesn't artificially break on new thread creation before the watchpoint triggers. llvm.org/pr16566 <rdar://problem/14383244> llvm-svn: 186132
* Remove some unnecessary uses of nub_break_t in the arm specificJason Molenda2013-06-252-73/+1
| | | | | | | | | support files for debugserver to fix a build failure for arm. Also remove some of the code used for software-driven single instruction stepping; this is slowly being yanked out and these particular bits overlap with the nub_break_t going away. llvm-svn: 184828
* Various fixes for armv7 floating point/vector register support.Jason Molenda2013-03-131-165/+190
| | | | | | | | | | | | | Drop the old f registers from debugserver's register list. Add the NEON 128-bit q registers to debugserver, support reading and writing. Add the new contains / invalidates mappings for the s, d, and q registers so lldb will know what registers overlay what other registers. Change the default format of s and d registers to be floating point instead of hex. Remove some UTF-8 hyphen chars in comments in the ARM register number definition headers. <rdar://problem/13121797> llvm-svn: 176915
* Remove use of the ARMDisassembler framework fromJason Molenda2013-03-092-1427/+0
| | | | | | | | DNBArchImplARM. This framework is no longer around; all armv7 devices support using hardware breakpoints to instruction single step. llvm-svn: 176761
* Change debugserver from using the mach port number (in debugserver'sJason Molenda2013-02-221-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | own port namepsace) as the thread identifier to using the system-wide globally unique thread id as the thread identifier number. MachThread.cpp keeps both the unique id and the mach port number for each thread. All layers outside MachThread class use the unique id with three exceptions: (1) Mach exceptions come in with the port number (thread_port) which needs to be translated, (2) any calls to low-level thread_get_state/thread_set_state/thread_suspend etc need to use the mach port number, (3) MachThreadList::UpdateThreadList which creates the MachThread objects gets the unique id and passes it to the MachThread ctor as an argument. In general, any time nub_thread_t is used, it is now referring to a unique thread id. Any time a thread_t is used, it is now referring to a mach port number. There was some interchangability of these types previously. nub_thread_t has also been changed to a 64-bit type which necessitated some printf specification string changes. I haven't been able to test these changes extensively yet but want to checkpoint the work. The scenarios I've been testing are all working correctly so while there may be some corner cases I haven't hit yet, I think it is substantially correct. <rdar://problem/12931414> llvm-svn: 175870
* Added all of the 16 and 8 bit register variants for i386.Greg Clayton2013-01-211-9/+24
| | | | | | Modified the ARM register context to invalidate r8 - r14 when the CPSR register is modified. llvm-svn: 173104
* Add one more bit of logging for armv7 watchpoint debugging.Jason Molenda2013-01-171-0/+2
| | | | llvm-svn: 172702
* Fix build warnings.Greg Clayton2012-10-111-2/+2
| | | | llvm-svn: 165755
* Stop using the "%z" size_t modifier and cast all size_t values to uint64_t. ↵Greg Clayton2012-09-181-8/+8
| | | | | | Some platforms don't support this modification. llvm-svn: 164148
* <rdar://problem/11679380> Make sure we do not fallback to software stepping ↵Enrico Granata2012-06-281-47/+9
| | | | | | when hardware stepping should work but fails to get enabled. Also removing dead code paths llvm-svn: 159322
* Fix a typo.Johnny Chen2012-03-231-1/+1
| | | | llvm-svn: 153301
* Make arm debugserver handle setting a watchpoint on, for example, ↵Johnny Chen2012-03-232-39/+81
| | | | | | | | | (uint64_t)variable. We do this by delegating to two available Watchpoint Register Pairs (wvr, wcr). With each pair handling the 4 bytes of (uint64_t)variable. llvm-svn: 153300
* Previous check-ins allow to hit the arm hardware watchpoint, with a ↵Johnny Chen2012-03-222-56/+52
| | | | | | | | | | | | | | workaound to handle the issue that the inferior cannot execute past the watchpoint-triggering instruction. The solution is disable the watchpoint before resuming the inferior and make it hardware single step; when the inferior stops again due to single step, re-enable the watchpoint and disable the single step to make the inferior able to continue again without obstacle. rdar://problem/9667960 llvm-svn: 153273
* Fixed a bug with the r153228 check-in earlier today in that the cached ↵Johnny Chen2012-03-222-10/+14
| | | | | | | | watchpoint member variables were not reset appropriately. llvm-svn: 153239
* WIP snapshot of hardware watchpoints for arm. A simple watchpoint has ↵Johnny Chen2012-03-222-27/+140
| | | | | | | | | | | | | | triggered. However, the debugserver cannot get past the instruction which triggered the watchpoint. So a workaround is in place for the time being which disables the triggered watchpoint before resuming. Lots of commented out printf's remain in the source which needs to be cleaned up. WIP rdar://problem/9667960 llvm-svn: 153228
* Newly created threads are to inherit from the global debug state of the process.Johnny Chen2012-02-241-1/+11
| | | | llvm-svn: 151393
* Add a class method HasWatchpointOccurred() to inspect the "method of debug ↵Johnny Chen2012-02-242-4/+32
| | | | | | | | entry" field of the DSCR to check whether it was because of watchpoint occurred. llvm-svn: 151333
* Add comments about address word offset and the calculation of byte address ↵Johnny Chen2012-02-231-2/+18
| | | | | | select mask for WCR. llvm-svn: 151305
* Snapshot of initial work for ARM watchpoint support on the debugserver.Johnny Chen2012-01-112-1/+129
| | | | | | It is incomplete and untested; passes the compilation only. llvm-svn: 147901
* Disable ARMDisassembler.framework support which was used for software single ↵Greg Clayton2012-01-102-4/+25
| | | | | | stepping. llvm-svn: 147886
* Expose the DNBArchMachARM::DBG typedef, specify the type with theJason Molenda2011-12-082-2/+3
| | | | | | class scoping in DumpDBGState()'s definiton. llvm-svn: 146128
* Add a typedef for arm_debug_state_t as DBG. Plus some minor comment changes.Johnny Chen2011-12-062-7/+7
| | | | llvm-svn: 145978
* Fixed the Xcode project building of LLVM to be a bit more user friendly:Greg Clayton2011-11-041-27/+27
| | | | | | | | | | | | | | | | | | | - If you download and build the sources in the Xcode project, x86_64 builds by default using the "llvm.zip" checkpointed LLVM. - If you delete the "lldb/llvm.zip" and the "lldb/llvm" folder, and build the Xcode project will download the right LLVM sources and build them from scratch - If you have a "lldb/llvm" folder already that contains a "lldb/llvm/lib" directory, we will use the sources you have placed in the LLDB directory. Python can now be disabled for platforms that don't support it. Changed the way the libllvmclang.a files get used. They now all get built into arch specific directories and never get merged into universal binaries as this was causing issues where you would have to go and delete the file if you wanted to build an extra architecture slice. llvm-svn: 143678
* Fixed an issue in the EmulateInstructionARM there the IT opcode was trying toGreg Clayton2011-05-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | parse NOP instructions. I added the new table entries for the NOP for the plain NOP, Yield, WFE, WFI, and SEV variants. Modified the opcode emulation function EmulateInstructionARM::EmulateMOVRdSP(...) to notify us when it is creating a frame. Also added an abtract way to detect the frame pointer register for both the standard ARM ABI and for Darwin. Fixed GDBRemoteRegisterContext::WriteAllRegisterValues(...) to correctly be able to individually write register values back if case the 'G' packet is not implemented or returns an error. Modified the StopInfoMachException to "trace" stop reasons. On ARM we currently use the BVR/BCR register pairs to say "stop when the PC is not equal to the current PC value", and this results in a EXC_BREAKPOINT mach exception that has 0x102 in the code. Modified debugserver to create the short option string from long option definitions to make sure it doesn't get out of date. The short option string was missing many of the newer short option values due to a modification of the long options defs, and not modifying the short option string. llvm-svn: 131911
* Added functions to lldb_private::Address to set an address from a load addressGreg Clayton2011-05-221-55/+76
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | and set the address as an opcode address or as a callable address. This is needed in various places in the thread plans to make sure that addresses that might be found in symbols or runtime might already have extra bits set (ARM/Thumb). The new functions are: bool Address::SetCallableLoadAddress (lldb::addr_t load_addr, Target *target); bool Address::SetOpcodeLoadAddress (lldb::addr_t load_addr, Target *target); SetCallableLoadAddress will initialize a section offset address if it can, and if so it might possibly set some bits in the address to make the address callable (bit zero might get set for ARM for Thumb functions). SetOpcodeLoadAddress will initialize a section offset address using the specified target and it will strip any special address bits if needed depending on the target. Fixed the ABIMacOSX_arm::GetArgumentValues() function to require arguments 1-4 to be in the needed registers (previously this would incorrectly fallback to the stack) and return false if unable to get the register values. The function was also modified to first look for the generic argument registers and then fall back to finding the registers by name. Fixed the objective trampoline handler to use the new Address::SetOpcodeLoadAddress function when needed to avoid address mismatches when trying to complete steps into objective C methods. Make similar fixes inside the AppleThreadPlanStepThroughObjCTrampoline::ShouldStop() function. Modified ProcessGDBRemote::BuildDynamicRegisterInfo(...) to be able to deal with the new generic argument registers. Modified RNBRemote::HandlePacket_qRegisterInfo() to handle the new generic argument registers on the debugserver side. Modified DNBArchMachARM::NumSupportedHardwareBreakpoints() to be able to detect how many hardware breakpoint registers there are using a darwin sysctl. Did the same for hardware watchpoints in DNBArchMachARM::NumSupportedHardwareWatchpoints(). llvm-svn: 131834
* Added generic register numbers for simple ABI argument registers and definedGreg Clayton2011-05-151-5/+5
| | | | | | | | | | | | | | | | | the appropriate registers for arm and x86_64. The register names for the arguments that are the size of a pointer or less are all named "arg1", "arg2", etc. This allows you to read these registers by name: (lldb) register read arg1 arg2 arg3 ... You can also now specify you want to see alternate register names when executing the read register command: (lldb) register read --alternate (lldb) register read -A llvm-svn: 131376
* Many improvements to the Platform base class and subclasses. The base PlatformGreg Clayton2011-03-302-16/+130
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | class now implements the Host functionality for a lot of things that make sense by default so that subclasses can check: int PlatformSubclass::Foo () { if (IsHost()) return Platform::Foo (); // Let the platform base class do the host specific stuff // Platform subclass specific code... int result = ... return result; } Added new functions to the platform: virtual const char *Platform::GetUserName (uint32_t uid); virtual const char *Platform::GetGroupName (uint32_t gid); The user and group names are cached locally so that remote platforms can avoid sending packets multiple times to resolve this information. Added the parent process ID to the ProcessInfo class. Added a new ProcessInfoMatch class which helps us to match processes up and changed the Host layer over to using this new class. The new class allows us to search for processs: 1 - by name (equal to, starts with, ends with, contains, and regex) 2 - by pid 3 - And further check for parent pid == value, uid == value, gid == value, euid == value, egid == value, arch == value, parent == value. This is all hookup up to the "platform process list" command which required adding dumping routines to dump process information. If the Host class implements the process lookup routines, you can now lists processes on your local machine: machine1.foo.com % lldb (lldb) platform process list PID PARENT USER GROUP EFF USER EFF GROUP TRIPLE NAME ====== ====== ========== ========== ========== ========== ======================== ============================ 99538 1 username usergroup username usergroup x86_64-apple-darwin FileMerge 94943 1 username usergroup username usergroup x86_64-apple-darwin mdworker 94852 244 username usergroup username usergroup x86_64-apple-darwin Safari 94727 244 username usergroup username usergroup x86_64-apple-darwin Xcode 92742 92710 username usergroup username usergroup i386-apple-darwin debugserver This of course also works remotely with the lldb-platform: machine1.foo.com % lldb-platform --listen 1234 machine2.foo.com % lldb (lldb) platform create remote-macosx Platform: remote-macosx Connected: no (lldb) platform connect connect://localhost:1444 Platform: remote-macosx Triple: x86_64-apple-darwin OS Version: 10.6.7 (10J869) Kernel: Darwin Kernel Version 10.7.0: Sat Jan 29 15:17:16 PST 2011; root:xnu-1504.9.37~1/RELEASE_I386 Hostname: machine1.foo.com Connected: yes (lldb) platform process list PID PARENT USER GROUP EFF USER EFF GROUP TRIPLE NAME ====== ====== ========== ========== ========== ========== ======================== ============================ 99556 244 username usergroup username usergroup x86_64-apple-darwin trustevaluation 99548 65539 username usergroup username usergroup x86_64-apple-darwin lldb 99538 1 username usergroup username usergroup x86_64-apple-darwin FileMerge 94943 1 username usergroup username usergroup x86_64-apple-darwin mdworker 94852 244 username usergroup username usergroup x86_64-apple-darwin Safari The lldb-platform implements everything with the Host:: layer, so this should "just work" for linux. I will probably be adding more stuff to the Host layer for launching processes and attaching to processes so that this support should eventually just work as well. Modified the target to be able to be created with an architecture that differs from the main executable. This is needed for iOS debugging since we can have an "armv6" binary which can run on an "armv7" machine, so we want to be able to do: % lldb (lldb) platform create remote-ios (lldb) file --arch armv7 a.out Where "a.out" is an armv6 executable. The platform then can correctly decide to open all "armv7" images for all dependent shared libraries. Modified the disassembly to show the current PC value. Example output: (lldb) disassemble --frame a.out`main: 0x1eb7: pushl %ebp 0x1eb8: movl %esp, %ebp 0x1eba: pushl %ebx 0x1ebb: subl $20, %esp 0x1ebe: calll 0x1ec3 ; main + 12 at test.c:18 0x1ec3: popl %ebx -> 0x1ec4: calll 0x1f12 ; getpid 0x1ec9: movl %eax, 4(%esp) 0x1ecd: leal 199(%ebx), %eax 0x1ed3: movl %eax, (%esp) 0x1ed6: calll 0x1f18 ; printf 0x1edb: leal 213(%ebx), %eax 0x1ee1: movl %eax, (%esp) 0x1ee4: calll 0x1f1e ; puts 0x1ee9: calll 0x1f0c ; getchar 0x1eee: movl $20, (%esp) 0x1ef5: calll 0x1e6a ; sleep_loop at test.c:6 0x1efa: movl $12, %eax 0x1eff: addl $20, %esp 0x1f02: popl %ebx 0x1f03: leave 0x1f04: ret This can be handy when dealing with the new --line options that was recently added: (lldb) disassemble --line a.out`main + 13 at test.c:19 18 { -> 19 printf("Process: %i\n\n", getpid()); 20 puts("Press any key to continue..."); getchar(); -> 0x1ec4: calll 0x1f12 ; getpid 0x1ec9: movl %eax, 4(%esp) 0x1ecd: leal 199(%ebx), %eax 0x1ed3: movl %eax, (%esp) 0x1ed6: calll 0x1f18 ; printf Modified the ModuleList to have a lookup based solely on a UUID. Since the UUID is typically the MD5 checksum of a binary image, there is no need to give the path and architecture when searching for a pre-existing image in an image list. Now that we support remote debugging a bit better, our lldb_private::Module needs to be able to track what the original path for file was as the platform knows it, as well as where the file is locally. The module has the two following functions to retrieve both paths: const FileSpec &Module::GetFileSpec () const; const FileSpec &Module::GetPlatformFileSpec () const; llvm-svn: 128563
* Fixed Process::Halt() as it was broken for "process halt" after recent changesGreg Clayton2010-11-181-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | to the DoHalt down in ProcessGDBRemote. I also moved the functionality that was in ProcessGDBRemote::DoHalt up into Process::Halt so not every class has to implement a tricky halt/resume on the internal state thread. The functionality is the same as it was before with two changes: - when we eat the event we now just reuse the event we consume when the private state thread is paused and set the interrupted bool on the event if needed - we also properly update the Process::m_public_state with the state of the event we consume. Prior to this, if you issued a "process halt" it would eat the event, not update the process state, and then produce a new event with the interrupted bit set and send it. Anyone listening to the event would get the stopped event with a process that whose state was set to "running". Fixed debugserver to not have to be spawned with the architecture of the inferior process. This worked fine for launching processes, but when attaching to processes by name or pid without a file in lldb, it would fail. Now debugserver can support multiple architectures for a native debug session on the current host. This currently means i386 and x86_64 are supported in the same binary and a x86_64 debugserver can attach to a i386 executable. This change involved a lot of changes to make sure we dynamically detect the correct registers for the inferior process. llvm-svn: 119680
OpenPOWER on IntegriCloud