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path: root/lldb/source/Plugins/Process/Utility/EmulateInstructionARM.cpp
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* Made the EmulateInstruction class into a plug-in interface and moved theGreg Clayton2011-02-011-1243/+0
| | | | | | source files around into the places they need to go. llvm-svn: 124631
* Add emulate_pop (loads multiple registers from the stack) entries to both theJohnny Chen2011-01-311-3/+138
| | | | | | | | g_arm_opcodes and g_thumb_opcodes tables. Plus a minor comment fix for EmulateInstruction.h. llvm-svn: 124617
* Add emulate_add_sp_imm entry to the g_thumb_opcodes table, which represents ↵Johnny Chen2011-01-311-1/+70
| | | | | | | | an operation to adjust the stack pointer by adding an imm7-scaled value to the SP. llvm-svn: 124596
* Add some comments to the emulate_* functions.Johnny Chen2011-01-311-1/+6
| | | | llvm-svn: 124588
* Added the start of the plug-in interface to EmulateInstructionGreg Clayton2011-01-301-0/+39
| | | | | | and implemented it for the EmulateInstructionARM class. llvm-svn: 124563
* Add emulate_mov_low_high() entry to the g_thumb_opcodes table to capture movingJohnny Chen2011-01-291-3/+61
| | | | | | of high registers to low registers in the prologue so they can be saved. llvm-svn: 124509
* Add emulate_mov_rd_sp() entries to the g_arm_opcodes and g_thumb_opcodes tables.Johnny Chen2011-01-281-3/+61
| | | | | | For prolog instructions which set r7 or ip to the stack pointer. llvm-svn: 124501
* Add emulate_sub_r7_ip_imm() (set frame pointer to some ip offset) and ↵Johnny Chen2011-01-281-0/+112
| | | | | | | | emulate_sub_ip_sp_imm() ( set ip to some stack offset) entries to the g_arm_opcodes table. llvm-svn: 124466
* Should provide more useful context info for the emulate_ldr_rd_pc_rel() impl.Johnny Chen2011-01-281-10/+9
| | | | | | The context being that it's a PC relative load. llvm-svn: 124460
* Add emulate_ldr_rd_pc_rel entry to the g_thumb_opcodes table, which represents aJohnny Chen2011-01-271-4/+72
| | | | | | | PC relative immediate load into register, possibly followed by an add operation to adjust the SP. llvm-svn: 124448
* Add emulate_add_sp_rm entry to the g_thumb_opcodes table, which represents ↵Johnny Chen2011-01-271-10/+70
| | | | | | | | an operation to adjust the stack pointer by adding a register value in Rm to the SP. llvm-svn: 124400
* Add emulate_add_rd_sp_imm (SP plus immediate) to the g_arm_opcodes and ↵Johnny Chen2011-01-271-28/+83
| | | | | | | | g_thumb_opcodes tables. Change the data type of Context.arg2 to int64_t due to possible negative values. llvm-svn: 124343
* Add emulate_vpush (stores multiple consecutive extension registers to the ↵Johnny Chen2011-01-261-3/+108
| | | | | | | | stack) entries to both the g_arm_opcodes and g_thumb_opcodes tables. llvm-svn: 124333
* Remove duplicated comments.Johnny Chen2011-01-261-2/+0
| | | | llvm-svn: 124262
* Move #define's out of ARMUtils.h and into a newly created file ARMDefines.h.Johnny Chen2011-01-261-0/+1
| | | | llvm-svn: 124261
* Move the generic instruction bits manipulation routines into a newly created ↵Johnny Chen2011-01-261-10/+10
| | | | | | | | file named InstructionUtils.h and modify some existing code to use them. llvm-svn: 124259
* Add Encoding T1 entry of emulate_sub_sp_imm to the g_thumb_opcodes table.Johnny Chen2011-01-261-1/+8
| | | | | | Update emulate_sub_sp_imm to handle Encoding T1. llvm-svn: 124253
* Add Encoding T2 & T3 entries of emulate_sub_sp_imm to the g_thumb_opcodes table.Johnny Chen2011-01-251-5/+18
| | | | | | Update emulate_sub_sp_imm to handle Encoding T2 & T3. llvm-svn: 124248
* Add an entry to the g_arm_opcodes table named emulate_sub_sp_imm which ↵Johnny Chen2011-01-251-7/+65
| | | | | | | | corresponds to an operation to adjust the stack pointer (allocate space for local storage). llvm-svn: 124237
* Variable renaming for better readability.Johnny Chen2011-01-251-12/+12
| | | | llvm-svn: 124208
* Add an emulate-callback function emulate_str_rt_sp() to the g_arm_opcodes table.Johnny Chen2011-01-251-8/+87
| | | | llvm-svn: 124165
* Use two opcode tables g_arm_opcodes and g_thumb_opcodes, instead of lumping ↵Johnny Chen2011-01-241-5/+10
| | | | | | arm and thumb opcodes together. llvm-svn: 124156
* Fix typo of encoding T2 (push) in the original ARM Architecture Reference ↵Johnny Chen2011-01-241-1/+1
| | | | | | | | Manual, which has been corrected in the subsequent errata. llvm-svn: 124152
* Add comment about using Encoding A1 push instruction to emulate the "stmfd ↵Johnny Chen2011-01-241-0/+3
| | | | | | | | sp!, reg" case, i.e., pushing one register onto the full descending stacks. llvm-svn: 124149
* Make the assembler mnemonic lowercase.Johnny Chen2011-01-241-5/+5
| | | | llvm-svn: 124147
* Add Encoding T1 of the PUSH instructions to the g_arm_opcodes table.Johnny Chen2011-01-241-1/+12
| | | | llvm-svn: 124144
* Fix typo in the instruction descriptions for Encoding T2 and T3 of PUSH.Johnny Chen2011-01-241-2/+2
| | | | llvm-svn: 124143
* Move some #define's to the ARMUtils.h header file.Johnny Chen2011-01-241-36/+0
| | | | llvm-svn: 124141
* Add Encoding T2 & T3 of the PUSH instructions to the g_arm_opcodes table.Johnny Chen2011-01-241-9/+35
| | | | | | Plus add an extra field ARMInstrSize to the table entry type 'ARMOpcode'. llvm-svn: 124140
* Add an ARMUtils.h file to house utility functions for the ARM/Thumb ↵Johnny Chen2011-01-241-0/+2
| | | | | | Instruction Set Architecture. llvm-svn: 124131
* Add more descriptions to the g_arm_opcodes table entries.Johnny Chen2011-01-221-3/+5
| | | | llvm-svn: 124010
* Pass along (ARMEncoding)encoding as the callback data, which allows us to ↵Johnny Chen2011-01-221-8/+20
| | | | | | | | | abstract the EmulateCallback routine without too much duplication. Add an entry for emulating ARM PUSH with encoding A2. llvm-svn: 124009
* Untabify the file.Johnny Chen2011-01-211-5/+5
| | | | llvm-svn: 124003
* Added the start of opcode emulation for ARM instructions. This class is designedGreg Clayton2011-01-211-0/+299
to be fed 4 callbacks: read/write memory, and read/write registers. After this, you can tell the object to read an instruction. This will cause the class to read the PC, and read and instruction. Then you can emulate the instruction by calling EvaluateInstruction. This will cause the class to figure out exactly what an opcode does, and call the read/write mem/regs functions with actual values which allows one to emulate an instruction without running a process, or it allows one to watch the context information (the memory write is a pushing register 3 onto the stack at offset 12) so it can be used for generating call frame information. This way, in the future, we will have one class that can be used to emulate instructions and generate our unwind info from assembly. llvm-svn: 123998
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