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path: root/lldb/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
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* Fix write register context in EmulateInstructionARM::EmulateMOVRdRmTamas Berghammer2015-05-281-1/+4
* Fix write register context in EmulateInstructionARM::EmulateADDRdSPImmTamas Berghammer2015-05-281-2/+5
* Fix write register context in EmulateInstructionARM::EmulateMOVRdRmTamas Berghammer2015-05-271-3/+3
* Fix encoding of BX instrucion in EmulateInstructionARMTamas Berghammer2015-05-181-1/+1
* Fix arm instruction emulation of add (imm) and sub (imm)Tamas Berghammer2015-05-131-35/+48
* Fix thumb condition extraction in ARM instrcution emulatorTamas Berghammer2015-05-111-2/+2
* Fix condition detection in EmulateInstructionARMTamas Berghammer2015-04-241-2/+1
* Fix order of b and blx instrction in EmulateInstructionARMTamas Berghammer2015-04-241-2/+2
* Fix write register context for arm "add<c> <Rd>, sp, #imm"Tamas Berghammer2015-04-241-1/+5
* Update cpsr register in BLX instruction emulationTamas Berghammer2015-04-231-0/+7
* UnwindPlan::Row refactor -- add support for CFA set by a DWARF expressionPavel Labath2015-02-231-1/+1
* Add #if 0 around unreachable block of code to suppress warnings.Jason Molenda2014-10-171-0/+2
* Replace uint32_t by lldb::RegisterKing in register context API.Jean-Daniel Dupas2014-07-021-3/+5
* lldb: remove adhoc implementation of array_sizeofSaleem Abdulrasool2014-06-271-2/+3
* Fix a few typos.Bruce Mitchener2014-06-271-9/+9
* Update the checks in EmulateInstructionARM::GetFramePointerRegisterNumber Jason Molenda2014-01-061-12/+40
* Handle endianness in the Opcode classEd Maste2013-12-091-6/+6
* Correct typo: Intructions -> InstructionsEd Maste2013-10-041-1/+1
* Fixed the instruction emulation so that it doesn'tSean Callanan2013-06-251-0/+6
* Fix some more mismatched integer types causing compiler warnings.Andy Gibbs2013-06-241-13/+13
* Update countTrailingZeros function usage to match llvm's r182667.Filipe Cabecinhas2013-05-241-2/+2
* <rdar://problem/13854277>Greg Clayton2013-05-101-2/+3
* After discussing with Chris Lattner, we require C++11, so lets get rid of the...Greg Clayton2013-04-181-2/+2
* Since we use C++11, we should switch over to using std::unique_ptr when C++11...Greg Clayton2013-04-181-2/+2
* More Linux warnings fixes (remove default labels as needed):Daniel Malea2012-12-071-1/+0
* Fix the bit pattern for vst1 in EmulateInstructionARM::GetThumbOpcodeForInstr...Jason Molenda2012-10-311-1/+1
* Add a new capability to RegisterContextLLDB: To recognize when theJason Molenda2012-10-261-4/+2
* Reimplemented the code that backed the "settings" in lldb. There were many is...Greg Clayton2012-08-221-0/+2
* Ran the static analyzer on the codebase and found a few things.Greg Clayton2012-07-171-4/+20
* Switch nearly all of the use of the UnwindPlan::Row's to go throughJason Molenda2012-07-141-3/+3
* <rdar://problem/11358639>Greg Clayton2012-05-081-8/+26
* Make sure EmulateInstructionARM doesn't have to have "armv4", "armv6", "armv7...Greg Clayton2012-04-181-4/+4
* Add armv7s to recognized cpu type for arm instruction emulation.Jason Molenda2012-04-181-8/+10
* rdar://problem/11031743Johnny Chen2012-03-131-1/+1
* Fixed some warnings after enabling some stricter warnings in the Xcode projectGreg Clayton2011-10-311-2/+2
* Fix two logic errors uncovered by the static analyzer.Johnny Chen2011-08-161-3/+3
* Fix a logic error (Division by zero) uncovered by the static analyzer.Johnny Chen2011-08-121-1/+1
* Fix some warnings from static analyzer.Johnny Chen2011-08-121-5/+5
* Fixed some issues with ARM backtraces by not processing any push/pop Greg Clayton2011-07-061-37/+72
* Bail out if we have an invalid thumb instruction.Johnny Chen2011-06-021-2/+4
* Turn the commented-out assert()'s into appropriate bail-out actions.Johnny Chen2011-06-021-2/+5
* When emulating an ill-formed instruction, we should bail out instead of asser...Johnny Chen2011-06-021-35/+100
* Remove asserts that will crash LLDB. These should be changed to returnGreg Clayton2011-06-021-14/+14
* EmulateShiftReg() also accepts shifter type of SRType_ROR.Johnny Chen2011-06-021-1/+4
* Fixed an issue in the EmulateInstructionARM there the IT opcode was trying toGreg Clayton2011-05-231-5/+41
* Added a way to resolve an load address from a target:Greg Clayton2011-05-181-1/+4
* Moved all code from ArchDefaultUnwindPlan and ArchVolatileRegs into theirGreg Clayton2011-05-111-4/+3
* While implementing unwind information using UnwindAssemblyInstEmulation I ranGreg Clayton2011-05-091-153/+151
* Added the start of the CFI row production using theGreg Clayton2011-04-291-1/+1
* Added a new OptionValue subclass for lldb::Format: OptionValueFormat. AddedGreg Clayton2011-04-271-2/+2
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