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bcm5719-llvm
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ortega-7.0.1
Project Ortega BCM5719 LLVM
Raptor Computing Systems
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lldb
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Plugins
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Instruction
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ARM
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EmulateInstructionARM.cpp
Commit message (
Expand
)
Author
Age
Files
Lines
*
Ran the static analyzer on the codebase and found a few things.
Greg Clayton
2012-07-17
1
-4
/
+20
*
Switch nearly all of the use of the UnwindPlan::Row's to go through
Jason Molenda
2012-07-14
1
-3
/
+3
*
<rdar://problem/11358639>
Greg Clayton
2012-05-08
1
-8
/
+26
*
Make sure EmulateInstructionARM doesn't have to have "armv4", "armv6", "armv7...
Greg Clayton
2012-04-18
1
-4
/
+4
*
Add armv7s to recognized cpu type for arm instruction emulation.
Jason Molenda
2012-04-18
1
-8
/
+10
*
rdar://problem/11031743
Johnny Chen
2012-03-13
1
-1
/
+1
*
Fixed some warnings after enabling some stricter warnings in the Xcode project
Greg Clayton
2011-10-31
1
-2
/
+2
*
Fix two logic errors uncovered by the static analyzer.
Johnny Chen
2011-08-16
1
-3
/
+3
*
Fix a logic error (Division by zero) uncovered by the static analyzer.
Johnny Chen
2011-08-12
1
-1
/
+1
*
Fix some warnings from static analyzer.
Johnny Chen
2011-08-12
1
-5
/
+5
*
Fixed some issues with ARM backtraces by not processing any push/pop
Greg Clayton
2011-07-06
1
-37
/
+72
*
Bail out if we have an invalid thumb instruction.
Johnny Chen
2011-06-02
1
-2
/
+4
*
Turn the commented-out assert()'s into appropriate bail-out actions.
Johnny Chen
2011-06-02
1
-2
/
+5
*
When emulating an ill-formed instruction, we should bail out instead of asser...
Johnny Chen
2011-06-02
1
-35
/
+100
*
Remove asserts that will crash LLDB. These should be changed to return
Greg Clayton
2011-06-02
1
-14
/
+14
*
EmulateShiftReg() also accepts shifter type of SRType_ROR.
Johnny Chen
2011-06-02
1
-1
/
+4
*
Fixed an issue in the EmulateInstructionARM there the IT opcode was trying to
Greg Clayton
2011-05-23
1
-5
/
+41
*
Added a way to resolve an load address from a target:
Greg Clayton
2011-05-18
1
-1
/
+4
*
Moved all code from ArchDefaultUnwindPlan and ArchVolatileRegs into their
Greg Clayton
2011-05-11
1
-4
/
+3
*
While implementing unwind information using UnwindAssemblyInstEmulation I ran
Greg Clayton
2011-05-09
1
-153
/
+151
*
Added the start of the CFI row production using the
Greg Clayton
2011-04-29
1
-1
/
+1
*
Added a new OptionValue subclass for lldb::Format: OptionValueFormat. Added
Greg Clayton
2011-04-27
1
-2
/
+2
*
Got the EmulateInstruction CFI code a lot closer to producing CFI data.
Greg Clayton
2011-04-26
1
-288
/
+332
*
Modify EmulateInstructionARM::SetArchitecture() to treat "arm" and "thumb" as...
Johnny Chen
2011-04-26
1
-0
/
+2
*
Changed the emulate instruction function to take emulate options which
Greg Clayton
2011-04-26
1
-143
/
+128
*
Change code for reading emulation data files to read the new file
Caroline Tice
2011-04-22
1
-46
/
+36
*
Add the infrastructure to test instruction emulations automatically.
Caroline Tice
2011-04-19
1
-10
/
+115
*
Fix bug where source & target registers were swapped in an
Caroline Tice
2011-04-13
1
-2
/
+2
*
Fix various minor bugs in the ARM instruction emulation code.
Caroline Tice
2011-04-13
1
-2
/
+11
*
Implement ARM emulation function to handle "SUBS PC, LR and related instructi...
Caroline Tice
2011-04-11
1
-43
/
+243
*
Fix various things in the instruction emulation code:
Caroline Tice
2011-04-08
1
-7
/
+48
*
Add Emulate and DumpEmulation to Instruction class.
Caroline Tice
2011-04-05
1
-1
/
+2
*
Add the rest of the mechanisms to make ARM instruction emulation usable/possi...
Caroline Tice
2011-04-05
1
-19
/
+202
*
Fix a few typos in the previous commit.
Caroline Tice
2011-03-31
1
-5
/
+5
*
Add code to emulate VLD1 (single element to all lanes) ARM instruction.
Caroline Tice
2011-03-31
1
-0
/
+133
*
Add code to emulate VST1 (single element from one lane) ARM
Caroline Tice
2011-03-31
1
-2
/
+162
*
Add code to emulate VST1 (multiple single elements) ARM
Caroline Tice
2011-03-31
1
-8
/
+175
*
Add code to emulate VLD1 (single element to one lane) floating point
Caroline Tice
2011-03-31
1
-2
/
+175
*
Add code to emulate VLD1 (multiple single elements) ARM instruction.
Caroline Tice
2011-03-31
1
-9
/
+178
*
Add code to emulate VSTR ARM instruction (store a floating point register).
Caroline Tice
2011-03-31
1
-0
/
+137
*
Add code to emulate the VLDR Arm instruction (load a floating poitn register).
Caroline Tice
2011-03-31
1
-0
/
+134
*
Add "Bits64" utility function.
Caroline Tice
2011-03-31
1
-9
/
+210
*
Modify ARM instruction tables to allow for specifying floating point variants.
Caroline Tice
2011-03-31
1
-276
/
+480
*
Fill in code for EmulateSTRDImm and EmulateSTRDReg, to emulate the
Caroline Tice
2011-03-30
1
-24
/
+273
*
Many improvements to the Platform base class and subclasses. The base Platform
Greg Clayton
2011-03-30
1
-1
/
+1
*
Fill in EmulateLDRDRegister to emulate LDRD (register) instruction.
Caroline Tice
2011-03-30
1
-416
/
+105
*
Fill in EmulateLDRLImmediate to emulate the LDRD (immediate) ARM instruction.
Caroline Tice
2011-03-30
1
-9
/
+137
*
Fix typo in previous check-in.
Caroline Tice
2011-03-30
1
-1
/
+1
*
Fill in EmulateSTRImmARM to emulate the STR (immediate,ARM) instruction.
Caroline Tice
2011-03-30
1
-1
/
+94
*
Fill in EmulateSTRBImmARM to emulate the STRB (immediate, ARM) instruction.
Caroline Tice
2011-03-30
1
-8
/
+83
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