| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [ELF][RISCV] Allow PT_LOAD to have overlapping p_offset ranges on EM_RISCV | Fangrui Song | 2019-08-28 | 1 | -26/+28 |
| | | | | | | | | | Port the D64906 technique to RISC-V. It deletes 3 alignments at PT_LOAD boundaries for the default case: the size of a RISC-V binary decreases by at most 12kb. llvm-svn: 370192 | ||||
| * | [ELF][RISCV] Support GD/LD/IE/LE TLS models | Fangrui Song | 2019-07-01 | 1 | -0/+82 |
| RISC-V psABI doesn't specify TLS relaxation. It can be handled the same way as we handle ARM TLS. RISC-V TLS is even simpler because GD/LD use the same relocation type. Reviewed By: jrtc27, ruiu Differential Revision: https://reviews.llvm.org/D63220 llvm-svn: 364813 | |||||
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index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
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