summaryrefslogtreecommitdiffstats
path: root/libclc/generic/lib/math
Commit message (Expand)AuthorAgeFilesLines
* Move unary_instrinsic.inc to private headers.Jan Vesely2019-03-138-8/+8
* trunc: Remove llvm intrinsic from the header.Jan Vesely2019-03-131-0/+10
* round: Remove llvm intrinsic from the headerJan Vesely2019-03-131-0/+10
* rint: Remove llvm intrinsic from the header.Jan Vesely2019-03-131-0/+10
* floor: Remove llvm isntrinsic from the header.Jan Vesely2019-03-131-0/+11
* fabs: Remove llvm intrinsic from the header.Jan Vesely2019-03-131-0/+11
* ceil: Remove llvm intrinsic from the header.Jan Vesely2019-03-131-0/+11
* sqrt: Split function generation to a shared inc file.Jan Vesely2019-03-132-18/+26
* math/fma: Add fp32 software implementationJan Vesely2018-06-073-0/+172
* Add initial support for half precision builtinsJan Vesely2018-05-1722-20/+169
* rootn: Use denormal path onlyJan Vesely2018-05-151-10/+1
* remquo: Flush denormals if not supportedJan Vesely2018-05-031-0/+2
* remquo: Port from amd builtinsJan Vesely2018-05-033-0/+277
* math: Add helper function to flush denormals if not supported.Jan Vesely2018-05-031-0/+19
* log10: Use sw implementation from amd builtinsJan Vesely2018-04-235-19/+173
* powr: Use denormal path onlyJan Vesely2018-04-171-11/+1
* pown: Use denormal path onlyJan Vesely2018-04-171-11/+1
* pow: Use denormal path onlyJan Vesely2018-04-171-11/+1
* exp10: Port from amd builtinsJan Vesely2018-04-173-11/+152
* hypot: Port from amd builtinsJan Vesely2018-04-103-4/+102
* fmod: Port from amd_builtinsJan Vesely2018-04-062-10/+188
* remainder: Port from amd builtinsJan Vesely2018-03-192-0/+224
* nan: ImplementJan Vesely2018-03-122-0/+26
* lgamma_r: Move code from .inc to .cl fileJan Vesely2018-03-062-475/+496
* frexp: Reuse types provided by gentype.incJan Vesely2018-03-062-78/+53
* minmag: Condition variable needs to be the same bitwidth as operandsJan Vesely2018-03-062-2/+21
* maxmag: Condition variable needs to be the same bitwidth as operandsJan Vesely2018-03-062-2/+21
* Move cl_khr_fp64 exntension enablement to gentype include listsJan Vesely2018-03-0613-52/+0
* half_powr: Implement using powrJan Vesely2018-02-011-0/+6
* math.h: Use logical operations instead of bit operations for readabilityJan Vesely2018-01-311-1/+1
* math.h: Set HAVE_HW_FMA32 based on compiler provided macroJan Vesely2018-01-291-0/+5
* tanpi: Port from amd_builtinsJan Vesely2018-01-192-0/+153
* tan: Port from amd_builtinsJan Vesely2018-01-197-21/+158
* half_divide: Implement using x/yJan Vesely2018-01-182-0/+18
* half_tan: Implement using tanJan Vesely2018-01-181-0/+6
* half_sin: Implement using sinJan Vesely2018-01-181-0/+6
* half_recip: Implement using 1/xJan Vesely2018-01-181-0/+10
* half_log2: Implement using log2Jan Vesely2018-01-181-0/+6
* half_log10: Implement using log10Jan Vesely2018-01-181-0/+6
* half_log: Implement using logJan Vesely2018-01-181-0/+6
* half_exp10: Implement using exp10Jan Vesely2018-01-181-0/+6
* half_exp2: Implement using exp2Jan Vesely2018-01-181-0/+6
* half_exp: Implement using expJan Vesely2018-01-181-0/+6
* half_cos: Implement using cosJan Vesely2018-01-181-0/+6
* half_sqrt: Cleanup implementationJan Vesely2018-01-182-49/+2
* half_rsqrt: Cleanup implementationJan Vesely2018-01-183-49/+11
* rootn: Port from amd_builtinsJan Vesely2018-01-173-0/+388
* powr: Port from amd_builtinsJan Vesely2018-01-172-0/+398
* pown: Port from amd_builtinsJan Vesely2018-01-173-7/+386
* pow: Port from amd_builtinsJan Vesely2018-01-175-0/+1084
OpenPOWER on IntegriCloud