summaryrefslogtreecommitdiffstats
path: root/compiler-rt/lib/builtins
Commit message (Collapse)AuthorAgeFilesLines
...
* [builtins] Divide shouldn't underflow if rounded result would be normal.Eli Friedman2019-03-193-0/+36
| | | | | | | | | | | We were treating certain edge cases that are actually normal as denormal results, and flushing them to zero; we shouldn't do that. Not sure this is the cleanest way to implement this edge case, but I wanted to avoid adding any code on the common path. Differential Revision: https://reviews.llvm.org/D59070 llvm-svn: 356529
* [X86] Add 'znver2' and 'cascadelake' support to __cpu_indicator_init.Craig Topper2019-02-261-6/+20
| | | | | | | | For 'cascadelake' this is adding a 'avx512vnni' feature check to the 0x55 skylake-avx512 model check. These CPUs use the same model number and only differ in the stepping number. But the feature flag is simpler than collecting all the stepping numbers. For 'znver2' this is just syncing with LLVM's Host.cpp. llvm-svn: 354927
* [builtins] Do not set hidden attribute on AndroidYi Kong2019-01-231-2/+6
| | | | | | | | | | Bionic libc relies on an old libgcc behaviour which does not set hidden visibility attribute. Keep exporting these symbols on Android for compatibility. Differential Revision: https://reviews.llvm.org/D56977 llvm-svn: 351915
* Update more file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-19331-1282/+993
| | | | | | | | | | | | | | | | | | to reflect the new license. These used slightly different spellings that defeated my regular expressions. We understand that people may be surprised that we're moving the header entirely to discuss the new license. We checked this carefully with the Foundation's lawyer and we believe this is the correct approach. Essentially, all code in the project is now made available by the LLVM project under our new license, so you will see that the license headers include that license only. Some of our contributors have contributed code under our old license, and accordingly, we have retained a copy of our old license notice in the top-level files in each project and repository. llvm-svn: 351648
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-1914-30/+42
| | | | | | | | | | | | | | | | | to reflect the new license. We understand that people may be surprised that we're moving the header entirely to discuss the new license. We checked this carefully with the Foundation's lawyer and we believe this is the correct approach. Essentially, all code in the project is now made available by the LLVM project under our new license, so you will see that the license headers include that license only. Some of our contributors have contributed code under our old license, and accordingly, we have retained a copy of our old license notice in the top-level files in each project and repository. llvm-svn: 351636
* [compiler-rt][builtins][PowerPC] Implemented __floattitf builtin on PowerPCAmy Kwan2019-01-102-0/+49
| | | | | | | | | | | | | This patch implements the long double __floattitf (int128_t) method for PowerPC -- specifically to convert a 128 bit integer into a long double (IBM double-double). To invoke this method, one can do so by linking against compiler-rt, via the --rtlib=compiler-rt command line option supplied to clang. Differential Revision: https://reviews.llvm.org/D54313/ llvm-svn: 350818
* [compiler-rt][builtins][PowerPC] Implemented __fixunstfti builtin on PowerPCAmy Kwan2019-01-102-0/+107
| | | | | | | | | | | | | | | | | | This patch implements the __uint128_t __fixunstfti (long double) method for PowerPC -- specifically to convert a long double (IBM double-double) to an unsigned 128 bit integer. The general approach of this algorithm is to convert the high and low doubles of the long double and add them together if the doubles fit within 64 bits. However, additional adjustments and scaling is performed when the high or low double does not fit within a 64 bit integer. To invoke this method, one can do so by linking against compiler-rt, via the --rtlib=compiler-rt command line option supplied to clang. Differential Revision: https://reviews.llvm.org/D54911 llvm-svn: 350815
* [builtins] Remove trailing whitespaces, NFCYi Kong2018-12-102-43/+43
| | | | | | | Remove trailing whitespaces so that it is easier to diff the code between div{s,d,t}f3.c llvm-svn: 348807
* [X86][compiler-rt] Add missing semicolonBenjamin Kramer2018-11-241-1/+1
| | | | llvm-svn: 347519
* [X86] Make conversion of feature bits into a mask explicitly unsigned by ↵Craig Topper2018-11-241-6/+6
| | | | | | using 1U instead of 1. llvm-svn: 347517
* [X86][compiler-rt] Attempt to fix a warning about a shift amount being ↵Craig Topper2018-11-241-6/+6
| | | | | | negative in a macro expansion. llvm-svn: 347516
* Revert "Cast the 2nd argument of _Unwind_SetIP() to _Unwind_Ptr"Kamil Rytarowski2018-11-161-1/+1
| | | | | | | | _Unwind_Ptr is unknown on some targets. Detected on green-dragon-21 (MacPro Late 2013 | OS X 10.14(18A391) | Xcode 10.1(10B61)). llvm-svn: 347106
* Cast the 2nd argument of _Unwind_SetIP() to _Unwind_PtrKamil Rytarowski2018-11-161-1/+1
| | | | | | | | | | | This modification is require for NetBSD with GCC, as there is a custom unwind.h header implementation with different types. No functional change intended for others. Cherry-picked chunk from D33878. llvm-svn: 347102
* Cast _Unwind_GetIP() and _Unwind_GetRegionStart() to uintptr_tKamil Rytarowski2018-11-161-3/+2
| | | | | | | | | | | This modification is require for NetBSD with GCC, as there is a custom unwind.h header implementation with different types. No functional change intended for others. Cherry-picked chunk from D33878. llvm-svn: 347101
* Compile and test i128 math builtins for Win64Reid Kleckner2018-11-011-1/+10
| | | | | | | | | | | | | | | | | | | | | Summary: Windows has always been LLP64, not LP64, so the macros were incorrect. Check for _WIN64, since AArch64 sets that too. The tests have to be fixed up in two main ways: 1. Use 'ULL' suffixes to avoid sign extension when passing hex literals with the sign bit set to signed 128 arguments. Clang -fms-compatibility makes such hex literals signed, not unsigned. 2. Disable various tests for 80-bit long double interoperation with i128 values. Reviewers: joerg, mstorsjo Subscribers: javed.absar, kristof.beyls, hiraditya, aheejin, llvm-commits Differential Revision: https://reviews.llvm.org/D53918 llvm-svn: 345796
* [builtins] Re-enable x86-only long double testsReid Kleckner2018-10-301-0/+12
| | | | | | | | | | | | | | | | | | | Summary: In r81552, the HAS_80_BIT_LONG_DOUBLE macro was added to the unit test only version of int_lib.h. One month later in r85260 the duplicate int_lib.h was removed, but the tests still passed because we don't build with -Werror. This is the minimal change to bring it back, and I decided to put the configuration macro next to our 128-bit integer support macro. Reviewers: joerg, compnerd, mstorsjo Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D53838 llvm-svn: 345645
* [compiler-rt][builtins] Don't #include CoreFoundation in os_version_check.cErik Pilkington2018-10-291-8/+33
| | | | | | | | | | This breaks some configurations, so just forward declare everything that we need. rdar://35943793 Differential revision: https://reviews.llvm.org/D50269 llvm-svn: 345551
* [builtins] Fix -Wunused-local-typedef warning in compile time assertsReid Kleckner2018-10-291-1/+1
| | | | | | | Use the __attribute__ spellings when compiling with clang-cl so that __attribute__((unused)) expands to something. llvm-svn: 345550
* [X86][compiler-rt] Add additional CPUs and features to the cpu detection to ↵Craig Topper2018-10-201-35/+78
| | | | | | | | | | | | | | | | match libgcc Summary: This patch adds additional features and cpus from libgcc. Unfortunately we've overflowed the existing 32-bits of features so we had to add a new __cpu_features2 variable to hold the additional bits. This matches libgcc as far as I can tell. Reviewers: echristo Reviewed By: echristo Subscribers: dberris, llvm-commits Differential Revision: https://reviews.llvm.org/D53461 llvm-svn: 344830
* [Arm builtins] Remove non-necessary IS checkKristina Brooks2018-10-022-10/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch removes the instruction set check to make the msr APSR_nzcvq, ip instruction only execute if Thumb2 is used. The APSR is a subset of the bits of the CPSR (B.1.3.3 of the Arm v7 A and R ARM [1]) and is only available for A and R profiles. However in section B.9.3.11 of the same document we see that: "In the A and R profiles, APSR_nzcvq is the same as CPSR_f" "ARM recommends the APSR forms when only the N, Z, C, V, Q, and GE[3:0] bits are being written." This patch also make those files assemble for Armv8-M Mainline architecture profile. The builtins were cross-compiled for Arm, Aarch64 and Armv6-M, Armv7-M and Armv7E-M targets. Cross-compiled tests were executed for Arm target. [1]: https://developer.arm.com/docs/ddi0406/latest/arm-architecture-reference-manual-armv7-a-and-armv7-r-edition Patch by hug-dev (Hugues de Valon). Differential Revision: https://reviews.llvm.org/D51854 llvm-svn: 343601
* [compiler-rt] [builtins] Add logb/logbf/logbl methods to compiler-rt to ↵Jordan Rupprecht2018-09-246-10/+77
| | | | | | | | | | | | | | | | | | | | | | | avoid libm dependencies when possible. Summary: The complex division builtins (div?c3) use logb methods from libm to scale numbers during division and avoid rounding issues. However, these come from libm, meaning anyone that uses --rtlib=compiler-rt also has to include -lm. Implement logb* methods for standard ieee 754 floats so we can avoid -lm on those platforms, falling back to the old behavior (using either logb() or `__builtin_logb()`) when not supported. These new methods are defined internally as `__compiler_rt_logb` so as not to conflict with the libm definitions in any way. This fixes just the libm methods mentioned in PR32279 and PR28652. libc is still required, although that seems to not be an issue. Note: this is proposed as an alternative to just adding -lm: D49330. Reviewers: efriedma, compnerd, scanon, echristo Reviewed By: echristo Subscribers: jsji, echristo, nemanjai, dberris, mgorny, kbarton, delcypher, llvm-commits, #sanitizers Differential Revision: https://reviews.llvm.org/D49514 llvm-svn: 342917
* [builtins] Add __emutls_unregister_key functionYi Kong2018-09-201-0/+13
| | | | | | | | | | | | This is called by Bionic on dlclose to delete the emutls pthread key. The return value of pthread_key_delete is unchecked and behaviour of multiple calls to the method is dependent on the implementation of pthread_key_delete. Differential Revision: https://reviews.llvm.org/D52251 llvm-svn: 342608
* [builtins] Fix c?zdi2 on sparc64/Linux and ignore riscv32Kristina Brooks2018-09-182-4/+14
| | | | | | | | | | | | | On sparc64/Linux, sparc64 isn't defined; the canonical way of checking for sparc64 is sparc && arch64, which also works on the BSDs and Solaris. Since this problem does not occur on 32-bit architectures, riscv32 can be ignored. This fixes and refines rL324593. Patch by jrtc27 (James Clarke) Differential Revision: https://reviews.llvm.org/D43146 llvm-svn: 342504
* Switch to using a reserved identifier for this internal compiler-rt function.Richard Smith2018-09-082-7/+7
| | | | llvm-svn: 341736
* ARM: wrap call to __clzsi2 so that the name is correct on MachO.Tim Northover2018-09-061-1/+1
| | | | | | | | MachO symbols are prefixed with an extra '_' (that's 3 in total for this function), so assembly calls have to go through a wrapper to insert any prefix needed. llvm-svn: 341540
* [macOS] stop generating the libclang_rt.10.4.a library for macOS 10.4Alex Lorenz2018-08-081-137/+0
| | | | | | | | The support for macOS 10.4 has been dropped by Xcode 10. rdar://42876880 llvm-svn: 339277
* [cmake] [ARM] Exclude any VFP builtins if VFP is not supportedAzharuddin Mohammed2018-07-301-0/+9
| | | | | | | | | | | | | | | | | | | | Summary: rL325492 disables FPU features when using soft floating point (-mfloat-abi=soft), which is used internally when building for arm. This causes errors with builtins that utililize VFP instructions. With this change we check if VFP is enabled (by checking if the preprocessor macro __VFP_FP__ is defined), and exclude such builtins if it is not enabled. Reviewers: rengolin, samsonov, compnerd, smeenai, javed.absar, peter.smith Reviewed By: peter.smith Subscribers: delcypher, peter.smith, mgorny, kristof.beyls, chrib, llvm-commits Differential Revision: https://reviews.llvm.org/D47217 llvm-svn: 338284
* [builtins] Implement the __chkstk function for ARM for MinGWMartin Storsjo2018-07-172-0/+35
| | | | | | | | | | This function is available for linking in from kernel32.dll, but it's not allowed to link that function from there in Windows Store apps. Differential Revision: https://reviews.llvm.org/D49055 llvm-svn: 337313
* Fix bots after r334981Francis Visoiu Mistrih2018-06-191-19/+19
| | | | llvm-svn: 335013
* Fixing os_version_check.c to be actual C sourceChris Bieneman2018-06-181-27/+50
| | | | | | | | | The initial implementaiton was using the C++ typeof keyword. This causes the compiler to spew warnings unnecissarilly. This patch removes the uses of typeof and replaces them with explicit typedefs of the function types. llvm-svn: 334981
* [compiler-rt] [builtins] Don't build __atomic_* by default.Eli Friedman2018-06-141-2/+2
| | | | | | | | | | | The locks need to be implemented in a shared library to work correctly, so they shouldn't be part of libclang_rt.builtins.a, except in specialized scenarios where the user can prove it will only be linked once. Differential Revision: https://reviews.llvm.org/D47606 llvm-svn: 334779
* [builtins] Delay emutls deallocation for one roundRyan Prichard2018-06-121-11/+41
| | | | | | | | | | | | | | | | | | | | Summary: With Android/Bionic, delay deallocation to round 2 of 4. It must run after C++ thread_local destructors have been called, but before the final 2 rounds, because emutls calls free, and jemalloc then needs another 2 rounds to free its thread-specific data. Fixes https://github.com/android-ndk/ndk/issues/687 Reviewers: cmtice, srhines, jyknight, chh, echristo Reviewed By: srhines, chh, echristo Subscribers: echristo, delcypher, llvm-commits, #sanitizers Differential Revision: https://reviews.llvm.org/D46978 llvm-svn: 334463
* [builtins] emutls cleanup: determine header size using sizeofRyan Prichard2018-06-121-6/+7
| | | | | | | | | | | | | | Summary: Also add a few post-#else/#endif comments Reviewers: echristo, srhines Reviewed By: echristo Subscribers: chh, delcypher, llvm-commits, #sanitizers Differential Revision: https://reviews.llvm.org/D47861 llvm-svn: 334462
* Revert "[cmake] [ARM] Check if VFP is supported before including any VFP ↵Azharuddin Mohammed2018-05-241-14/+5
| | | | | | | | builtins" This reverts commit 2a10f5da5acb1b51d0a2ecf13dca0bf1de859db2. llvm-svn: 333232
* [cmake] [ARM] Check if VFP is supported before including any VFP builtinsAzharuddin Mohammed2018-05-241-5/+14
| | | | | | | | | | | | | | | | | | | Summary: rL325492 disables FPU features when using soft floating point (-mfloat-abi=soft), which is used internally when building for armv7. This causes errors with builtins that utililize VFP instructions. With this change we first check if VFP is enabled (by checking if the preprocessor macro __VFP_FP__ is defined) before including such builtins. Reviewers: rengolin, samsonov, compnerd, smeenai, javed.absar, peter.smith Reviewed By: peter.smith Subscribers: peter.smith, mgorny, kristof.beyls, chrib, llvm-commits Differential Revision: https://reviews.llvm.org/D47217 llvm-svn: 333216
* Add basic compiler-rt builtins support for hexagon.Sid Manning2018-05-0931-0/+5467
| | | | | | Differential Revision: https://reviews.llvm.org/D46364 llvm-svn: 331881
* [compiler-rt][X86][AMD][Bulldozer] Fix Bulldozer Model 2 detection.Roman Lebedev2018-05-011-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: The compiler-rt side of D46314 I have discovered an issue by accident. ``` $ lscpu Architecture: x86_64 CPU op-mode(s): 32-bit, 64-bit Byte Order: Little Endian CPU(s): 8 On-line CPU(s) list: 0-7 Thread(s) per core: 2 Core(s) per socket: 4 Socket(s): 1 NUMA node(s): 1 Vendor ID: AuthenticAMD CPU family: 21 Model: 2 Model name: AMD FX(tm)-8350 Eight-Core Processor Stepping: 0 CPU MHz: 3584.018 CPU max MHz: 4000.0000 CPU min MHz: 1400.0000 BogoMIPS: 8027.22 Virtualization: AMD-V L1d cache: 16K L1i cache: 64K L2 cache: 2048K L3 cache: 8192K NUMA node0 CPU(s): 0-7 Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm constant_tsc rep_good nopl nonstop_tsc cpuid extd_apicid aperfmperf pni pclmulqdq monitor ssse3 fma cx16 sse4_1 sse4_2 popcnt aes xsave avx f16c lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs xop skinit wdt lwp fma4 tce nodeid_msr tbm topoext perfctr_core perfctr_nb cpb hw_pstate vmmcall bmi1 arat npt lbrv svm_lock nrip_save tsc_scale vmcb_clean flushbyasid decodeassists pausefilter pfthreshold ``` So this is model-2 bulldozer AMD CPU. GCC agrees: ``` $ echo | gcc -E - -march=native -### <...> /usr/lib/gcc/x86_64-linux-gnu/7/cc1 -E -quiet -imultiarch x86_64-linux-gnu - "-march=bdver2" -mmmx -mno-3dnow -msse -msse2 -msse3 -mssse3 -msse4a -mcx16 -msahf -mno-movbe -maes -mno-sha -mpclmul -mpopcnt -mabm -mlwp -mfma -mfma4 -mxop -mbmi -mno-sgx -mno-bmi2 -mtbm -mavx -mno-avx2 -msse4.2 -msse4.1 -mlzcnt -mno-rtm -mno-hle -mno-rdrnd -mf16c -mno-fsgsbase -mno-rdseed -mprfchw -mno-adx -mfxsr -mxsave -mno-xsaveopt -mno-avx512f -mno-avx512er -mno-avx512cd -mno-avx512pf -mno-prefetchwt1 -mno-clflushopt -mno-xsavec -mno-xsaves -mno-avx512dq -mno-avx512bw -mno-avx512vl -mno-avx512ifma -mno-avx512vbmi -mno-avx5124fmaps -mno-avx5124vnniw -mno-clwb -mno-mwaitx -mno-clzero -mno-pku -mno-rdpid --param "l1-cache-size=16" --param "l1-cache-line-size=64" --param "l2-cache-size=2048" "-mtune=bdver2" <...> ``` But clang does not: (look for `bdver1`) ``` $ echo | clang -E - -march=native -### clang version 7.0.0- (trunk) Target: x86_64-pc-linux-gnu Thread model: posix InstalledDir: /usr/local/bin "/usr/lib/llvm-7/bin/clang" "-cc1" "-triple" "x86_64-pc-linux-gnu" "-E" "-disable-free" "-disable-llvm-verifier" "-discard-value-names" "-main-file-name" "-" "-mrelocation-model" "static" "-mthread-model" "posix" "-mdisable-fp-elim" "-fmath-errno" "-masm-verbose" "-mconstructor-aliases" "-munwind-tables" "-fuse-init-array" "-target-cpu" "bdver1" "-target-feature" "+sse2" "-target-feature" "+cx16" "-target-feature" "+sahf" "-target-feature" "+tbm" "-target-feature" "-avx512ifma" "-target-feature" "-sha" "-target-feature" "-gfni" "-target-feature" "+fma4" "-target-feature" "-vpclmulqdq" "-target-feature" "+prfchw" "-target-feature" "-bmi2" "-target-feature" "-cldemote" "-target-feature" "-fsgsbase" "-target-feature" "-xsavec" "-target-feature" "+popcnt" "-target-feature" "+aes" "-target-feature" "-avx512bitalg" "-target-feature" "-xsaves" "-target-feature" "-avx512er" "-target-feature" "-avx512vnni" "-target-feature" "-avx512vpopcntdq" "-target-feature" "-clwb" "-target-feature" "-avx512f" "-target-feature" "-clzero" "-target-feature" "-pku" "-target-feature" "+mmx" "-target-feature" "+lwp" "-target-feature" "-rdpid" "-target-feature" "+xop" "-target-feature" "-rdseed" "-target-feature" "-waitpkg" "-target-feature" "-ibt" "-target-feature" "+sse4a" "-target-feature" "-avx512bw" "-target-feature" "-clflushopt" "-target-feature" "+xsave" "-target-feature" "-avx512vbmi2" "-target-feature" "-avx512vl" "-target-feature" "-avx512cd" "-target-feature" "+avx" "-target-feature" "-vaes" "-target-feature" "-rtm" "-target-feature" "+fma" "-target-feature" "+bmi" "-target-feature" "-rdrnd" "-target-feature" "-mwaitx" "-target-feature" "+sse4.1" "-target-feature" "+sse4.2" "-target-feature" "-avx2" "-target-feature" "-wbnoinvd" "-target-feature" "+sse" "-target-feature" "+lzcnt" "-target-feature" "+pclmul" "-target-feature" "-prefetchwt1" "-target-feature" "+f16c" "-target-feature" "+ssse3" "-target-feature" "-sgx" "-target-feature" "-shstk" "-target-feature" "+cmov" "-target-feature" "-avx512vbmi" "-target-feature" "-movbe" "-target-feature" "-xsaveopt" "-target-feature" "-avx512dq" "-target-feature" "-adx" "-target-feature" "-avx512pf" "-target-feature" "+sse3" "-dwarf-column-info" "-debugger-tuning=gdb" "-resource-dir" "/usr/lib/llvm-7/lib/clang/7.0.0" "-internal-isystem" "/usr/local/include" "-internal-isystem" "/usr/lib/llvm-7/lib/clang/7.0.0/include" "-internal-externc-isystem" "/usr/include/x86_64-linux-gnu" "-internal-externc-isystem" "/include" "-internal-externc-isystem" "/usr/include" "-fdebug-compilation-dir" "/build/llvm-build-Clang-release" "-ferror-limit" "19" "-fmessage-length" "271" "-fobjc-runtime=gcc" "-fdiagnostics-show-option" "-fcolor-diagnostics" "-o" "-" "-x" "c" "-" ``` So clang, unlike gcc, considers this to be `bdver1`. After some digging, i've come across `getAMDProcessorTypeAndSubtype()` in `Host.cpp`. I have added the following debug printf after the call to that function in `sys::getHostCPUName()`: ``` errs() << "Family " << Family << " Model " << Model << " Type " << Type "\n"; ``` Which produced: ``` Family 21 Model 2 Type 5 ``` Which matches the `lscpu` output. As it was pointed in the review by @craig.topper: >>! In D46314#1084123, @craig.topper wrote: > I dont' think this is right. Here is what I found on wikipedia. https://en.wikipedia.org/wiki/List_of_AMD_CPU_microarchitectures. > > AMD Bulldozer Family 15h - the successor of 10h/K10. Bulldozer is designed for processors in the 10 to 220W category, implementing XOP, FMA4 and CVT16 instruction sets. Orochi was the first design which implemented it. For Bulldozer, CPUID model numbers are 00h and 01h. > AMD Piledriver Family 15h (2nd-gen) - successor to Bulldozer. CPUID model numbers are 02h (earliest "Vishera" Piledrivers) and 10h-1Fh. > AMD Steamroller Family 15h (3rd-gen) - third-generation Bulldozer derived core. CPUID model numbers are 30h-3Fh. > AMD Excavator Family 15h (4th-gen) - fourth-generation Bulldozer derived core. CPUID model numbers are 60h-6Fh, later updated revisions have model numbers 70h-7Fh. > > > So there's a weird exception where model 2 should go with 0x10-0x1f. Though It does not help that the code can't be tested at the moment. With this logical change, the `bdver2` is properly detected. ``` $ echo | /build/llvm-build-Clang-release/bin/clang -E - -march=native -### clang version 7.0.0 (trunk 331249) (llvm/trunk 331256) Target: x86_64-unknown-linux-gnu Thread model: posix InstalledDir: /build/llvm-build-Clang-release/bin "/build/llvm-build-Clang-release/bin/clang-7" "-cc1" "-triple" "x86_64-unknown-linux-gnu" "-E" "-disable-free" "-main-file-name" "-" "-mrelocation-model" "static" "-mthread-model" "posix" "-mdisable-fp-elim" "-fmath-errno" "-masm-verbose" "-mconstructor-aliases" "-munwind-tables" "-fuse-init-array" "-target-cpu" "bdver2" "-target-feature" "+sse2" "-target-feature" "+cx16" "-target-feature" "+sahf" "-target-feature" "+tbm" "-target-feature" "-avx512ifma" "-target-feature" "-sha" "-target-feature" "-gfni" "-target-feature" "+fma4" "-target-feature" "-vpclmulqdq" "-target-feature" "+prfchw" "-target-feature" "-bmi2" "-target-feature" "-cldemote" "-target-feature" "-fsgsbase" "-target-feature" "-xsavec" "-target-feature" "+popcnt" "-target-feature" "+aes" "-target-feature" "-avx512bitalg" "-target-feature" "-movdiri" "-target-feature" "-xsaves" "-target-feature" "-avx512er" "-target-feature" "-avx512vnni" "-target-feature" "-avx512vpopcntdq" "-target-feature" "-clwb" "-target-feature" "-avx512f" "-target-feature" "-clzero" "-target-feature" "-pku" "-target-feature" "+mmx" "-target-feature" "+lwp" "-target-feature" "-rdpid" "-target-feature" "+xop" "-target-feature" "-rdseed" "-target-feature" "-waitpkg" "-target-feature" "-movdir64b" "-target-feature" "-ibt" "-target-feature" "+sse4a" "-target-feature" "-avx512bw" "-target-feature" "-clflushopt" "-target-feature" "+xsave" "-target-feature" "-avx512vbmi2" "-target-feature" "-avx512vl" "-target-feature" "-avx512cd" "-target-feature" "+avx" "-target-feature" "-vaes" "-target-feature" "-rtm" "-target-feature" "+fma" "-target-feature" "+bmi" "-target-feature" "-rdrnd" "-target-feature" "-mwaitx" "-target-feature" "+sse4.1" "-target-feature" "+sse4.2" "-target-feature" "-avx2" "-target-feature" "-wbnoinvd" "-target-feature" "+sse" "-target-feature" "+lzcnt" "-target-feature" "+pclmul" "-target-feature" "-prefetchwt1" "-target-feature" "+f16c" "-target-feature" "+ssse3" "-target-feature" "-sgx" "-target-feature" "-shstk" "-target-feature" "+cmov" "-target-feature" "-avx512vbmi" "-target-feature" "-movbe" "-target-feature" "-xsaveopt" "-target-feature" "-avx512dq" "-target-feature" "-adx" "-target-feature" "-avx512pf" "-target-feature" "+sse3" "-dwarf-column-info" "-debugger-tuning=gdb" "-resource-dir" "/build/llvm-build-Clang-release/lib/clang/7.0.0" "-internal-isystem" "/usr/local/include" "-internal-isystem" "/build/llvm-build-Clang-release/lib/clang/7.0.0/include" "-internal-externc-isystem" "/usr/include/x86_64-linux-gnu" "-internal-externc-isystem" "/include" "-internal-externc-isystem" "/usr/include" "-fdebug-compilation-dir" "/build/llvm-build-Clang-release" "-ferror-limit" "19" "-fmessage-length" "271" "-fobjc-runtime=gcc" "-fdiagnostics-show-option" "-fcolor-diagnostics" "-o" "-" "-x" "c" "-" ``` Reviewers: craig.topper, asbirlea, rnk, GGanesh, andreadb Reviewed By: craig.topper Subscribers: sdardis, dberris, aprantl, arichardson, JDevlieghere, #sanitizers, llvm-commits, cfe-commits, craig.topper Differential Revision: https://reviews.llvm.org/D46323 llvm-svn: 331295
* [PATCH] [compiler-rt, RISCV] Support builtins for RISC-VShiva Chen2018-03-013-1/+35
| | | | | | | | | | | Summary: Support builtins for RISC-V, RV32 and RV64. Reviewers: asb, apazos, mgrang Differential Revision: https://reviews.llvm.org/D42958 llvm-svn: 326420
* [RISCV] Force enable int128 for compiling long double routinesMandeep Singh Grang2018-02-281-0/+6
| | | | | | | | | | | | | | | | | Summary: For RISCV32, we must force enable int128 for compiling long double routines using the flag -fforce-enable-int128. Related clang patch: https://reviews.llvm.org/D43105 Reviewers: asb, kito-cheng, apazos, compnerd, howard.hinnant Reviewed By: kito-cheng Subscribers: shiva0217, efriedma, mgorny, hintonda, llvm-commits, #sanitizers Differential Revision: https://reviews.llvm.org/D43106 llvm-svn: 326346
* [builtins] Workaround for infinite recursion in c?zdi2Jonas Devlieghere2018-02-082-0/+12
| | | | | | | | | | | gcc resolves `__builtin_c?z` to `__c?zdi2` which leads to infinite recursion. This problem has been observed for sparc64, mips64 and riscv. Presumably this happens whenever an arch without dedicated bit counting instructions is targeted. This patch provides a workaround. Differential revision: https://reviews.llvm.org/D42902 llvm-svn: 324593
* [builtins] Align addresses to cache lines in __clear_cache for aarch64Martin Storsjo2018-01-241-2/+4
| | | | | | | | | | | | This makes sure that the last cache line gets invalidated properly. This matches the example code at http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.den0024a/BABJDBHI.html, and also matches what libgcc does. Differential Revision: https://reviews.llvm.org/D42196 llvm-svn: 323315
* [compiler-rt] Implement __clear_cache() on OpenBSD/mips64Kamil Rytarowski2018-01-201-0/+7
| | | | | | | | | | | | | | | | Summary: Make __clear_cache() invoke the platform's cache flush function on OpenBSD/mips64. Reviewers: krytarowski Reviewed By: krytarowski Subscribers: sdardis, dberris, arichardson, krytarowski, llvm-commits, #sanitizers Differential Revision: https://reviews.llvm.org/D42332 llvm-svn: 323039
* [builtins] Use FlushInstructionCache on windows on aarch64 as wellMartin Storsjo2018-01-191-2/+2
| | | | | | | | | | Generalize this handling to a separate toplevel ifdef (since any windows case should use the same function), instead of indenting the aarch64 case one step further. Differential Revision: https://reviews.llvm.org/D42197 llvm-svn: 322928
* Fix PR35739: chkstk and chkst2 should only be built for WindowsDimitry Andric2017-12-241-4/+0
| | | | | | | | | | | | | | | | | | | | As reported in PR35739, rL252927 added the Windows specific chkstk and chkstk2 sources unconditionally, and since these are assembly without a NO_EXEC_STACK_DIRECTIVE at the end, automated vulnerability scanners warned about the objects having an executable stack. Avoid the problem by only including these files when Windows is targeted. Reviewers: compnerd, rnk, martell Reviewed By: martell Subscribers: mstorsjo, mgorny, martell, javed.absar, #sanitizers, llvm-commits Differential Revision: https://reviews.llvm.org/D41567 llvm-svn: 321431
* [builtins] Implement __chkstk for arm64 windowsMartin Storsjo2017-12-202-0/+40
| | | | | | Differential Revision: https://reviews.llvm.org/D41134 llvm-svn: 321151
* Fix more inconsistent line endings. NFC.Dimitry Andric2017-12-181-1/+1
| | | | llvm-svn: 321016
* Add powerpc64 to compiler-rt build infrastructure.Sterling Augustine2017-11-301-0/+14
| | | | | | | | Now that we have disabled the run-forever tests, and cleaned up the intel 80-bit float based tests, we should be able to enable testing compiler-rt for powerpc64. llvm-svn: 319474
* Move x86-specific sources to x86-specific source lists.Sterling Augustine2017-11-301-13/+22
| | | | llvm-svn: 319464
* Fix the MIPS baremetal buildAlexander Richardson2017-11-301-2/+2
| | | | | | | | | | | | | | | | Summary: Currently sys/cachectl.h is used unconditionally on MIPS although it is only available on Linux and will fail the build when targeting baremetal Reviewers: petarj Reviewed By: petarj Subscribers: sdardis, krytarowski Differential Revision: https://reviews.llvm.org/D40659 llvm-svn: 319455
* [X86] Add cpu detection for cannonlake.Craig Topper2017-11-191-0/+7
| | | | | | This uses the same encoding for cannonlake in the proposed gcc patches here. https://gcc.gnu.org/ml/gcc-patches/2017-11/msg00551.html llvm-svn: 318610
OpenPOWER on IntegriCloud