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* Switch to using a reserved identifier for this internal compiler-rt function.Richard Smith2018-09-082-7/+7
| | | | llvm-svn: 341736
* ARM: wrap call to __clzsi2 so that the name is correct on MachO.Tim Northover2018-09-061-1/+1
| | | | | | | | MachO symbols are prefixed with an extra '_' (that's 3 in total for this function), so assembly calls have to go through a wrapper to insert any prefix needed. llvm-svn: 341540
* [macOS] stop generating the libclang_rt.10.4.a library for macOS 10.4Alex Lorenz2018-08-081-137/+0
| | | | | | | | The support for macOS 10.4 has been dropped by Xcode 10. rdar://42876880 llvm-svn: 339277
* [cmake] [ARM] Exclude any VFP builtins if VFP is not supportedAzharuddin Mohammed2018-07-301-0/+9
| | | | | | | | | | | | | | | | | | | | Summary: rL325492 disables FPU features when using soft floating point (-mfloat-abi=soft), which is used internally when building for arm. This causes errors with builtins that utililize VFP instructions. With this change we check if VFP is enabled (by checking if the preprocessor macro __VFP_FP__ is defined), and exclude such builtins if it is not enabled. Reviewers: rengolin, samsonov, compnerd, smeenai, javed.absar, peter.smith Reviewed By: peter.smith Subscribers: delcypher, peter.smith, mgorny, kristof.beyls, chrib, llvm-commits Differential Revision: https://reviews.llvm.org/D47217 llvm-svn: 338284
* [builtins] Implement the __chkstk function for ARM for MinGWMartin Storsjo2018-07-172-0/+35
| | | | | | | | | | This function is available for linking in from kernel32.dll, but it's not allowed to link that function from there in Windows Store apps. Differential Revision: https://reviews.llvm.org/D49055 llvm-svn: 337313
* Fix bots after r334981Francis Visoiu Mistrih2018-06-191-19/+19
| | | | llvm-svn: 335013
* Fixing os_version_check.c to be actual C sourceChris Bieneman2018-06-181-27/+50
| | | | | | | | | The initial implementaiton was using the C++ typeof keyword. This causes the compiler to spew warnings unnecissarilly. This patch removes the uses of typeof and replaces them with explicit typedefs of the function types. llvm-svn: 334981
* [compiler-rt] [builtins] Don't build __atomic_* by default.Eli Friedman2018-06-141-2/+2
| | | | | | | | | | | The locks need to be implemented in a shared library to work correctly, so they shouldn't be part of libclang_rt.builtins.a, except in specialized scenarios where the user can prove it will only be linked once. Differential Revision: https://reviews.llvm.org/D47606 llvm-svn: 334779
* [builtins] Delay emutls deallocation for one roundRyan Prichard2018-06-121-11/+41
| | | | | | | | | | | | | | | | | | | | Summary: With Android/Bionic, delay deallocation to round 2 of 4. It must run after C++ thread_local destructors have been called, but before the final 2 rounds, because emutls calls free, and jemalloc then needs another 2 rounds to free its thread-specific data. Fixes https://github.com/android-ndk/ndk/issues/687 Reviewers: cmtice, srhines, jyknight, chh, echristo Reviewed By: srhines, chh, echristo Subscribers: echristo, delcypher, llvm-commits, #sanitizers Differential Revision: https://reviews.llvm.org/D46978 llvm-svn: 334463
* [builtins] emutls cleanup: determine header size using sizeofRyan Prichard2018-06-121-6/+7
| | | | | | | | | | | | | | Summary: Also add a few post-#else/#endif comments Reviewers: echristo, srhines Reviewed By: echristo Subscribers: chh, delcypher, llvm-commits, #sanitizers Differential Revision: https://reviews.llvm.org/D47861 llvm-svn: 334462
* Revert "[cmake] [ARM] Check if VFP is supported before including any VFP ↵Azharuddin Mohammed2018-05-241-14/+5
| | | | | | | | builtins" This reverts commit 2a10f5da5acb1b51d0a2ecf13dca0bf1de859db2. llvm-svn: 333232
* [cmake] [ARM] Check if VFP is supported before including any VFP builtinsAzharuddin Mohammed2018-05-241-5/+14
| | | | | | | | | | | | | | | | | | | Summary: rL325492 disables FPU features when using soft floating point (-mfloat-abi=soft), which is used internally when building for armv7. This causes errors with builtins that utililize VFP instructions. With this change we first check if VFP is enabled (by checking if the preprocessor macro __VFP_FP__ is defined) before including such builtins. Reviewers: rengolin, samsonov, compnerd, smeenai, javed.absar, peter.smith Reviewed By: peter.smith Subscribers: peter.smith, mgorny, kristof.beyls, chrib, llvm-commits Differential Revision: https://reviews.llvm.org/D47217 llvm-svn: 333216
* Add basic compiler-rt builtins support for hexagon.Sid Manning2018-05-0931-0/+5467
| | | | | | Differential Revision: https://reviews.llvm.org/D46364 llvm-svn: 331881
* [compiler-rt][X86][AMD][Bulldozer] Fix Bulldozer Model 2 detection.Roman Lebedev2018-05-011-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: The compiler-rt side of D46314 I have discovered an issue by accident. ``` $ lscpu Architecture: x86_64 CPU op-mode(s): 32-bit, 64-bit Byte Order: Little Endian CPU(s): 8 On-line CPU(s) list: 0-7 Thread(s) per core: 2 Core(s) per socket: 4 Socket(s): 1 NUMA node(s): 1 Vendor ID: AuthenticAMD CPU family: 21 Model: 2 Model name: AMD FX(tm)-8350 Eight-Core Processor Stepping: 0 CPU MHz: 3584.018 CPU max MHz: 4000.0000 CPU min MHz: 1400.0000 BogoMIPS: 8027.22 Virtualization: AMD-V L1d cache: 16K L1i cache: 64K L2 cache: 2048K L3 cache: 8192K NUMA node0 CPU(s): 0-7 Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm constant_tsc rep_good nopl nonstop_tsc cpuid extd_apicid aperfmperf pni pclmulqdq monitor ssse3 fma cx16 sse4_1 sse4_2 popcnt aes xsave avx f16c lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs xop skinit wdt lwp fma4 tce nodeid_msr tbm topoext perfctr_core perfctr_nb cpb hw_pstate vmmcall bmi1 arat npt lbrv svm_lock nrip_save tsc_scale vmcb_clean flushbyasid decodeassists pausefilter pfthreshold ``` So this is model-2 bulldozer AMD CPU. GCC agrees: ``` $ echo | gcc -E - -march=native -### <...> /usr/lib/gcc/x86_64-linux-gnu/7/cc1 -E -quiet -imultiarch x86_64-linux-gnu - "-march=bdver2" -mmmx -mno-3dnow -msse -msse2 -msse3 -mssse3 -msse4a -mcx16 -msahf -mno-movbe -maes -mno-sha -mpclmul -mpopcnt -mabm -mlwp -mfma -mfma4 -mxop -mbmi -mno-sgx -mno-bmi2 -mtbm -mavx -mno-avx2 -msse4.2 -msse4.1 -mlzcnt -mno-rtm -mno-hle -mno-rdrnd -mf16c -mno-fsgsbase -mno-rdseed -mprfchw -mno-adx -mfxsr -mxsave -mno-xsaveopt -mno-avx512f -mno-avx512er -mno-avx512cd -mno-avx512pf -mno-prefetchwt1 -mno-clflushopt -mno-xsavec -mno-xsaves -mno-avx512dq -mno-avx512bw -mno-avx512vl -mno-avx512ifma -mno-avx512vbmi -mno-avx5124fmaps -mno-avx5124vnniw -mno-clwb -mno-mwaitx -mno-clzero -mno-pku -mno-rdpid --param "l1-cache-size=16" --param "l1-cache-line-size=64" --param "l2-cache-size=2048" "-mtune=bdver2" <...> ``` But clang does not: (look for `bdver1`) ``` $ echo | clang -E - -march=native -### clang version 7.0.0- (trunk) Target: x86_64-pc-linux-gnu Thread model: posix InstalledDir: /usr/local/bin "/usr/lib/llvm-7/bin/clang" "-cc1" "-triple" "x86_64-pc-linux-gnu" "-E" "-disable-free" "-disable-llvm-verifier" "-discard-value-names" "-main-file-name" "-" "-mrelocation-model" "static" "-mthread-model" "posix" "-mdisable-fp-elim" "-fmath-errno" "-masm-verbose" "-mconstructor-aliases" "-munwind-tables" "-fuse-init-array" "-target-cpu" "bdver1" "-target-feature" "+sse2" "-target-feature" "+cx16" "-target-feature" "+sahf" "-target-feature" "+tbm" "-target-feature" "-avx512ifma" "-target-feature" "-sha" "-target-feature" "-gfni" "-target-feature" "+fma4" "-target-feature" "-vpclmulqdq" "-target-feature" "+prfchw" "-target-feature" "-bmi2" "-target-feature" "-cldemote" "-target-feature" "-fsgsbase" "-target-feature" "-xsavec" "-target-feature" "+popcnt" "-target-feature" "+aes" "-target-feature" "-avx512bitalg" "-target-feature" "-xsaves" "-target-feature" "-avx512er" "-target-feature" "-avx512vnni" "-target-feature" "-avx512vpopcntdq" "-target-feature" "-clwb" "-target-feature" "-avx512f" "-target-feature" "-clzero" "-target-feature" "-pku" "-target-feature" "+mmx" "-target-feature" "+lwp" "-target-feature" "-rdpid" "-target-feature" "+xop" "-target-feature" "-rdseed" "-target-feature" "-waitpkg" "-target-feature" "-ibt" "-target-feature" "+sse4a" "-target-feature" "-avx512bw" "-target-feature" "-clflushopt" "-target-feature" "+xsave" "-target-feature" "-avx512vbmi2" "-target-feature" "-avx512vl" "-target-feature" "-avx512cd" "-target-feature" "+avx" "-target-feature" "-vaes" "-target-feature" "-rtm" "-target-feature" "+fma" "-target-feature" "+bmi" "-target-feature" "-rdrnd" "-target-feature" "-mwaitx" "-target-feature" "+sse4.1" "-target-feature" "+sse4.2" "-target-feature" "-avx2" "-target-feature" "-wbnoinvd" "-target-feature" "+sse" "-target-feature" "+lzcnt" "-target-feature" "+pclmul" "-target-feature" "-prefetchwt1" "-target-feature" "+f16c" "-target-feature" "+ssse3" "-target-feature" "-sgx" "-target-feature" "-shstk" "-target-feature" "+cmov" "-target-feature" "-avx512vbmi" "-target-feature" "-movbe" "-target-feature" "-xsaveopt" "-target-feature" "-avx512dq" "-target-feature" "-adx" "-target-feature" "-avx512pf" "-target-feature" "+sse3" "-dwarf-column-info" "-debugger-tuning=gdb" "-resource-dir" "/usr/lib/llvm-7/lib/clang/7.0.0" "-internal-isystem" "/usr/local/include" "-internal-isystem" "/usr/lib/llvm-7/lib/clang/7.0.0/include" "-internal-externc-isystem" "/usr/include/x86_64-linux-gnu" "-internal-externc-isystem" "/include" "-internal-externc-isystem" "/usr/include" "-fdebug-compilation-dir" "/build/llvm-build-Clang-release" "-ferror-limit" "19" "-fmessage-length" "271" "-fobjc-runtime=gcc" "-fdiagnostics-show-option" "-fcolor-diagnostics" "-o" "-" "-x" "c" "-" ``` So clang, unlike gcc, considers this to be `bdver1`. After some digging, i've come across `getAMDProcessorTypeAndSubtype()` in `Host.cpp`. I have added the following debug printf after the call to that function in `sys::getHostCPUName()`: ``` errs() << "Family " << Family << " Model " << Model << " Type " << Type "\n"; ``` Which produced: ``` Family 21 Model 2 Type 5 ``` Which matches the `lscpu` output. As it was pointed in the review by @craig.topper: >>! In D46314#1084123, @craig.topper wrote: > I dont' think this is right. Here is what I found on wikipedia. https://en.wikipedia.org/wiki/List_of_AMD_CPU_microarchitectures. > > AMD Bulldozer Family 15h - the successor of 10h/K10. Bulldozer is designed for processors in the 10 to 220W category, implementing XOP, FMA4 and CVT16 instruction sets. Orochi was the first design which implemented it. For Bulldozer, CPUID model numbers are 00h and 01h. > AMD Piledriver Family 15h (2nd-gen) - successor to Bulldozer. CPUID model numbers are 02h (earliest "Vishera" Piledrivers) and 10h-1Fh. > AMD Steamroller Family 15h (3rd-gen) - third-generation Bulldozer derived core. CPUID model numbers are 30h-3Fh. > AMD Excavator Family 15h (4th-gen) - fourth-generation Bulldozer derived core. CPUID model numbers are 60h-6Fh, later updated revisions have model numbers 70h-7Fh. > > > So there's a weird exception where model 2 should go with 0x10-0x1f. Though It does not help that the code can't be tested at the moment. With this logical change, the `bdver2` is properly detected. ``` $ echo | /build/llvm-build-Clang-release/bin/clang -E - -march=native -### clang version 7.0.0 (trunk 331249) (llvm/trunk 331256) Target: x86_64-unknown-linux-gnu Thread model: posix InstalledDir: /build/llvm-build-Clang-release/bin "/build/llvm-build-Clang-release/bin/clang-7" "-cc1" "-triple" "x86_64-unknown-linux-gnu" "-E" "-disable-free" "-main-file-name" "-" "-mrelocation-model" "static" "-mthread-model" "posix" "-mdisable-fp-elim" "-fmath-errno" "-masm-verbose" "-mconstructor-aliases" "-munwind-tables" "-fuse-init-array" "-target-cpu" "bdver2" "-target-feature" "+sse2" "-target-feature" "+cx16" "-target-feature" "+sahf" "-target-feature" "+tbm" "-target-feature" "-avx512ifma" "-target-feature" "-sha" "-target-feature" "-gfni" "-target-feature" "+fma4" "-target-feature" "-vpclmulqdq" "-target-feature" "+prfchw" "-target-feature" "-bmi2" "-target-feature" "-cldemote" "-target-feature" "-fsgsbase" "-target-feature" "-xsavec" "-target-feature" "+popcnt" "-target-feature" "+aes" "-target-feature" "-avx512bitalg" "-target-feature" "-movdiri" "-target-feature" "-xsaves" "-target-feature" "-avx512er" "-target-feature" "-avx512vnni" "-target-feature" "-avx512vpopcntdq" "-target-feature" "-clwb" "-target-feature" "-avx512f" "-target-feature" "-clzero" "-target-feature" "-pku" "-target-feature" "+mmx" "-target-feature" "+lwp" "-target-feature" "-rdpid" "-target-feature" "+xop" "-target-feature" "-rdseed" "-target-feature" "-waitpkg" "-target-feature" "-movdir64b" "-target-feature" "-ibt" "-target-feature" "+sse4a" "-target-feature" "-avx512bw" "-target-feature" "-clflushopt" "-target-feature" "+xsave" "-target-feature" "-avx512vbmi2" "-target-feature" "-avx512vl" "-target-feature" "-avx512cd" "-target-feature" "+avx" "-target-feature" "-vaes" "-target-feature" "-rtm" "-target-feature" "+fma" "-target-feature" "+bmi" "-target-feature" "-rdrnd" "-target-feature" "-mwaitx" "-target-feature" "+sse4.1" "-target-feature" "+sse4.2" "-target-feature" "-avx2" "-target-feature" "-wbnoinvd" "-target-feature" "+sse" "-target-feature" "+lzcnt" "-target-feature" "+pclmul" "-target-feature" "-prefetchwt1" "-target-feature" "+f16c" "-target-feature" "+ssse3" "-target-feature" "-sgx" "-target-feature" "-shstk" "-target-feature" "+cmov" "-target-feature" "-avx512vbmi" "-target-feature" "-movbe" "-target-feature" "-xsaveopt" "-target-feature" "-avx512dq" "-target-feature" "-adx" "-target-feature" "-avx512pf" "-target-feature" "+sse3" "-dwarf-column-info" "-debugger-tuning=gdb" "-resource-dir" "/build/llvm-build-Clang-release/lib/clang/7.0.0" "-internal-isystem" "/usr/local/include" "-internal-isystem" "/build/llvm-build-Clang-release/lib/clang/7.0.0/include" "-internal-externc-isystem" "/usr/include/x86_64-linux-gnu" "-internal-externc-isystem" "/include" "-internal-externc-isystem" "/usr/include" "-fdebug-compilation-dir" "/build/llvm-build-Clang-release" "-ferror-limit" "19" "-fmessage-length" "271" "-fobjc-runtime=gcc" "-fdiagnostics-show-option" "-fcolor-diagnostics" "-o" "-" "-x" "c" "-" ``` Reviewers: craig.topper, asbirlea, rnk, GGanesh, andreadb Reviewed By: craig.topper Subscribers: sdardis, dberris, aprantl, arichardson, JDevlieghere, #sanitizers, llvm-commits, cfe-commits, craig.topper Differential Revision: https://reviews.llvm.org/D46323 llvm-svn: 331295
* [PATCH] [compiler-rt, RISCV] Support builtins for RISC-VShiva Chen2018-03-013-1/+35
| | | | | | | | | | | Summary: Support builtins for RISC-V, RV32 and RV64. Reviewers: asb, apazos, mgrang Differential Revision: https://reviews.llvm.org/D42958 llvm-svn: 326420
* [RISCV] Force enable int128 for compiling long double routinesMandeep Singh Grang2018-02-281-0/+6
| | | | | | | | | | | | | | | | | Summary: For RISCV32, we must force enable int128 for compiling long double routines using the flag -fforce-enable-int128. Related clang patch: https://reviews.llvm.org/D43105 Reviewers: asb, kito-cheng, apazos, compnerd, howard.hinnant Reviewed By: kito-cheng Subscribers: shiva0217, efriedma, mgorny, hintonda, llvm-commits, #sanitizers Differential Revision: https://reviews.llvm.org/D43106 llvm-svn: 326346
* [builtins] Workaround for infinite recursion in c?zdi2Jonas Devlieghere2018-02-082-0/+12
| | | | | | | | | | | gcc resolves `__builtin_c?z` to `__c?zdi2` which leads to infinite recursion. This problem has been observed for sparc64, mips64 and riscv. Presumably this happens whenever an arch without dedicated bit counting instructions is targeted. This patch provides a workaround. Differential revision: https://reviews.llvm.org/D42902 llvm-svn: 324593
* [builtins] Align addresses to cache lines in __clear_cache for aarch64Martin Storsjo2018-01-241-2/+4
| | | | | | | | | | | | This makes sure that the last cache line gets invalidated properly. This matches the example code at http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.den0024a/BABJDBHI.html, and also matches what libgcc does. Differential Revision: https://reviews.llvm.org/D42196 llvm-svn: 323315
* [compiler-rt] Implement __clear_cache() on OpenBSD/mips64Kamil Rytarowski2018-01-201-0/+7
| | | | | | | | | | | | | | | | Summary: Make __clear_cache() invoke the platform's cache flush function on OpenBSD/mips64. Reviewers: krytarowski Reviewed By: krytarowski Subscribers: sdardis, dberris, arichardson, krytarowski, llvm-commits, #sanitizers Differential Revision: https://reviews.llvm.org/D42332 llvm-svn: 323039
* [builtins] Use FlushInstructionCache on windows on aarch64 as wellMartin Storsjo2018-01-191-2/+2
| | | | | | | | | | Generalize this handling to a separate toplevel ifdef (since any windows case should use the same function), instead of indenting the aarch64 case one step further. Differential Revision: https://reviews.llvm.org/D42197 llvm-svn: 322928
* Fix PR35739: chkstk and chkst2 should only be built for WindowsDimitry Andric2017-12-241-4/+0
| | | | | | | | | | | | | | | | | | | | As reported in PR35739, rL252927 added the Windows specific chkstk and chkstk2 sources unconditionally, and since these are assembly without a NO_EXEC_STACK_DIRECTIVE at the end, automated vulnerability scanners warned about the objects having an executable stack. Avoid the problem by only including these files when Windows is targeted. Reviewers: compnerd, rnk, martell Reviewed By: martell Subscribers: mstorsjo, mgorny, martell, javed.absar, #sanitizers, llvm-commits Differential Revision: https://reviews.llvm.org/D41567 llvm-svn: 321431
* [builtins] Implement __chkstk for arm64 windowsMartin Storsjo2017-12-202-0/+40
| | | | | | Differential Revision: https://reviews.llvm.org/D41134 llvm-svn: 321151
* Fix more inconsistent line endings. NFC.Dimitry Andric2017-12-181-1/+1
| | | | llvm-svn: 321016
* Add powerpc64 to compiler-rt build infrastructure.Sterling Augustine2017-11-301-0/+14
| | | | | | | | Now that we have disabled the run-forever tests, and cleaned up the intel 80-bit float based tests, we should be able to enable testing compiler-rt for powerpc64. llvm-svn: 319474
* Move x86-specific sources to x86-specific source lists.Sterling Augustine2017-11-301-13/+22
| | | | llvm-svn: 319464
* Fix the MIPS baremetal buildAlexander Richardson2017-11-301-2/+2
| | | | | | | | | | | | | | | | Summary: Currently sys/cachectl.h is used unconditionally on MIPS although it is only available on Linux and will fail the build when targeting baremetal Reviewers: petarj Reviewed By: petarj Subscribers: sdardis, krytarowski Differential Revision: https://reviews.llvm.org/D40659 llvm-svn: 319455
* [X86] Add cpu detection for cannonlake.Craig Topper2017-11-191-0/+7
| | | | | | This uses the same encoding for cannonlake in the proposed gcc patches here. https://gcc.gnu.org/ml/gcc-patches/2017-11/msg00551.html llvm-svn: 318610
* [builtins] Include GENERIC_SOURCES in arm_SOURCES for MinGWMartin Storsjo2017-11-141-0/+1
| | | | | | | | | It is included in the built sources for all other arches supported for MinGW currently, except for arm. Differential Revision: https://reviews.llvm.org/D39938 llvm-svn: 318139
* [Builtins] Do not use tailcall for Thumb1Weiming Zhao2017-11-094-0/+30
| | | | | | | | | | | | | | | | Summary: The `b` instruction in Thumb1 has limited range, which may cause link-time errors if the jump target is far away. This patch guards the tailcalls for non-Thumb1 Reviewers: peter.smith, compnerd, rengolin, eli.friedman Reviewed By: rengolin Subscribers: joerg, dalias, javed.absar, llvm-commits Differential Revision: https://reviews.llvm.org/D39700 llvm-svn: 317814
* [WebAssembly] Include GENERIC_TF_SOURCES in wasm buildsSam Clegg2017-11-071-2/+6
| | | | | | Differential Revision: https://reviews.llvm.org/D39748 llvm-svn: 317601
* [X86] Add Knights Mill CPU to cpu_indicator support to match libgcc.Craig Topper2017-10-111-0/+5
| | | | llvm-svn: 315505
* [compiler-rt] Add back ARM EABI aliases where legal.Eli Friedman2017-10-0340-82/+145
| | | | | | | | | | | | | | r303188 removed all the uses of aliases for EABI functions from compiler-rt, because some of them had mismatched calling conventions. Obviously, we can't use aliases for functions which don't have the same calling convention, but that's only an issue for floating-point functions with the hardfloat ABI. In other cases, the stubs increase size and reduce performance for no benefit. This patch adds back the aliases, with appropriate checks to make sure they're only used in cases where the calling convention matches. llvm-svn: 314851
* [builtins] ARM: Reland fix for assembling builtins in thumb state.Manoj Gupta2017-10-023-4/+15
| | | | | | | | | | | | | | | | | | | | | | Summary: clang does not assemble files in thumb mode unless .thumb declaration is present. Add .thumb/.arm decl to _FUNCTION macros to ensure that files are assembled correctly. Also add a fix to ensure that armv7k-watchos can assemble the aeabi_c{f|d}cmp.S files. Fixes PR 34715. Reviewers: compnerd, peter.smith, srhines, weimingz, rengolin, efriedma, t.p.northover, fjricci Reviewed By: compnerd Subscribers: aemerson, javed.absar, llvm-commits, kristof.beyls Differential Revision: https://reviews.llvm.org/D38390 llvm-svn: 314718
* [builtins] ARM: Revert r314284, r314285 and r314289Manoj Gupta2017-09-273-9/+4
| | | | | | | Revert r314284, r314285 and r314289 because of a reported breakage in armv7k watchos builder. llvm-svn: 314333
* [ARM] builtins: Replace abort by assert in clear_cache.Manoj Gupta2017-09-271-3/+2
| | | | | | | | | | | | | | | | | | | | Summary: __builtion___clear_cache maps to clear_cache function. On Linux, clear_cache functions makes a syscall and does an abort if syscall fails. Replace the abort by an assert so that non-debug builds do not abort if the syscall fails. Fixes PR34588. Reviewers: rengolin, compnerd, srhines, peter.smith, joerg Reviewed By: rengolin Subscribers: aemerson, kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D37788 llvm-svn: 314322
* [builtins] fix build error on non-ARM for r314285.Manoj Gupta2017-09-271-0/+1
| | | | llvm-svn: 314289
* [Builtins] ARM: Fix assembling files in thumb mode.Manoj Gupta2017-09-271-2/+6
| | | | | | | | | | | | | | | | | | | Summary: clang does not assemble files in thumb mode unless .thumb declaration is present. Add .thumb/.arm decl to _FUNCTION macros to ensure that files are assembled correctly. Fixes PR 34715. Reviewers: compnerd, peter.smith, srhines, weimingz, rengolin Reviewed By: compnerd Subscribers: aemerson, javed.absar, llvm-commits, kristof.beyls Differential Revision: https://reviews.llvm.org/D38227 llvm-svn: 314285
* [Builtins] ARM: Fix msr assembly instruction use for Thumb2.Manoj Gupta2017-09-272-2/+2
| | | | | | | | | | | | | | | | | | Summary: MSR instruction in Thumb2 does not support immediate operand. Fix this by moving the condition for V7-M to Thumb2 since V7-M support Thumb2 only. With this change, aeabi_cfcmp.s and aeabi_cdcmp.S files can be assembled in Thumb2 mode. (This is split out from the review D38227). Reviewers: compnerd, peter.smith, srhines, weimingz, rengolin, kristof.beyls Reviewed By: compnerd Subscribers: aemerson, javed.absar, llvm-commits Differential Revision: https://reviews.llvm.org/D38268 llvm-svn: 314284
* [Builtins] Use 4 byte alignment for __aeabi_memclr.Manoj Gupta2017-09-261-0/+1
| | | | | | | | | | | | | | | | | Summary: Align __aeabi_memclr to 4 bytes. All other ARM functions are already aligned to 4-bytes in compiler-rt. (Split off from review D38227) Reviewers: compnerd, peter.smith, srhines, weimingz, rengolin, kristof.beyls Reviewed By: compnerd Subscribers: aemerson, javed.absar, llvm-commits Differential Revision: https://reviews.llvm.org/D38271 llvm-svn: 314255
* [builtins] Prevent duplicate definitions for overridden functionsFrancis Ricci2017-08-301-6/+6
| | | | | | | | | | | | | | | Summary: Some architecture-specific function overrides (for example, i386/ashrdi3.S) duplicate generic functions (in that case, ashrdi3.c). Prevent duplicate definitions by filtering out the generic files before compiling. Reviewers: compnerd, beanz Subscribers: llvm-commits, mgorny Differential Revision: https://reviews.llvm.org/D37166 llvm-svn: 312140
* Reland r311842 - [cmake] Remove i686 target that is duplicate to i386Michal Gorny2017-08-281-7/+1
| | | | | | | | | | | | | | | | | | | | | | | | Remove the explicit i686 target that is completely duplicate to the i386 target, with the latter being used more commonly. 1. The runtime built for i686 will be identical to the one built for i386. 2. Supporting both -i386 and -i686 suffixes causes unnecessary confusion on the clang end which has to expect either of them. 3. The checks are based on wrong assumption that __i686__ is defined for all newer x86 CPUs. In fact, it is only declared when -march=i686 is explicitly used. It is not available when a more specific (or newer) -march is used. Curious enough, if CFLAGS contain -march=i686, the runtime will be built both for i386 and i686. For any other value, only i386 variant will be built. Differential Revision: https://reviews.llvm.org/D26764 llvm-svn: 311924
* Revert r311842 - [cmake] Remove i686 target that is duplicate to i386Michal Gorny2017-08-271-1/+7
| | | | | | | The required change in clang is being reverted because of the Android build bot failure. llvm-svn: 311859
* [cmake] Remove i686 target that is duplicate to i386Michal Gorny2017-08-271-7/+1
| | | | | | | | | | | | | | | | | | | | | | | | Remove the explicit i686 target that is completely duplicate to the i386 target, with the latter being used more commonly. 1. The runtime built for i686 will be identical to the one built for i386. 2. Supporting both -i386 and -i686 suffixes causes unnecessary confusion on the clang end which has to expect either of them. 3. The checks are based on wrong assumption that __i686__ is defined for all newer x86 CPUs. In fact, it is only declared when -march=i686 is explicitly used. It is not available when a more specific (or newer) -march is used. Curious enough, if CFLAGS contain -march=i686, the runtime will be built both for i386 and i686. For any other value, only i386 variant will be built. Differential Revision: https://reviews.llvm.org/D26764 llvm-svn: 311842
* [ARM][Compiler-rt] Fix AEABI builtins to correctly pass arguments to ↵Oleg Ranevskyy2017-08-232-0/+18
| | | | | | | | | | | | | | | | | | | non-AEABI functions on HF targets Summary: This is a patch for PR34167. On HF targets functions like `__{eq,lt,le,ge,gt}df2` and `__{eq,lt,le,ge,gt}sf2` expect their arguments to be passed in d/s registers, while some of the AEABI builtins pass them in r registers. Reviewers: compnerd, peter.smith, asl Reviewed By: peter.smith, asl Subscribers: peter.smith, aemerson, dberris, javed.absar, llvm-commits, asl, kristof.beyls Differential Revision: https://reviews.llvm.org/D36675 llvm-svn: 311555
* Revert "builtins: erase `struct` modifier for EH personality"Saleem Abdulrasool2017-08-221-25/+17
| | | | | | | | This reverts SVN r311425 which broke one of the buildbots. It is unclear what header is being used there. Revert it until that can be handled properly. llvm-svn: 311426
* builtins: erase `struct` modifier for EH personalitySaleem Abdulrasool2017-08-221-17/+25
| | | | | | | | | On ARM, the `_Unwind_Exception` is an alias for `struct _Unwind_Control_Block`. The extra `struct` modifier causes a warning due to the locally scoped type. Special case this to avoid the warning. NFC. llvm-svn: 311425
* [builtins] fix build error on non-ARM for r310884Weiming Zhao2017-08-141-0/+2
| | | | llvm-svn: 310890
* [builtins][ARM] Select correct code fragments when compiling for ↵Weiming Zhao2017-08-1416-128/+95
| | | | | | | | | | | | | | | | | | | | | | | | | Thumb1/Thum2/ARM ISA Summary: Value of __ARM_ARCH_ISA_THUMB isn't based on the actual compilation mode (-mthumb, -marm), it reflect's capability of given CPU. Due to this: •use tbumb and thumb2 insteand of __ARM_ARCH_ISA_THUMB •use '.thumb' directive consistently in all affected files •decorate all thumb functions using DEFINE_COMPILERRT_THUMB_FUNCTION() (This is based off Michal's patch https://reviews.llvm.org/D30938) Reviewers: dim, rengolin, compnerd, strejda Reviewed By: compnerd Subscribers: peter.smith, kubamracek, mgorny, javed.absar, kristof.beyls, jamesduley, aemerson, llvm-commits Differential Revision: https://reviews.llvm.org/D31220 llvm-svn: 310884
* [compiler-rt][ARM] Fix filtering of ARM targetsOleg Ranevskyy2017-08-101-2/+6
| | | | | | | | | | | | | | | | | Summary: Similarly to i686, the ARM build target has multiple names, such as armhf, armv7 and so on. Currently we get duplicated symbol definitions for these targets while compiling the library. Each duplicated definition has its generic version from `lib/builtins` and an ARM-specialized version from `lib/builtins/arm`. This patch fixes filtering for ARM to ignore the generic definitions if they have their ARM specializations. Reviewers: compnerd Reviewed By: compnerd Subscribers: aemerson, dberris, llvm-commits, mgorny, asl, kristof.beyls Differential Revision: https://reviews.llvm.org/D35336 llvm-svn: 310588
* [builtins] Use Interlocked* intrinsics for atomics on MSVCMartin Storsjo2017-08-031-8/+6
| | | | | | | | | | | | Tested on MSVC 2013, 2015 and 2017 targeting X86, X64 and ARM. This fixes building emutls.c for Windows for ARM (both with clang which don't need these atomics fallbacks at all, but just failed due to the immintrin.h include before, and with MSVC). Differential Revision: https://reviews.llvm.org/D36071 llvm-svn: 309974
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