summaryrefslogtreecommitdiffstats
path: root/compiler-rt/lib/builtins/arm/aeabi_cdcmp.S
Commit message (Collapse)AuthorAgeFilesLines
* Update more file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
| | | | | | | | | | | | | | | | | | to reflect the new license. These used slightly different spellings that defeated my regular expressions. We understand that people may be surprised that we're moving the header entirely to discuss the new license. We checked this carefully with the Foundation's lawyer and we believe this is the correct approach. Essentially, all code in the project is now made available by the LLVM project under our new license, so you will see that the license headers include that license only. Some of our contributors have contributed code under our old license, and accordingly, we have retained a copy of our old license notice in the top-level files in each project and repository. llvm-svn: 351648
* [Arm builtins] Remove non-necessary IS checkKristina Brooks2018-10-021-5/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch removes the instruction set check to make the msr APSR_nzcvq, ip instruction only execute if Thumb2 is used. The APSR is a subset of the bits of the CPSR (B.1.3.3 of the Arm v7 A and R ARM [1]) and is only available for A and R profiles. However in section B.9.3.11 of the same document we see that: "In the A and R profiles, APSR_nzcvq is the same as CPSR_f" "ARM recommends the APSR forms when only the N, Z, C, V, Q, and GE[3:0] bits are being written." This patch also make those files assemble for Armv8-M Mainline architecture profile. The builtins were cross-compiled for Arm, Aarch64 and Armv6-M, Armv7-M and Armv7E-M targets. Cross-compiled tests were executed for Arm target. [1]: https://developer.arm.com/docs/ddi0406/latest/arm-architecture-reference-manual-armv7-a-and-armv7-r-edition Patch by hug-dev (Hugues de Valon). Differential Revision: https://reviews.llvm.org/D51854 llvm-svn: 343601
* [builtins] ARM: Reland fix for assembling builtins in thumb state.Manoj Gupta2017-10-021-1/+4
| | | | | | | | | | | | | | | | | | | | | | Summary: clang does not assemble files in thumb mode unless .thumb declaration is present. Add .thumb/.arm decl to _FUNCTION macros to ensure that files are assembled correctly. Also add a fix to ensure that armv7k-watchos can assemble the aeabi_c{f|d}cmp.S files. Fixes PR 34715. Reviewers: compnerd, peter.smith, srhines, weimingz, rengolin, efriedma, t.p.northover, fjricci Reviewed By: compnerd Subscribers: aemerson, javed.absar, llvm-commits, kristof.beyls Differential Revision: https://reviews.llvm.org/D38390 llvm-svn: 314718
* [builtins] ARM: Revert r314284, r314285 and r314289Manoj Gupta2017-09-271-1/+1
| | | | | | | Revert r314284, r314285 and r314289 because of a reported breakage in armv7k watchos builder. llvm-svn: 314333
* [Builtins] ARM: Fix msr assembly instruction use for Thumb2.Manoj Gupta2017-09-271-1/+1
| | | | | | | | | | | | | | | | | | Summary: MSR instruction in Thumb2 does not support immediate operand. Fix this by moving the condition for V7-M to Thumb2 since V7-M support Thumb2 only. With this change, aeabi_cfcmp.s and aeabi_cdcmp.S files can be assembled in Thumb2 mode. (This is split out from the review D38227). Reviewers: compnerd, peter.smith, srhines, weimingz, rengolin, kristof.beyls Reviewed By: compnerd Subscribers: aemerson, javed.absar, llvm-commits Differential Revision: https://reviews.llvm.org/D38268 llvm-svn: 314284
* [builtins][ARM] Select correct code fragments when compiling for ↵Weiming Zhao2017-08-141-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | Thumb1/Thum2/ARM ISA Summary: Value of __ARM_ARCH_ISA_THUMB isn't based on the actual compilation mode (-mthumb, -marm), it reflect's capability of given CPU. Due to this: •use tbumb and thumb2 insteand of __ARM_ARCH_ISA_THUMB •use '.thumb' directive consistently in all affected files •decorate all thumb functions using DEFINE_COMPILERRT_THUMB_FUNCTION() (This is based off Michal's patch https://reviews.llvm.org/D30938) Reviewers: dim, rengolin, compnerd, strejda Reviewed By: compnerd Subscribers: peter.smith, kubamracek, mgorny, javed.absar, kristof.beyls, jamesduley, aemerson, llvm-commits Differential Revision: https://reviews.llvm.org/D31220 llvm-svn: 310884
* Allow armv{7,7s,7k,7m,7em} buildsJonathan Roelofs2017-05-241-0/+11
| | | | llvm-svn: 303765
* [Builtin][ARM] Add Thumb1 support for aeabi_c{f,d}cmp.S and dcmp.SWeiming Zhao2017-01-271-0/+37
| | | | | | | | | | | | Reviewers: compnerd, rengolin Reviewed By: rengolin Subscribers: aemerson, llvm-commits, mgorny Differential Revision: https://reviews.llvm.org/D28985 llvm-svn: 293247
* builtins: tag with noexecstackSaleem Abdulrasool2016-06-221-0/+2
| | | | | | | | | | | | These routines do not require executable stacks. However, by default ELFish linkers may assume an executable stack on GNUish environments (and some non-GNU ones too!). The GNU extension to add a note to indicate a non-executable stack is honoured by these environments to mark the stack as non-executable (the compiler normally emits this directive on appropriate targets whenever possible). This allows normal builds from getting executable stacks due to linking to the compiler rt builtins. llvm-svn: 273500
* Implement __aeabi_c{d,f}{cmpeq,cmple,rcmple}.Josh Gao2015-08-211-0/+96
Summary: Implement more missing ARM EABI runtime functions. Reviewers: rengolin, compnerd Subscribers: pirama, srhines, danalbert, aemerson, llvm-commits Differential Revision: http://reviews.llvm.org/D12089 llvm-svn: 245648
OpenPOWER on IntegriCloud