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* [RISCV] Set triple based on -march flagSimon Cook2019-11-181-0/+12
| | | | | | | | | For RISC-V the value provided to -march should determine whether to compile for 32- or 64-bit RISC-V irrespective of the target provided to the Clang driver. This adds a test for this flag for RISC-V and sets the Target architecture correctly in these cases. Differential Revision: https://reviews.llvm.org/D54214
* Revert "[RISCV] Mark unit tests as "requires: riscv-registered-target""Mandeep Singh Grang2018-12-051-2/+0
| | | | | | This reverts commit 8908dd12e7bbfc74e264233e900206ad31e285f0. llvm-svn: 348402
* [RISCV] Mark unit tests as "requires: riscv-registered-target"Mandeep Singh Grang2018-11-271-0/+2
| | | | | | | | Some of these tests break if the RISCV backend has not been built. Reland D54816. llvm-svn: 347720
* Revert "[RISCV] Mark unit tests as "requires: riscv-registered-target""Mandeep Singh Grang2018-11-271-0/+317
| | | | | | This reverts commit 1a6a0c9ea2716378d55858c11adf5941608531f8. llvm-svn: 347689
* [RISCV] Mark unit tests as "requires: riscv-registered-target"Mandeep Singh Grang2018-11-271-317/+0
| | | | | | | | | | | | | | Summary: Some of these tests break if the RISCV backend has not been built. Reviewers: asb, apazos, sabuasal Reviewed By: sabuasal Subscribers: rbar, johnrusso, simoncook, sabuasal, niosHD, kito-cheng, shiva0217, jrtc27, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, cfe-commits Differential Revision: https://reviews.llvm.org/D54816 llvm-svn: 347688
* [RISCV] More validations on the input value of -march=Ana Pazos2018-04-251-59/+287
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Supporting additional rules for parsing ISA string. - RISC-V ISA strings must be lowercase. E.g.: rv32IMC is not supported, rv32imc is correct. - Multi-letter extensions are to be separated by a single underscore '_'. The extension prefix counts as a letter. This means extensions that start with 's', 'sx' and 'sx' are all multi-letter. E.g.: xasb is a single non-standard extension named 'xasb' xa_sb are two extensions, the non-standard user level extension 'xa', and the supervisor level extension 'sb'. - Standard user-level extensions are specified following a canonical order, according to Table 22.1 in RISC-V User-Level ISA V2.2. - Non-standard user-level 'x' extensions, standard supervisor-level 's' extensions and non-standard supervisor-level 'sx' extensions are also specified following a canonical order according to Table 22.1 in RISC-V User-Level ISA V2.2: 'x' extensions, follwed by 's' extensions and then 'sx' extensions. - Extensions might have a version number. Underscores may be used to separate ISA subset components to improve readability and to provide disambiguation. E.g.: rv32i2_m3_a1_f2_d2 - Version numbers are divided into major and minor numbers, separated by a 'p'. If the minor version is 0, then 'p0' can be omitted. - Additional checks for dependent extensions and invalid extensions combinations. E.g.: 'e' requires rv32 'e' can't be combined with 'f' nor 'd' 'q' requires rv64 - TODO items have also been marked with comments in the code. Reviewers: asb, kito-cheng Reviewed By: asb Subscribers: edward-jones, mgrang, zzheng, rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal, niosHD, shiva0217, cfe-commits Differential Revision: https://reviews.llvm.org/D45284 llvm-svn: 330880
* [PATCH] [RISCV] Verify the input value of -march=Shiva Chen2018-03-281-0/+89
Summary: This patch doing more check and verify the -march= string and will issue an error if it's a invalid combination. Reviewers: asb, apazos Differential Revision: https://reviews.llvm.org/D44189 Patch by Kito Cheng. llvm-svn: 328690
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