| Commit message (Collapse) | Author | Age | Files | Lines |
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8548 CPU is GCC's name for the e500v2, so accept this in clang. The
e500v2 doesn't support lwsync, so define __NO_LWSYNC__ for this as well,
as GCC does.
Differential Revision: https://reviews.llvm.org/D67787
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with '-mframe-pointer'
After D56351 and D64294, frame pointer handling is migrated to tri-state
(all, non-leaf, none) in clang driver and on the function attribute.
This patch makes the frame pointer handling cc1 option tri-state.
Reviewers: chandlerc, rnk, t.p.northover, MaskRay
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D56353
llvm-svn: 366645
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There was a slight typo in r364352 that ended up causing our backend to
complain on some x86 Android builds. This CL fixes that.
Differential Revision: https://reviews.llvm.org/D64781
llvm-svn: 366276
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The android target assumes that for the x86_64 target, the CPU supports SSE4.2
and popcnt. This implies that the CPU is Nehalem or newer. This should be
sufficiently new to provide the double word compare and exchange instruction.
This allows us to directly lower `__sync_val_compare_and_swap_16` to a `cmpxchg16b`.
It appears that the libatomic in android's NDK does not provide the
implementation for lowering calls to the library function.
llvm-svn: 364352
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Add an -mtp=el[0-3] option to select which of the AArch64 thread ID registers
will be used for the TLS base pointer.
This is a followup to rL356657 which added subtarget features to enable
accesses to the privileged thread ID registers.
Patch by Philip Derrin!
Differential revision: https://reviews.llvm.org/D59631
llvm-svn: 357250
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On Darwin, using '-arch x86_64h' would always override the option passed
through '-march'.
This patch allows users to use '-march' with x86_64h, while keeping the
default to 'core-avx2'
Differential Revision: https://reviews.llvm.org/D55775
llvm-svn: 349381
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This change adds support for the following MIPS target triples:
mipsisa32r6-linux-gnu
mipsisa32r6el-linux-gnu
mipsisa64r6-linux-gnuabi64
mipsisa64r6el-linux-gnuabi64
mipsisa64r6-linux-gnuabin32
mipsisa64r6el-linux-gnuabin32
Patch by Yun Qiang Su.
Differential revision: https://reviews.llvm.org/D50850
llvm-svn: 344608
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The `GNUABIN32` environment in a target triple implies using the N32
ABI. This patch adds support for this environment and switches on N32
ABI if necessary.
Patch by Patch by YunQiang Su.
Differential revision: https://reviews.llvm.org/D51464
llvm-svn: 344570
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LLVM triple normalization is handling "unknown" and empty components
differently; for example given "x86_64-unknown-linux-gnu" and
"x86_64-linux-gnu" which should be equivalent, triple normalization
returns "x86_64-unknown-linux-gnu" and "x86_64--linux-gnu". autoconf's
config.sub returns "x86_64-unknown-linux-gnu" for both
"x86_64-linux-gnu" and "x86_64-unknown-linux-gnu". This changes the
triple normalization to behave the same way, replacing empty triple
components with "unknown".
This addresses PR37129.
Differential Revision: https://reviews.llvm.org/D50219
llvm-svn: 339294
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We make the same decision when compiling the kernel or kexts -- we
should do this in -ffreestanding mode as well to avoid size regressions
in a potentially large set of firmware projects.
It's still possible to get uwtable information in -ffreestanding mode by
compiling with -funwind-tables (I expect this to be a rare case: I
certainly haven't seen any projects like that).
Context: -munwind-tables was enabled by default for some arm targets in
r310006.
Testing: check-clang
rdar://problem/33934446
Differential Revision: https://reviews.llvm.org/D37777
llvm-svn: 313087
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This patch enables option for reading thread pointer directly
from coprocessor register (-mtp=soft/cp15).
Differential Revision: https://reviews.llvm.org/D34878
llvm-svn: 313018
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supplied.
With this change, -fno-exceptions disables unwind tables unless
-funwind-tables is supplied too or the target is x86-64 (x86-64 requires
emitting unwind tables).
rdar://problem/33934446
llvm-svn: 311397
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This commit fixes a bug where clang/llvm doesn't emit an unwind table
for a function when it is marked noexcept. Without this patch, the
following code terminates with an uncaught exception on ARM64:
int foo1() noexcept {
try {
throw 0;
} catch (int i) {
return 0;
}
return 1;
}
int main() {
return foo1();
}
rdar://problem/32411865
Differential Revision: https://reviews.llvm.org/D35693
llvm-svn: 310006
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10.12 dropped support for all pre-Penryn Macs.
llvm-svn: 289839
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MIPS32 Android defaults to FPXX ("-fpxx").
MIPS32R6 Android defaults to FP64A ("-mfp64 -mno-odd-spreg").
Differential Revision: http://reviews.llvm.org/D20345
llvm-svn: 269914
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Change default CPU for MIPS32 Android. Now it is mips32 (rev1).
Differential Revision: http://reviews.llvm.org/D20313
llvm-svn: 269754
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Change default CPU for MIPS64 Android. Now it is mips64r6.
Differential Revision: http://reviews.llvm.org/D11294
llvm-svn: 242522
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llvm-svn: 211778
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32-bit: +ssse3
64-bit: +sse4.2 +popcnt
Differential Revision: http://reviews.llvm.org/D4287
llvm-svn: 211688
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This follows the LLVM change to canonicalise the Windows target triple
spellings. Rather than treating each Windows environment as a single entity,
the environments are now modelled properly as an environment. This is a
mechanical change to convert the triple use to reflect that change.
llvm-svn: 204978
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(http://llvm-reviews.chandlerc.com/D2655)
llvm-svn: 200510
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mips32r2/mips64r2 respectively.
llvm-svn: 200222
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llvm-svn: 200081
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options.
llvm-svn: 200080
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llvm-svn: 199875
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llvm-svn: 199073
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Teach the '-arch' command line option to enable the compiler-friendly
features of core-avx2 CPUs on Darwin. Pass the information along in the
target triple like Darwin+ARM does.
llvm-svn: 194907
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No functionality change other than changing the order of -target-feature
relative to other -cc1 command line arguments.
llvm-svn: 188906
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llvm-svn: 174215
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The a2q core is the variant of the a2 core used on the BG/Q supercomputers.
llvm-svn: 174151
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* -Bsymbolic must be added for x86 as well.
* Default CPU name also set to 'core2' for x86 android.
Patch by Edwin Vane.
llvm-svn: 167307
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clang itself. This dates back to clang's early days and while it looks like
some of it is still used (for kext for example), other parts are probably dead.
Remove the -ccc-clang-archs option and associated code. I don't think there
is any remaining setup where clang doesn't support an architecture but it can
expect an working gcc cross compiler to be available.
A nice side effect is that tests no longer need to differentiate architectures
that are included in production builds of clang and those that are not.
llvm-svn: 165545
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The darwin change should be a nop since Triple::getArchTypeForDarwinArchName
doesn't know about amd64.
If things like amd64-mingw32 are to be rejected, we should print a error
earlier on instead of silently using the wrong abi.
Remove old comment that looks out of place, this is "in clang".
llvm-svn: 165368
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llvm-svn: 164469
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llvm-svn: 164468
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llvm-svn: 164462
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using getArch, but I will try to fix them one at time to add tests.
llvm-svn: 164460
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Patch by Tobias von Koch!
llvm-svn: 164176
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llvm-svn: 158370
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-target-cpu options.
This functionality is based on what is done on ARM, and enables selecting PPC CPUs
in a way compatible with gcc's driver. Also, mirroring gcc (and what is done on x86),
-mcpu=native support was added. This uses the host cpu detection from LLVM
(which will also soon be updated by refactoring code currently in backend).
In order for this to work, the target needs a list of valid CPUs -- we now accept all CPUs accepted by LLVM.
A few preprocessor defines for common CPU types have been added.
llvm-svn: 158334
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llvm-svn: 155540
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llvm-svn: 148582
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llvm-svn: 148141
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llvm-svn: 148138
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not being consistent at all with other parts of the GCC implementation.
llvm-svn: 127777
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not alias driver/backend option.
llvm-svn: 91671
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clang ' or ' clang -cc1 ' or ' clang-cc ' in test lines (by substituting them to
garbage).
llvm-svn: 91460
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llvm-svn: 91174
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llvm-svn: 90890
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llvm-svn: 90873
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