| Commit message (Collapse) | Author | Age | Files | Lines |
... | |
|
|
|
| |
llvm-svn: 220201
|
|
|
|
|
|
| |
Patch by Matthew Wahab.
llvm-svn: 219607
|
|
|
|
|
|
|
|
|
| |
The Cortex-M7 has 3 options for its FPU: none, FPv5-SP-D16 and
FPv5-DP-D16. FPv5 has the same instructions as FP-ARMv8, so it can be
modeled using the same target feature, and all double-precision
operations are already disabled by the fp-only-sp target features.
llvm-svn: 218748
|
|
|
|
| |
llvm-svn: 207956
|
|
|
|
| |
llvm-svn: 205967
|
|
|
|
|
|
| |
Reviewed at http://llvm-reviews.chandlerc.com/D3096
llvm-svn: 205008
|
|
|
|
|
|
|
|
|
| |
This reverts commit r200233.
The test required a registered ARM target, it was testing LLVM's
generated assembly, and it should have been an IRGen test.
llvm-svn: 200242
|
|
|
|
| |
llvm-svn: 200233
|
|
|
|
| |
llvm-svn: 197152
|
|
|
|
|
|
|
|
| |
Passing -mthumb with no explicit CPU on the command line
resulted in target CPU changing from the architecture
default to arm7tdmi. Now it does not.
llvm-svn: 197151
|
|
|
|
|
|
|
|
|
|
|
| |
Adds some Cortex-A53 strings where they were missing before.
Cortex-A57 is entirely new to clang.
Doesn't touch code only used by Darwin, in consequence of which
one of the A53 lines has been removed.
Change-Id: I5edb58f6eae93947334787e26a8772c736de6483
llvm-svn: 193364
|
|
|
|
| |
llvm-svn: 190703
|
|
<rdar://problem/11314476>
llvm-svn: 176458
|