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* [AMDGPU] Change constant addr space to 4Yaxun Liu2018-02-131-5/+0
| | | | | | Differential Revision: https://reviews.llvm.org/D43171 llvm-svn: 325031
* AMDGPU: Update for datalayout changeMatt Arsenault2018-02-091-1/+1
| | | | llvm-svn: 324748
* [AMDGPU] Switch to the new addr space mapping by defaultYaxun Liu2018-02-021-5/+1
| | | | | | | | This requires corresponding llvm change. Differential Revision: https://reviews.llvm.org/D40956 llvm-svn: 324102
* [OpenCL] Map default address space to alloca address spaceYaxun Liu2017-04-111-1/+1
| | | | | | | | | | | | | | For OpenCL, the private address space qualifier is 0 in AST. Before this change, 0 address space qualifier is always mapped to target address space 0. As now target private address space is specified by alloca address space in data layout, address space qualifier 0 needs to be mapped to alloca addr space specified by the data layout. This change has no impact on targets whose alloca addr space is 0. With contributions from Matt Arsenault, Tony Tye and Wen-Heng (Jack) Chung Differential Revision: https://reviews.llvm.org/D31404 llvm-svn: 299965
* [AMDGPU] Temporarily change constant address space from 4 to 2 for the new ↵Yaxun Liu2017-04-061-1/+1
| | | | | | | | | | address space mapping Change constant address space from 4 to 2 for the new address space mapping in Clang. Differential Revision: https://reviews.llvm.org/D31771 llvm-svn: 299691
* [AMDGPU] Switch address space mapping by triple environment amdgizYaxun Liu2017-03-251-0/+9
For target environment amdgiz and amdgizcl (giz means Generic Is Zero), AMDGPU will use new address space mapping where generic address space is 0 and private address space is 5. The data layout is also changed correspondingly. Differential Revision: https://reviews.llvm.org/D31210 llvm-svn: 298767
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