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* Generating assumption loads of vptr after ctor callPiotr Padlewski2015-08-171-1/+1
| | | | | | | | | | | | Generating call assume(icmp %vtable, %global_vtable) after constructor call for devirtualization purposes. For more info go to: http://lists.llvm.org/pipermail/cfe-dev/2015-July/044227.html http://reviews.llvm.org/D11859 llvm-svn: 245257
* The alias.c test now requires arm-registered-targetJohn Brawn2015-08-121-0/+1
| | | | | | This should fix a buildbot failure llvm-svn: 244760
* Add test for PR24379John Brawn2015-08-121-2/+25
| | | | | | | | | | The fix for this is in LLVM but it depends on how clang handles the alias attribute, so add a test to the clang tests to make sure everything works together as expected. Differential Revision: http://reviews.llvm.org/D11980 llvm-svn: 244756
* Propagate SourceLocations through to get a Loc on float_cast_overflowFilipe Cabecinhas2015-08-111-7/+25
| | | | | | | | | | | | | | | Summary: float_cast_overflow is the only UBSan check without a source location attached. This patch propagates SourceLocations where necessary to get them to the EmitCheck() call. Reviewers: rsmith, ABataev, rjmccall Subscribers: cfe-commits Differential Revision: http://reviews.llvm.org/D11757 llvm-svn: 244568
* add commentDerek Schuff2015-08-111-0/+1
| | | | llvm-svn: 244542
* Add NaCl to long double/fp128 mangling testDerek Schuff2015-08-111-0/+3
| | | | | | | | | | | | | | | Summary: NaCl is a platform where long double is the same as double. Its mangling is spelled with "long double" but its ABI lowering is the same as double. Reviewers: rnk, chh Subscribers: jfb, cfe-commits, dschuff Differential Revision: http://reviews.llvm.org/D11922 llvm-svn: 244541
* Add NaCl (a target where long double = double) to long double ABI testDerek Schuff2015-08-101-4/+24
| | | | | | | | | | | | | | A test was recently (r244468) added to cover long double calling convention codegen, distinguishing between Android and GNU conventions (where long doubles are fp128 and x86_fp80, respectively). Native Client is a target where long doubles are the same as doubles. This change augments the test to cover that case. Also rename the test to test/codeGen/X86_64-longdouble.c Differential Revision: http://reviews.llvm.org/D11921 llvm-svn: 244524
* Fix test case to work with -Asserts builds.Chih-Hung Hsieh2015-08-101-14/+13
| | | | | | | | | When clang is built with -DLLVM_ENABLE_ASSERTIONS=Off, it does not create names for IR values. Differential Revision: http://reviews.llvm.org/D11437 llvm-svn: 244502
* Correct x86_64 fp128 calling conventionChih-Hung Hsieh2015-08-101-0/+116
| | | | | | | | | | | | | | | | These changes are for Android x86_64 targets to be compatible with current Android g++ and conform to AMD64 ABI. https://llvm.org/bugs/show_bug.cgi?id=23897 * Return type of long double (fp128) should be fp128, not x86_fp80. * Vararg of long double (fp128) could be in register and overflowed to memory. https://llvm.org/bugs/show_bug.cgi?id=24111 * Return value of long double (fp128) _Complex should be in memory like a structure of {fp128,fp128}. Differential Revision: http://reviews.llvm.org/D11437 llvm-svn: 244468
* AST: Implement mangling support for function types without a prototype.Peter Collingbourne2015-08-072-0/+7
| | | | | | | | | | Function types without prototypes can arise when mangling a function type within an overloadable function in C. We mangle these as the absence of any parameter types (not even an empty parameter list). Differential Revision: http://reviews.llvm.org/D11848 llvm-svn: 244374
* [Sparc] XFAIL CodeGen/atomic_ops test.James Y Knight2015-08-071-1/+2
| | | | llvm-svn: 244370
* [X86] Add support for _MM_ALIGN16Michael Kuperstein2015-08-061-0/+16
| | | | | | Differential Revision: http://reviews.llvm.org/D11753 llvm-svn: 244201
* Add -gcodeview and -gdwarf to control which type Clang emitsReid Kleckner2015-08-051-0/+9
| | | | | | | | | | | | | | | Summary: By default, 'clang' emits dwarf and 'clang-cl' emits codeview. You can force emission of one or both by passing -gcodeview and -gdwarf to either driver. Reviewers: dblaikie, hans Subscribers: cfe-commits Differential Revision: http://reviews.llvm.org/D11742 llvm-svn: 244097
* Add missing atomic libcall support.James Y Knight2015-08-051-0/+72
| | | | | | | | | | Support for emitting libcalls for __atomic_fetch_nand and __atomic_{add,sub,and,or,xor,nand}_fetch was missing; add it, and some test cases. Differential Revision: http://reviews.llvm.org/D10847 llvm-svn: 244063
* [X86][AVX512VLBW] add pack, cvt, mulhi and madd intrinsicsAsaf Badouh2015-08-031-0/+324
| | | | | | Differential Revision: http://reviews.llvm.org/D11642 llvm-svn: 243867
* [X86][AVX512VLDQ] add reduce/range/cvt intrinsics Asaf Badouh2015-08-021-0/+576
| | | | | | | | add 128 & 256 width intrinsic versions of reduce/range and cvt i64 to FP and vice versa Differential Revision: http://reviews.llvm.org/D11598 llvm-svn: 243848
* DI: Update testcases for LLVM assembly changeDuncan P. N. Exon Smith2015-07-315-10/+9
| | | | | | | | | | Update testcases after LLVM change r243774. Most of these had no need to check `tag:` field, but did so as a way of getting to the `name:` field. In a few cases I've converted the `tag:` checks to `arg:` or `CHECK-NOT: arg:`. llvm-svn: 243775
* [SystemZ] Add support for vecintrin.h vector built-in functionsUlrich Weigand2015-07-302-0/+3543
| | | | | | | | | | | | | | | | | | | This patch adds support for the System Z vector built-in functions. The API-defined header file has the name vecintrin.h. The user-level functions are defined in the same style as the clang version of altivec.h, making heavy use of the __overloadable__ and __always_inline__ attributes. Where possible the functions expand to generic operations rather than specific built-in functions, in the hope that that form can be optimised better. Where a built-in routine is specified to require an immediate integer argument, the __enable_if__ attribute is used to verify the argument is in fact constant and in the appropriate range. Based on a patch by Richard Sandiford. llvm-svn: 243643
* Add support for System z vector language extensionsUlrich Weigand2015-07-301-0/+2798
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The z13 vector facility has an associated language extension, closely modeled on AltiVec/VSX. The main differences are: - vector long, vector float and vector pixel are not supported - vector long long and vector double are supported (like VSX) - comparison operators return a vector rather than a scalar integer - shift operators behave like the OpenCL shift operators - vector bool is only supported as argument to certain operators; some operators allow mixing a bool with a non-bool vector This patch adds clang support for the extension. It is closely modelled on the AltiVec support. Similarly to the -faltivec option, there's a new -fzvector option to enable the extensions (as well as an -mzvector alias for compatibility with GCC). There's also a separate LangOpt. The extension as implemented here is intended to be compatible with the -mzvector extension recently implemented by GCC. Based on a patch by Richard Sandiford. Differential Revision: http://reviews.llvm.org/D11001 llvm-svn: 243642
* [X86] Recognize "flags" as an identifier, not a register in Intel-syntax ↵Michael Kuperstein2015-07-301-0/+8
| | | | | | | | | | | inline asm This contains the test-case for r243630. Patch by: marina.yatsina@intel.com Differential Revision: http://reviews.llvm.org/D11513 llvm-svn: 243632
* [X86][AVX512BW] add convert i16 to i8 and unpack intrinsicsAsaf Badouh2015-07-291-0/+127
| | | | | | Differential Revision: http://reviews.llvm.org/D11564 llvm-svn: 243514
* Add -femulated-tls flag to select the emulated TLS model.Chih-Hung Hsieh2015-07-281-0/+16
| | | | | | | | | This will be used for old targets like Android that do not support ELF TLS models. Differential Revision: http://reviews.llvm.org/D10524 llvm-svn: 243441
* RegParmMax must be 0 for AArch64, as the regparm function attribute is not ↵Kristof Beyls2015-07-281-0/+1
| | | | | | supported on AArch64. llvm-svn: 243417
* [AArch64] Implement __builtin_thread_pointerAdhemerval Zanella2015-07-281-0/+5
| | | | | | | This path add the aarch64 __builtin_thread_pointer support. It will be lowered to llvm.aarch64.thread.pointer. llvm-svn: 243413
* [X86][AVX512VL] add AVX512VL intrinsics 4 out of 4Asaf Badouh2015-07-281-0/+240
| | | | | | Differential Revision: http://reviews.llvm.org/D11526 llvm-svn: 243409
* [X86][AVX512VL] add AVX512VL intrinsics 3 out of 4Asaf Badouh2015-07-281-0/+480
| | | | | | http://reviews.llvm.org/D11526 llvm-svn: 243406
* [X86][AVX512VL] add AVX512VL intrinsics 2 out of 4Asaf Badouh2015-07-281-0/+430
| | | | | | http://reviews.llvm.org/D11526 llvm-svn: 243402
* [X86][AVX512VL] add AVX512VL intrinsics 1 out of 4Asaf Badouh2015-07-281-0/+540
| | | | | | http://reviews.llvm.org/D11526 llvm-svn: 243394
* Fixed test in rL243305Simon Pilgrim2015-07-271-3/+3
| | | | llvm-svn: 243314
* [X86] Add missing _m_prefetch intrinsicSimon Pilgrim2015-07-271-2/+8
| | | | | | | | | | | | The 3DNOW/PRFCHW cpu targets define both the PREFETCHW (set cache line modified) and PREFETCH (set cache line exclusive) instructions but only the _m_prefetchw (PREFETCHW) intrinsic is included in the header. This patch adds the missing _m_prefetch intrinsic. I'm basing this off AMD documentation - the intel docs on the support for PREFETCHW isn't clear whether Silvermont/Broadwell properly support PREFETCH but given that the intrinsic implementation is a default __builtin_prefetch call, it is safe whatever. Fix for PR23648 Differential Revision: http://reviews.llvm.org/D11338 llvm-svn: 243305
* Try to make the buildbots happyDavid Majnemer2015-07-261-1/+1
| | | | | | | This test was missing a triple causing it to error out on windows targets. They accept a much smaller alignment value. llvm-svn: 243234
* [CodeGen] Don't UBSan-ize the argument to __builtin_frame_addressDavid Majnemer2015-07-251-0/+7
| | | | | | | | | | | | | __builtin_frame_address requires its argument to be a constant expression which already implies that it cannot have undefined behavior. However, we used EmitScalarExpr to emit the argument causing UBSan to try to check for overflow. Instead, use the constant expression emission system. This fixes PR24256. llvm-svn: 243206
* Correct x86_64 Android fp128 mangled nameChih-Hung Hsieh2015-07-241-0/+22
| | | | | | | | | | These changes are for Android x86_64 targets to be compatible with current Android g++. https://llvm.org/bugs/show_bug.cgi?id=23897 Use 'g' and 'Cg' for "long double" and "long double _Complex" mangled type names. Differential Revision: http://reviews.llvm.org/D11466 llvm-svn: 243133
* [X86][AVX512F] Add FP scalar intrinsicsAsaf Badouh2015-07-231-0/+300
| | | | | | | | intrinsics for: add/sub/mul/div/min/max in their FP scalar versions Differential Revision: http://reviews.llvm.org/D11418 llvm-svn: 243009
* [X86][AVX512BW] add madd and maddubs intrinsicsAsaf Badouh2015-07-231-0/+30
| | | | | | Differential Revision: http://reviews.llvm.org/D11420 llvm-svn: 242986
* [X86][AVX512F] add FP arithmetic intrinsicsAsaf Badouh2015-07-211-0/+201
| | | | | | | | | add/div/mul/sub include rounding versions Differential Revision: http://reviews.llvm.org/D11354 llvm-svn: 242790
* [MS Compat] Add support for __declspec(noalias)David Majnemer2015-07-201-0/+5
| | | | | | | The attribute '__declspec(noalias)' communicates that the function only accesses memory pointed to by its pointer-typed arguments. llvm-svn: 242728
* Fix quoting of #pragma comment for PS4.Yunzhong Gao2015-07-201-0/+1
| | | | | | | | | | | | This is the PS4 counterpart to r229376, which quotes the library name if the name contains space. It was discovered that if a library name contains both double-quote and space characters, quoting the name might produce unexpected results, but we are mostly concerned with a Windows host environment, which does not allow double-quote or slashes in file/folder names. Differential Revision: http://reviews.llvm.org/D11275 llvm-svn: 242689
* [CodeGen] Flip lanes when lowering __builtin_palignr with one laneBenjamin Kramer2015-07-201-2/+2
| | | | | | | Otherwise we'd pick the wrong lane for the resulting shuffle and miscompile code. PR24187. llvm-svn: 242678
* [X86, inlineasm] Improve analysis of x,Y0,Yi,Ym,Yt,L,e,Z,s asm constraints ↵Alexey Bataev2015-07-201-4/+8
| | | | | | | | | (patch by Alexey Frolov) Improve Sema checking of 9 existing inline asm constraints (‘x’, ‘Y*’, ‘L’, ‘e’, ‘Z’, ‘s’). Differential Revision: http://reviews.llvm.org/D10536 llvm-svn: 242665
* [X86][AVX512BW] add clang intrinsics for pmulhrsw / pmulhuw / pmulhwAsaf Badouh2015-07-191-1/+48
| | | | | | | | also made minor fix in "test_mm512_maskz_permutex2var_epi16" Differential Revision: http://reviews.llvm.org/D11336 llvm-svn: 242635
* Fix test case in r242565Steven Wu2015-07-171-1/+2
| | | | llvm-svn: 242571
* Fix -save-temp when using objc-arc, sanitizer and profilingSteven Wu2015-07-171-0/+1
| | | | | | | | | | | | Currently, -save-temp will cause ObjCARC optimization to be dropped, sanitizer pass to run early in the pipeline, and profiling instrumentation to run twice. Fix the issue by properly disable all passes in the optimization pipeline when generating bitcode output and parse some of the Language Options even when the input is bitcode so the passes can be setup correctly. llvm-svn: 242565
* Disable #pragma redefine_extname for C++ code as it does not make sense in ↵Aaron Ballman2015-07-161-0/+6
| | | | | | | | such a context. Patch by Andrey Bokhanko! llvm-svn: 242420
* [ARM] Pass subtarget feature "+no-movt" instead of passing backend optionAkira Hatanaka2015-07-161-0/+7
| | | | | | | | | | | | | | "-arm-use-movt=0". This change is needed since backend options do not make it to the backend when doing LTO and are not capable of changing the behavior of code-gen passes on a per-function basis. rdar://problem/21529937 Differential Revision: http://reviews.llvm.org/D11025 llvm-svn: 242368
* [PPC64] Update tests for vec_sldBill Schmidt2015-07-151-1/+145
| | | | | | | | | | | Revision 224297 modified the behavior of vec_sld for little endian so that LLVM will generate the correct corresponding vsldoi instruction. I neglected to update the existing tests, which continued to pass because they were not specific enough. This patch adds enough specificity to the tests to make them useful for BE and LE testing of vec_sld. llvm-svn: 242313
* Add missing builtins to altivec.h for ABI compliance (vol. 4)Nemanja Ivanovic2015-07-143-5/+492
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch corresponds to review: http://reviews.llvm.org/D11184 A number of new interfaces for altivec.h (as mandated by the ABI): vector float vec_cpsgn(vector float, vector float) vector double vec_cpsgn(vector double, vector double) vector double vec_or(vector bool long long, vector double) vector double vec_or(vector double, vector bool long long) vector double vec_re(vector double) vector signed char vec_cntlz(vector signed char) vector unsigned char vec_cntlz(vector unsigned char) vector short vec_cntlz(vector short) vector unsigned short vec_cntlz(vector unsigned short) vector int vec_cntlz(vector int) vector unsigned int vec_cntlz(vector unsigned int) vector signed long long vec_cntlz(vector signed long long) vector unsigned long long vec_cntlz(vector unsigned long long) vector signed char vec_nand(vector bool signed char, vector signed char) vector signed char vec_nand(vector signed char, vector bool signed char) vector signed char vec_nand(vector signed char, vector signed char) vector unsigned char vec_nand(vector bool unsigned char, vector unsigned char) vector unsigned char vec_nand(vector unsigned char, vector bool unsigned char) vector unsigned char vec_nand(vector unsigned char, vector unsigned char) vector short vec_nand(vector bool short, vector short) vector short vec_nand(vector short, vector bool short) vector short vec_nand(vector short, vector short) vector unsigned short vec_nand(vector bool unsigned short, vector unsigned short) vector unsigned short vec_nand(vector unsigned short, vector bool unsigned short) vector unsigned short vec_nand(vector unsigned short, vector unsigned short) vector int vec_nand(vector bool int, vector int) vector int vec_nand(vector int, vector bool int) vector int vec_nand(vector int, vector int) vector unsigned int vec_nand(vector bool unsigned int, vector unsigned int) vector unsigned int vec_nand(vector unsigned int, vector bool unsigned int) vector unsigned int vec_nand(vector unsigned int, vector unsigned int) vector signed long long vec_nand(vector bool long long, vector signed long long) vector signed long long vec_nand(vector signed long long, vector bool long long) vector signed long long vec_nand(vector signed long long, vector signed long long) vector unsigned long long vec_nand(vector bool long long, vector unsigned long long) vector unsigned long long vec_nand(vector unsigned long long, vector bool long long) vector unsigned long long vec_nand(vector unsigned long long, vector unsigned long long) vector signed char vec_orc(vector bool signed char, vector signed char) vector signed char vec_orc(vector signed char, vector bool signed char) vector signed char vec_orc(vector signed char, vector signed char) vector unsigned char vec_orc(vector bool unsigned char, vector unsigned char) vector unsigned char vec_orc(vector unsigned char, vector bool unsigned char) vector unsigned char vec_orc(vector unsigned char, vector unsigned char) vector short vec_orc(vector bool short, vector short) vector short vec_orc(vector short, vector bool short) vector short vec_orc(vector short, vector short) vector unsigned short vec_orc(vector bool unsigned short, vector unsigned short) vector unsigned short vec_orc(vector unsigned short, vector bool unsigned short) vector unsigned short vec_orc(vector unsigned short, vector unsigned short) vector int vec_orc(vector bool int, vector int) vector int vec_orc(vector int, vector bool int) vector int vec_orc(vector int, vector int) vector unsigned int vec_orc(vector bool unsigned int, vector unsigned int) vector unsigned int vec_orc(vector unsigned int, vector bool unsigned int) vector unsigned int vec_orc(vector unsigned int, vector unsigned int) vector signed long long vec_orc(vector bool long long, vector signed long long) vector signed long long vec_orc(vector signed long long, vector bool long long) vector signed long long vec_orc(vector signed long long, vector signed long long) vector unsigned long long vec_orc(vector bool long long, vector unsigned long long) vector unsigned long long vec_orc(vector unsigned long long, vector bool long long) vector unsigned long long vec_orc(vector unsigned long long, vector unsigned long long) vector signed char vec_div(vector signed char, vector signed char) vector unsigned char vec_div(vector unsigned char, vector unsigned char) vector signed short vec_div(vector signed short, vector signed short) vector unsigned short vec_div(vector unsigned short, vector unsigned short) vector signed int vec_div(vector signed int, vector signed int) vector unsigned int vec_div(vector unsigned int, vector unsigned int) vector signed long long vec_div(vector signed long long, vector signed long long) vector unsigned long long vec_div(vector unsigned long long, vector unsigned long long) vector unsigned char vec_mul(vector unsigned char, vector unsigned char) vector unsigned int vec_mul(vector unsigned int, vector unsigned int) vector unsigned long long vec_mul(vector unsigned long long, vector unsigned long long) vector unsigned short vec_mul(vector unsigned short, vector unsigned short) vector signed char vec_mul(vector signed char, vector signed char) vector signed int vec_mul(vector signed int, vector signed int) vector signed long long vec_mul(vector signed long long, vector signed long long) vector signed short vec_mul(vector signed short, vector signed short) vector signed long long vec_mergeh(vector signed long long, vector signed long long) vector signed long long vec_mergeh(vector signed long long, vector bool long long) vector signed long long vec_mergeh(vector bool long long, vector signed long long) vector unsigned long long vec_mergeh(vector unsigned long long, vector unsigned long long) vector unsigned long long vec_mergeh(vector unsigned long long, vector bool long long) vector unsigned long long vec_mergeh(vector bool long long, vector unsigned long long) vector double vec_mergeh(vector double, vector double) vector double vec_mergeh(vector double, vector bool long long) vector double vec_mergeh(vector bool long long, vector double) vector signed long long vec_mergel(vector signed long long, vector signed long long) vector signed long long vec_mergel(vector signed long long, vector bool long long) vector signed long long vec_mergel(vector bool long long, vector signed long long) vector unsigned long long vec_mergel(vector unsigned long long, vector unsigned long long) vector unsigned long long vec_mergel(vector unsigned long long, vector bool long long) vector unsigned long long vec_mergel(vector bool long long, vector unsigned long long) vector double vec_mergel(vector double, vector double) vector double vec_mergel(vector double, vector bool long long) vector double vec_mergel(vector bool long long, vector double) vector signed int vec_pack(vector signed long long, vector signed long long) vector unsigned int vec_pack(vector unsigned long long, vector unsigned long long) vector bool int vec_pack(vector bool long long, vector bool long long) llvm-svn: 242171
* [x86] add 2 bit to ObjCOrBuiltinID and new intrinsicsAsaf Badouh2015-07-141-0/+585
| | | | | | | | | | add 2 bit to ObjCOrBuiltinID (changed from 11bits to 13bits), see discussion in Add new intrinsics support that already covered by the BE. All the intrinsics are covered by tests Differential Revision: http://reviews.llvm.org/D10893 llvm-svn: 242144
* [MS ABI] Don't generates code for unreferenced inline definitions of library ↵David Majnemer2015-07-101-0/+4
| | | | | | | | | | | builtins We should only consider declarations which were written, implicit declarations shouldn't be considered. This fixes PR24084. llvm-svn: 241941
* [inlineasm] Attach readonly and readnone to inline-asm instructions.Akira Hatanaka2015-07-101-0/+33
| | | | | | | | | | | | | | Previously, clang/llvm treated inline-asm instructions conservatively, choosing not to eliminate the instructions or hoisting them out of a loop even when it was safe to do so. This commit makes changes to attach a readonly or readnone attribute to an inline-asm instruction, which enables passes such as LICM and EarlyCSE to move or optimize away the instruction. rdar://problem/11358192 Differential Revision: http://reviews.llvm.org/D10546 llvm-svn: 241930
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