summaryrefslogtreecommitdiffstats
path: root/clang/test/CodeGen/hexagon-inline-asm.c
Commit message (Collapse)AuthorAgeFilesLines
* [Hexagon] Handling of new HVX flags and target-featuresSumanth Gundapaneni2017-10-181-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch has the following changes A new flag "-mhvx-length={64B|128B}" is introduced to specify the length of the vector. Previously we have used "-mhvx-double" for 128 Bytes. This adds the target-feature "+hvx-length{64|128}b" The "-mhvx" flag must be provided on command line to enable HVX for Hexagon. If no -mhvx-length flag is specified, a default length is picked from the arch mentioned in this priority order from either -mhvx=vxx or -mcpu. For v60 and v62 the default length is 64 Byte. For unknown versions, the length is 128 Byte. The -mhvx flag adds the target-feature "+hvxv{hvx_version}" The 64 Byte mode is soon going to be deprecated. A warning is emitted if 64 Byte is enabled. A warning is still emitted for the default 64 Byte as well. This warning can be suppressed with a -Wno flag. The "-mhvx-double" and "-mno-hvx-double" flags are deprecated. A warning is emitted if the driver sees them on commandline. "-mhvx-double" is an alias to "-mhvx-length=128B" The compilation will error out if -mhvx-length is specified with out an -mhvx/-mhvx= flag The macro HVX_LENGTH is defined and is set to the length of the vector. Eg: #define HVX_LENGTH 64 The macro HVX_ARCH is defined and is set to the version of the HVX. Eg: #define HVX_ARCH 62 Differential Revision: https://reviews.llvm.org/D38852 llvm-svn: 316102
* [Hexagon] Attempt to fix selfhost botsKrzysztof Parzyszek2017-07-211-1/+1
| | | | | | | The codegen testcase was checking for specific value names. Make it ignore the names instead as they are irrelevant. llvm-svn: 308782
* [Hexagon] Add inline-asm constraint 'a' for modifier register classKrzysztof Parzyszek2017-07-211-0/+6
| | | | | | | For example asm ("memw(%0++%1) = %2" : : "r"(addr),"a"(mod),"r"(val) : "memory") llvm-svn: 308763
* [Hexagon] Recognize "s" constraint in inline-asmKrzysztof Parzyszek2016-05-201-0/+6
| | | | llvm-svn: 270216
* [Hexagon] Recognize "q" and "v" in inline-asm as register constraintsKrzysztof Parzyszek2016-05-181-0/+11
Clang follow-up to r269933. llvm-svn: 269934
OpenPOWER on IntegriCloud