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* [IRBuilder] Update IRBuilder::CreateFNeg(...) to return a UnaryOperatorCameron McInally2019-10-141-32/+32
| | | | | | | | Reapply r374240 with fix for Ocaml test, namely Bindings/OCaml/core.ml. Differential Revision: https://reviews.llvm.org/D61675 llvm-svn: 374782
* Revert "[IRBuilder] Update IRBuilder::CreateFNeg(...) to return a UnaryOperator"Dmitri Gribenko2019-10-101-32/+32
| | | | | | | This reverts commit r374240. It broke OCaml tests: http://lab.llvm.org:8011/builders/clang-x86_64-debian-fast/builds/19014 llvm-svn: 374354
* [IRBuilder] Update IRBuilder::CreateFNeg(...) to return a UnaryOperatorCameron McInally2019-10-091-32/+32
| | | | | | | | Also update Clang to call Builder.CreateFNeg(...) for UnaryMinus. Differential Revision: https://reviews.llvm.org/D61675 llvm-svn: 374240
* [X86] Implement _builtin_ia32_vfmaddss and _builtin_ia32_vfmaddsd with ↵Craig Topper2018-07-061-8/+40
| | | | | | | | native IR using llvm.fma intrinsic. This generates some extra zeroing currently, but we should be able to quickly address that with some isel patterns. llvm-svn: 336417
* [X86] Use shufflevector instead of a select with a constant mask for ↵Craig Topper2018-07-051-24/+24
| | | | | | | | | | fmaddsub/fmsubadd IR emission. Shufflevector is easier to generate and matches what the backend pattern matches without relying on constant selects being turned into shuffles. While I was there I also made the IR regular expressions a little stricter to ensure operand order on the shuffle. llvm-svn: 336388
* [X86] Lowering FMA intrinsics to native IR (Clang part)Gabor Buella2018-05-301-24/+44
| | | | | | | | | | | | | | | | This patch replaces all packed (and scalar without rounding mode) fused intrinsics with fmadd/fmaddsub variations. Then fmadd/fmaddsub are lowered to native IR. Patch by tkrupa Reviewers: craig.topper, sroland, spatel, RKSimon Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D47444 llvm-svn: 333555
* [X86] Use separate builtins for fma4 scalar intrinsics. Use negations to ↵Craig Topper2017-11-251-8/+16
| | | | | | | | | | remove some of the scalar fma3 builtins. fma4 instructions zero the upper bits of the xmm register. fma3 instructions leave the bits unmodified. This requires separate builtins for the different semantics. While we're cleaning up the scalar builtins this also removes the fma3 fmsub/fnmadd/fnmsub builtins by using negates in the header file. llvm-svn: 318985
* [X86] Reduce the number of FMA builtins needed by the frontend by adding ↵Craig Topper2017-11-101-16/+36
| | | | | | | | | | | | negates to operands of the fmadd and fmaddsub builtins. The backend should be able to combine the negates to create fmsub, fnmadd, and fnmsub. faddsub converting to fsubadd still needs work I think, but should be very doable. This matches what we already do for the masked builtins. This only covers the packed builtins. Scalar builtins will be done after FMA4 is fixed. llvm-svn: 317873
* [X86] Remove the mm_malloc.h include guard hack from the X86 builtins testsElad Cohen2016-09-281-3/+1
| | | | | | | | | | | | The X86 clang/test/CodeGen/*builtins.c tests define the mm_malloc.h include guard as a hack for avoiding its inclusion (mm_malloc.h requires a hosted environment since it expects stdlib.h to be available - which is not the case in these internal clang codegen tests). This patch removes this hack and instead passes -ffreestanding to clang cc1. Differential Revision: https://reviews.llvm.org/D24825 llvm-svn: 282581
* After PR28761 use -Wall with -Werror in builtins tests to identifyEric Christopher2016-08-041-1/+1
| | | | | | possible problems in headers. llvm-svn: 277696
* [X86] Stripped backend codegen testsSimon Pilgrim2015-12-031-34/+32
| | | | | | | | | | As discussed on the ml, backend tests need to be put in llvm/test/CodeGen/X86 as fast-isel tests using IR that is as close to what is generated here as possible. The llvm tests will (re)added in a future commit I will update PR24580 on this new plan llvm-svn: 254594
* Canonicalize some of the x86 builtin tests and either remove or commentEric Christopher2015-10-141-2/+2
| | | | | | about optimization options. llvm-svn: 250271
* [X86] Reapplied r246204, r246206, r246211, r246223Simon Pilgrim2015-08-291-1/+35
| | | | | | | | (Re)added debug codegen test for F16C, FMA4, XOP + 3DNow! intrinsics Part of PR24590 llvm-svn: 246363
* Revert "[X86][FMA4] Added debug codegen test for FMA4 intrinsics"Renato Golin2015-08-281-34/+1
| | | | | | This reverts commit r246206, as it broke all ARM/AArch64 bots. llvm-svn: 246320
* [X86][FMA4] Added debug codegen test for FMA4 intrinsicsSimon Pilgrim2015-08-271-1/+34
| | | | | | Part of PR24590 llvm-svn: 246206
* Upgrade test for the fma4->fma intrinsic change.Benjamin Kramer2012-06-031-32/+32
| | | | llvm-svn: 157900
* Add FMA4 intrinsics.Craig Topper2011-12-301-0/+166
llvm-svn: 147372
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