Commit message (Collapse) | Author | Age | Files | Lines | |
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* | [CodeGen] NVPTX: Switch from atomic.load.add.f32 to atomicrmw fadd | Benjamin Kramer | 2019-07-11 | 1 | -1/+1 |
| | | | | llvm-svn: 365798 | ||||
* | [NVPTX, CUDA] Improved feature constraints on NVPTX target builtins. | Artem Belevich | 2018-04-11 | 1 | -1/+1 |
| | | | | | | | | | | When NVPTX TARGET_BUILTIN specifies sm_XX or ptxYY as required feature, consider those features available if we're compiling for GPU >= sm_XX or have enabled PTX version >= ptxYY. Differential Revision: https://reviews.llvm.org/D45061 llvm-svn: 329829 | ||||
* | [NVPTX] Implement __nvvm_atom_add_gen_d builtin. | Justin Lebar | 2017-11-07 | 1 | -0/+23 |
Summary: This just seems to have been an oversight. We already supported the f64 atomic add with an explicit scope (e.g. "cta"), but not the scopeless version. Reviewers: tra Subscribers: jholewinski, sanjoy, cfe-commits, llvm-commits, hiraditya Differential Revision: https://reviews.llvm.org/D39638 llvm-svn: 317623 |