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* [X86] Add new variadic avx512 compress/expand intrinsics that use vXi1 types ↵Craig Topper2019-01-281-16/+16
| | | | | | | | for the mask argument. Custom lower the builtins to these intrinsics. This enables the middle end to optimize out bitcasts for the masks. llvm-svn: 352344
* Recommit r350555 "[X86] Use funnel shift intrinsics for the VBMI2 ↵Craig Topper2019-01-071-72/+96
| | | | | | | | vshld/vshrd builtins." The MSVC limit hit in AutoUpgrade.cpp has been worked around for now. llvm-svn: 350568
* Revert r350555 "[X86] Use funnel shift intrinsics for the VBMI2 vshld/vshrd ↵Craig Topper2019-01-071-96/+72
| | | | | | | | builtins." Had to revert the LLVM patch this depends on to fix a MSVC compiler limit in AutoUpgrade.cpp llvm-svn: 350563
* [X86] Use funnel shift intrinsics for the VBMI2 vshld/vshrd builtins.Craig Topper2019-01-071-72/+96
| | | | | | Differential Revision: https://reviews.llvm.org/D56365 llvm-svn: 350555
* [X86] Update VBMI2 vshld/vshrd tests to use an immediate that doesn't ↵Craig Topper2019-01-071-20/+20
| | | | | | | | require a modulo. Planning to replace these with funnel shift intrinsics which would mask out the extra bits. This will help minimize test diffs. llvm-svn: 350506
* [X86] Remove masking from avx512vbmi2 concat and shift by immediate ↵Craig Topper2018-06-131-36/+60
| | | | | | builtins. Use select builtins instead. llvm-svn: 334577
* [X86] Use target independent masked expandload and compressstore intrinsics ↵Craig Topper2018-06-101-12/+12
| | | | | | | | | | | | | | | | to implement expandload/compressstore builtins. Summary: We've had these target independent intrinsics for at least a year and a half. Looks like they do exactly what we need here and the backend already supports them. Reviewers: RKSimon, delena, spatel, GBuella Reviewed By: RKSimon Subscribers: cfe-commits, llvm-commits Differential Revision: https://reviews.llvm.org/D47693 llvm-svn: 334366
* [X86] Fix the names of a bunch of icelake intrinsics.Craig Topper2018-05-301-150/+150
| | | | | | | | Mostly this fixes the names of all the 128-bit intrinsics to start with _mm_ instead of _mm128_ as is the convention and what the Intel docs say. This also fixes the name of the bitshuffle intrinsics to say epi64 for 128 and 256 bit versions. llvm-svn: 333497
* [x86][icelake][vbmi2]Coby Tayree2017-12-271-0/+604
added vbmi2 feature recognition added intrinsics support for vbmi2 instructions _mm[128,256,512]_mask[z]_compress_epi[16,32] _mm[128,256,512]_mask_compressstoreu_epi[16,32] _mm[128,256,512]_mask[z]_expand_epi[16,32] _mm[128,256,512]_mask[z]_expandloadu_epi[16,32] _mm[128,256,512]_mask[z]_sh[l,r]di_epi[16,32,64] _mm[128,256,512]_mask_sh[l,r]dv_epi[16,32,64] matching a similar work on the backend (D40206) Differential Revision: https://reviews.llvm.org/D41557 llvm-svn: 321487
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