| Commit message (Collapse) | Author | Age | Files | Lines |
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Differential Revision: http://reviews.llvm.org/D18932
llvm-svn: 265904
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builtin to clang
Differential Revision: http://reviews.llvm.org/D18931
llvm-svn: 265896
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getexp{sd|ss} getmant{sd|ss} kunpck{di|si} loada{pd|ps} loaddqu{di|hi|qi|si} max{sd|ss} min{sd|ss} kmov16 builtins to clang
Differential Revision: http://reviews.llvm.org/D18215
llvm-svn: 264574
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Differential Revision: http://reviews.llvm.org/D17919
llvm-svn: 262847
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Differential Revision: http://reviews.llvm.org/D17826
llvm-svn: 262617
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Differential Revision: http://reviews.llvm.org/D17812
llvm-svn: 262598
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Differential Revision: http://reviews.llvm.org/D17714
llvm-svn: 262355
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Differential Revision: http://reviews.llvm.org/D17693
llvm-svn: 262321
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Differential Revision: http://reviews.llvm.org/D17512
llvm-svn: 261641
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Differential Revision: http://reviews.llvm.org/D17506
llvm-svn: 261635
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Differential Revision: http://reviews.llvm.org/D16985
llvm-svn: 261516
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to clang
Differential Revision: http://reviews.llvm.org/D16961
llvm-svn: 261471
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to clang
Differential Revision: http://reviews.llvm.org/D16955
llvm-svn: 261196
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llvm-svn: 255916
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about optimization options.
llvm-svn: 250271
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Added missing SSE/AVX 'undefined' intrinsics (PR24040):
_mm_undefined_pd, _mm_undefined_ps + _mm_undefined_si128
_mm256_undefined_pd, _mm256_undefined_ps + _mm256_undefined_si256
_mm512_undefined, _mm512_undefined_ps, _mm512_undefined_pd + _mm512_undefined_epi32
Added builtin intrinsicss:
__builtin_ia32_undef128, __builtin_ia32_undef256 + __builtin_ia32_undef512
Differential Revision: http://reviews.llvm.org/D12052
llvm-svn: 246083
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intrinsics for: add/sub/mul/div/min/max in their FP scalar versions
Differential Revision: http://reviews.llvm.org/D11418
llvm-svn: 243009
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add/div/mul/sub include rounding versions
Differential Revision: http://reviews.llvm.org/D11354
llvm-svn: 242790
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by Igor Breger
http://reviews.llvm.org/D10797
llvm-svn: 240928
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llvm-svn: 238924
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from i8 to i32 according to the Intel Spec
llvm-svn: 236980
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by Asaf Badouh (asaf.badouh@intel.com)
llvm-svn: 235986
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by Asaf Badouh (asaf.badouh@intel.com)
llvm-svn: 233794
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llvm-svn: 230795
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llvm-svn: 227773
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match Intel docs. Make immediate argument to them an ICE. Fix mask size for the alignd version.
llvm-svn: 227713
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and 256 bit vectors of dwords and qwords.
llvm-svn: 227075
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llvm-svn: 227067
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Analogous to AVX2, these need to be implemented as macros to properly
propagate the immediate index operand.
Part of <rdar://problem/17688758>
llvm-svn: 226496
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comparison immediate. This requires converting to a macro in the header file.
llvm-svn: 226421
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Part of <rdar://problem/17688758>
llvm-svn: 226298
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llvm-svn: 226297
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These are implemented with __builtin_shufflevector just like AVX.
We have some tests on the LLVM side to assert that these shufflevectors do
indeed generate the corresponding unpck instruction.
Part of <rdar://problem/17688758>
llvm-svn: 225922
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Added tests.
Patch by Maxim Blumenthal <maxim.blumenthal@intel.com>
llvm-svn: 219319
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Part of <rdar://problem/17688758>
llvm-svn: 215666
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Similar approach to the set1 intrinsics is used: implement in terms of vector
initializers and then ensure with an LLVM test that a broadcast is generated
at the end.
Part of <rdar://problem/17688758>
llvm-svn: 215486
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Note that similar to palingr, we could further optimize these to emit
shufflevector when the shift count is <=64. This however does not
change the overall design that unlike palignr we would still need the LLVM
intrinsic corresponding to this intruction to handle the >64 cases. (palignr
uses the psrldq intrinsic in this case.)
llvm-svn: 214891
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Part of <rdar://problem/17688758>
llvm-svn: 214380
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Part of <rdar://problem/17688758>
llvm-svn: 214316
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Part of <rdar://problem/17688758>
llvm-svn: 214315
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(Dropped the byte and word variants from the patch. Turns out these are not
part of AVX512F but only AVX512BW/VL.)
Part of <rdar://problem/17688758>
llvm-svn: 214314
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Part of <rdar://problem/17688758>
llvm-svn: 214099
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Part of <rdar://problem/17688758>
llvm-svn: 214098
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llvm-svn: 214095
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The set is small, that what I have right now.
Everybody is welcome to add more.
llvm-svn: 213641
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