| Commit message (Collapse) | Author | Age | Files | Lines |
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Summary:
Named registers with the constraint "=&r" currently lose the early clobber flag
and turn into "=r" when converted to LLVM-IR. This patch correctly passes it on.
Reviewers: atanasyan
Reviewed By: atanasyan
Subscribers: cfe-commits
Differential Revision: http://reviews.llvm.org/D7346
llvm-svn: 228143
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Lots of tests are using an explicit target triple w/o first checking that the
target is actually available. Add a REQUIRES clause to a bunch of them. This should
hopefully unbreak bots which don't configure w/ all targets enabled.
llvm-svn: 159949
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llvm-svn: 134831
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Fixes rdar://9425559
llvm-svn: 133486
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llvm-svn: 133262
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#define.
llvm-svn: 133241
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llvm-svn: 133238
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register constraint. Note that we're not checking if the register itself
is valid for the constraint.
Fixes rdar://9382985
llvm-svn: 133226
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