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* [X86] Mark various pointer arguments in builtins as constWarren Ristow2019-12-191-1/+1
| | | | | | | | | | | Enabling `-Wcast-qual` identified many casts in various system headers that were dropping the `const` qualifier. Fixing those missing qualifiers pointed out that a few of the definitions of the builtins did not properly identify their arguments as `const` pointers. This commit fixes those builtin definitions, and the system header files so that they no longer drop the qualifier. Differential Revision: https://reviews.llvm.org/D71718
* Move the builtin headers to use the new license file header.Chandler Carruth2019-04-081-17/+3
| | | | | | | | | | | | | | | | | | Summary: These all had somewhat custom file headers with different text from the ones I searched for previously, and so I missed them. Thanks to Hal and Kristina and others who prompted me to fix this, and sorry it took so long. Reviewers: hfinkel Subscribers: mcrosier, javed.absar, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D60406 llvm-svn: 357941
* [Builtins][Attributes][X86] Tag all X86 builtins with their required vector ↵Craig Topper2018-07-091-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | width. Add a min_vector_width function attribute and tag all x86 instrinsics with it This is part of an ongoing attempt at making 512 bit vectors illegal in the X86 backend type legalizer due to CPU frequency penalties associated with wide vectors on Skylake Server CPUs. We want the loop vectorizer to be able to emit IR containing wide vectors as intermediate operations in vectorized code and allow these wide vectors to be legalized to 256 bits by the X86 backend even though we are targetting a CPU that supports 512 bit vectors. This is similar to what happens with an AVX2 CPU, the vectorizer can emit wide vectors and the backend will split them. We want this splitting behavior, but still be able to use new Skylake instructions that work on 256-bit vectors and support things like masking and gather/scatter. Of course if the user uses explicit vector code in their source code we need to not split those operations. Especially if they have used any of the 512-bit vector intrinsics from immintrin.h. And we need to make it so that merely using the intrinsics produces the expected code in order to be backwards compatible. To support this goal, this patch adds a new IR function attribute "min-legal-vector-width" that can indicate the need for a minimum vector width to be legal in the backend. We need to ensure this attribute is set to the largest vector width needed by any intrinsics from immintrin.h that the function uses. The inliner will be reponsible for merging this attribute when a function is inlined. We may also need a way to limit inlining in the future as well, but we can discuss that in the future. To make things more complicated, there are two different ways intrinsics are implemented in immintrin.h. Either as an always_inline function containing calls to builtins(can be target specific or target independent) or vector extension code. Or as a macro wrapper around a taget specific builtin. I believe I've removed all cases where the macro was around a target independent builtin. To support the always_inline function case this patch adds attribute((min_vector_width(128))) that can be used to tag these functions with their vector width. All x86 intrinsic functions that operate on vectors have been tagged with this attribute. To support the macro case, all x86 specific builtins have also been tagged with the vector width that they require. Use of any builtin with this property will implicitly increase the min_vector_width of the function that calls it. I've done this as a new property in the attribute string for the builtin rather than basing it on the type string so that we can opt into it on a per builtin basis and avoid any impact to target independent builtins. There will be future work to support vectors passed as function arguments and supporting inline assembly. And whatever else we can find that isn't covered by this patch. Special thanks to Chandler who suggested this direction and reviewed a preview version of this patch. And thanks to Eric Christopher who has had many conversations with me about this issue. Differential Revision: https://reviews.llvm.org/D48617 llvm-svn: 336583
* [DOXYGEN] Formatting changes for better intrinsics documentation renderingEkaterina Romanova2018-05-231-1/+1
| | | | | | | | (1) I added some \see cross-references to a few select intrinsics that are related (and have the same or similar semantics). (2) pmmintrin.h, smmintrin.h, xmmintrin.h have very few minor formatting changes. They make rendering of our intrinsics documentation better. llvm-svn: 333065
* Remove \brief commands from doxygen comments.Adrian Prantl2018-05-091-13/+13
| | | | | | | | | | | | | | | | | | | This is similar to the LLVM change https://reviews.llvm.org/D46290. We've been running doxygen with the autobrief option for a couple of years now. This makes the \brief markers into our comments redundant. Since they are a visual distraction and we don't want to encourage more \brief markers in new code either, this patch removes them all. Patch produced by for i in $(git grep -l '\@brief'); do perl -pi -e 's/\@brief //g' $i & done for i in $(git grep -l '\\brief'); do perl -pi -e 's/\\brief //g' $i & done Differential Revision: https://reviews.llvm.org/D46320 llvm-svn: 331834
* [DOXYGEN] Fix doxygen and content issues in pmmintrin.hDouglas Yung2018-01-021-3/+3
| | | | | | | | | | - Fix incorrect wording in various intrinsic descriptions. Previously the descriptions used "low-order" and "high-order" when the intended meaning was "even-indexed" and "odd-indexed". This patch was made by Craig Flores Differential Revision: https://reviews.llvm.org/D41518 llvm-svn: 321670
* [DOXYGEN] Minor improvements in doxygen comments.Ekaterina Romanova2017-05-151-3/+5
| | | | | | | | | Separated very long brief sections into two sections. I got an OK from Eric Christopher to commit doxygen comments without prior code review upstream. llvm-svn: 303031
* [X86] DAZ Macros RelocationOren Ben Simhon2017-02-261-8/+0
| | | | | | | | | The DAZ feature introduces the denormal zero support for x86. Currently the definitions are located under SSE3 header, however there are some SSE2 targets that support the feature as well. Differential Revision: https://reviews.llvm.org/D30194 llvm-svn: 296296
* [DOXYGEN] Documentation for the newly added x86 intrinsics.Ekaterina Romanova2017-01-131-2/+2
| | | | | | | | | | | | | | Added doxygen comments for the newly added intrinsics in avxintrin.h, namely _mm256_cvtsd_f64, _mm256_cvtsi256_si32 and _mm256_cvtss_f32 Added doxygen comments for the new intrinsics in emmintrin.h, namely _mm_loadu_si64 and _mm_load_sd. Explicit parameter names were added for _mm_clflush and _mm_setcsr The rest of the changes are editorial, removing trailing spaces at the end of the lines. Differential Revision: https://reviews.llvm.org/D28503 llvm-svn: 291876
* [DOXYGEN] Improved doxygen comments for x86 intrinsics.Ekaterina Romanova2016-12-271-14/+13
| | | | | | | | | | Improved doxygen comments for the following intrinsics headers: __wmmintrin_pclmul.h, bmiintrin.h, emmintrin.h, f16cintrin.h, immintrin.h, mmintrin.h, pmmintrin.h, tmmintrin.h Added \n commands to insert a line breaks where necessary, since one long line of documentation is nearly unreadable. Formatted comments to fit into 80 chars. In some cases added \a command in front of the parameter names to display them in italics. llvm-svn: 290561
* [DOXYGEN] Improved doxygen comments for x86 intrinsics headers.Ekaterina Romanova2016-12-091-13/+13
| | | | | | | | | Tagged instruction names with <c> INSTR_NAME </c> to display them in typewriter font. In the past, \c command was used, unfortunately it applied to only one word. <c> .. </c> has the same meaning, but applies to all words in between the tags. llvm-svn: 289249
* Clean up: remove trailing spaces in x86 intrinsic headers.Ekaterina Romanova2016-05-281-32/+32
| | | | | | Differential Revision: http://reviews.llvm.org/D20614 llvm-svn: 271077
* [X86] Add typecasts to remove most assumptions about what __m128i/__m256i is ↵Craig Topper2016-05-161-9/+9
| | | | | | defined as. Add similar typecasts for the fp types as well. llvm-svn: 269632
* This patch adds doxygen comments for all the intrinsincs in the header file ↵Ekaterina Romanova2016-02-081-1/+196
| | | | | | | | pmmintrin.h. The doxygen comments are automatically generated based on Sony's intrinsics document. Differential Revision: http://reviews.llvm.org/D16913 llvm-svn: 260160
* Clean up trailing whitespace in the builtin headersSean Silva2015-09-121-1/+1
| | | | llvm-svn: 247498
* [X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTRMichael Kuperstein2015-06-301-14/+14
| | | | llvm-svn: 241065
* Update the intel intrinsic headers to use the target attribute support.Eric Christopher2015-06-171-7/+1
| | | | | | | | | | | | | | | | | | | This involved removing the conditional inclusion and replacing them with target attributes matching the original conditional inclusion and checks. The testcase update removes the macro checks for each file and replaces them with usage of the __target__ attribute, e.g.: int __attribute__((__target__(("sse3")))) foo(int a) { _mm_mwait(0, 0); return 4; } This usage does require the enclosing function have the requisite __target__ attribute for inlining and code generation - also for any macro intrinsic uses in the enclosing function. There's no change for existing uses of the intrinsic headers. llvm-svn: 239883
* Use a define for per-file function attributes for the Intel intrinsic headers.Eric Christopher2015-06-171-12/+17
| | | | | | | This is a precursor to changing them to use the new target attribute code. llvm-svn: 239882
* PR14964: intrinsic headers using non-reserved identifiersDavid Blaikie2013-01-161-24/+24
| | | | | | | | | | | | | | | | Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
* Tweak *mmintrin.h so that they don't make any bad assumptions about ↵Eli Friedman2011-09-151-5/+1
| | | | | | | | alignment (which probably has little effect in practice, but better to get it right). Make the load in _mm_loadh_pi and _mm_loadl_pi a single LLVM IR instruction to make optimizing easier for CodeGen. rdar://10054986 llvm-svn: 139874
* fix PR6658: inline isn't a keyword in C89 mode, use __inline__ instead.Chris Lattner2010-03-221-13/+13
| | | | llvm-svn: 99190
* Fix an error in _mm_loaddup_pd that Eli noticed.Anders Carlsson2009-02-141-1/+1
| | | | llvm-svn: 64522
* Add the nodebug attribute to intrinsicsAnders Carlsson2009-02-141-13/+13
| | | | llvm-svn: 64519
* 80col.Mike Stump2009-02-131-13/+26
| | | | llvm-svn: 64450
* Add pmmintrin.h header.Anders Carlsson2009-02-111-0/+108
llvm-svn: 64291
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