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path: root/clang/lib/Driver/ToolChains/Arch/RISCV.cpp
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* Revert "[RISCV] Add Clang frontend support for Bitmanip extension"Scott Egerton2020-01-151-3/+0
| | | | This reverts commit 57cf6ee9c84434161088c39a6f8dd2aae14eb12d.
* [RISCV] Add Clang frontend support for Bitmanip extensionScott Egerton2020-01-141-0/+3
| | | | | | | | | | | | | | Summary: This adds the __riscv_bitmanip macro and the 'b' target feature to enable it. Reviewers: asb, simoncook, lewis-revill, PaoloS, lenary Reviewed By: lenary Subscribers: Jim, rbar, johnrusso, sabuasal, niosHD, kito-cheng, shiva0217, jrtc27, MaskRay, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna, pzheng, sameer.abuasal, apazos, luismarques, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D71553
* [RISCV] Match GCC `-march`/`-mabi` driver defaultsSam Elliott2019-11-151-12/+127
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Clang/LLVM is a cross-compiler, and so we don't have to make a choice about `-march`/`-mabi` at build-time, but we may have to compute a default `-march`/`-mabi` when compiling a program. Until now, each place that has needed a default `-march` has calculated one itself. This patch adds a single place where a default `-march` is calculated, in order to avoid calculating different defaults in different places. This patch adds a new function `riscv::getRISCVArch` which encapsulates this logic based on GCC's for computing a default `-march` value when none is provided. This patch also updates the logic in `riscv::getRISCVABI` to match the logic in GCC's build system for computing a default `-mabi`. This patch also updates anywhere that `-march` is used to now use the new function which can compute a default. In particular, we now explicitly pass a `-march` value down to the gnu assembler. GCC has convoluted logic in its build system to choose a default `-march`/`-mabi` based on build options, which would be good to match. This patch is based on the logic in GCC 9.2.0. This commit's logic is different to GCC's only for baremetal targets, where we default to rv32imac/ilp32 or rv64imac/lp64 depending on the target triple. Tests have been updated to match the new logic. Reviewers: asb, luismarques, rogfer01, kito-cheng, khchen Reviewed By: asb, luismarques Subscribers: sameer.abuasal, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, shiva0217, jrtc27, MaskRay, zzheng, edward-jones, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna, Jim, s.egerton, pzheng, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D69383
* [RISCV] Add support for -ffixed-xX flagsSimon Cook2019-10-221-0/+64
| | | | | | | | | | | This adds support for reserving GPRs such that the compiler will not choose a register for register allocation. The implementation follows the same design as for AArch64; each reserved register becomes a target feature and used for getting the reserved registers for a given MachineFunction. The backend checks that it does not need to write to any reserved register; if it does a relevant error is generated. Differential Revision: https://reviews.llvm.org/D67185
* [RISCV] Make -march=rv{32,64}gc the default in RISC-V LinuxRoger Ferrer Ibanez2019-09-101-7/+12
| | | | | | | | This is the logical follow-up of D65634. Differential Revision: https://reviews.llvm.org/D66003 llvm-svn: 371496
* [RISCV] Default to ilp32d/lp64d in RISC-V LinuxRoger Ferrer Ibanez2019-09-101-3/+5
| | | | | | | | | | When running clang as a native compiler in RISC-V Linux the flag -mabi=ilp32d / -mabi=lp64d is always mandatory. This change makes it the default there. Differential Revision: https://reviews.llvm.org/D65634 llvm-svn: 371494
* [RISCV] Move architecture parsing code into its own functionRoger Ferrer Ibanez2019-09-101-140/+150
| | | | | | | | | | | I plan to reuse it in a later patch. This is almost NFC except a small change in control flow when diagnosing +d without +f. Differential Revision: https://reviews.llvm.org/D66002 llvm-svn: 371492
* [RISCV] Remove duplicated logic when determining the target ABIRoger Ferrer Ibanez2019-08-071-1/+7
| | | | | | | | We were calculating twice ilp32/lp64. Do this in one place instead. Differential Revision: https://reviews.llvm.org/D48357 llvm-svn: 368128
* [RISCV] Avoid save-restore target feature warningSam Elliott2019-07-011-5/+3
| | | | | | | | | | | | | | | | | | | | | | | Summary: LLVM issues a warning if passed unknown target features. Neither I nor @asb noticed this until after https://reviews.llvm.org/D63498 landed. This patch stops passing the (unknown) "save-restore" target feature to the LLVM backend, but continues to emit a warning if a driver asks for `-msave-restore`. The default of assuming `-mno-save-restore` (and emitting no warnings) remains. Reviewers: asb Reviewed By: asb Subscribers: rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, kito-cheng, shiva0217, jrtc27, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna, Jim, cfe-commits, asb Tags: #clang Differential Revision: https://reviews.llvm.org/D64008 llvm-svn: 364777
* [RISC-V] Add -msave-restore and -mno-save-restore to clang driverSam Elliott2019-06-211-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: The GCC RISC-V toolchain accepts `-msave-restore` and `-mno-save-restore` to control whether libcalls are used for saving and restoring the stack within prologues and epilogues. Clang currently errors if someone passes -msave-restore or -mno-save-restore. This means that people need to change build configurations to use clang. This patch adds these flags, so that clang invocations can now match gcc. As the RISC-V backend does not currently have a `save-restore` target feature, we emit a warning if someone requests `-msave-restore`. LLVM does not error if we pass the (unimplemented) target features `+save-restore` or `-save-restore`. Reviewers: asb, luismarques Reviewed By: asb Subscribers: rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, kito-cheng, shiva0217, jrtc27, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D63498 llvm-svn: 364018
* [Driver][RISCV] Simplify. NFCFangrui Song2019-05-261-31/+13
| | | | llvm-svn: 361710
* [RISCV] Default enable RISCV linker relaxationShiva Chen2019-02-171-0/+12
| | | | | | Differential Revision: https://reviews.llvm.org/D47127 llvm-svn: 354222
* Use llvm::is_contained. NFCFangrui Song2019-02-101-1/+1
| | | | llvm-svn: 353635
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
| | | | | | | | | | | | | | | | | to reflect the new license. We understand that people may be surprised that we're moving the header entirely to discuss the new license. We checked this carefully with the Foundation's lawyer and we believe this is the correct approach. Essentially, all code in the project is now made available by the LLVM project under our new license, so you will see that the license headers include that license only. Some of our contributors have contributed code under our old license, and accordingly, we have retained a copy of our old license notice in the top-level files in each project and repository. llvm-svn: 351636
* Remove trailing spaceFangrui Song2018-07-301-1/+1
| | | | | | sed -Ei 's/[[:space:]]+$//' include/**/*.{def,h,td} lib/**/*.{cpp,h} llvm-svn: 338291
* [RISCV] Add -mrelax/-mno-relax flags to enable/disable RISCV linker relaxationShiva Chen2018-05-291-0/+5
| | | | | | Differential Revision: https://reviews.llvm.org/D44888 llvm-svn: 333385
* Switch to Clang's isDigit function.Richard Trieu2018-04-251-4/+4
| | | | | | | | std::isdigit can be overloaded, causing the template deduction to fail. Use Clang's isDigit function which to avoid this. Switch the other calls for consistency. llvm-svn: 330887
* Include <cctype> to get std::isdigit, fixes MSVC STL buildReid Kleckner2018-04-251-0/+1
| | | | llvm-svn: 330886
* [RISCV] More validations on the input value of -march=Ana Pazos2018-04-251-20/+270
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Supporting additional rules for parsing ISA string. - RISC-V ISA strings must be lowercase. E.g.: rv32IMC is not supported, rv32imc is correct. - Multi-letter extensions are to be separated by a single underscore '_'. The extension prefix counts as a letter. This means extensions that start with 's', 'sx' and 'sx' are all multi-letter. E.g.: xasb is a single non-standard extension named 'xasb' xa_sb are two extensions, the non-standard user level extension 'xa', and the supervisor level extension 'sb'. - Standard user-level extensions are specified following a canonical order, according to Table 22.1 in RISC-V User-Level ISA V2.2. - Non-standard user-level 'x' extensions, standard supervisor-level 's' extensions and non-standard supervisor-level 'sx' extensions are also specified following a canonical order according to Table 22.1 in RISC-V User-Level ISA V2.2: 'x' extensions, follwed by 's' extensions and then 'sx' extensions. - Extensions might have a version number. Underscores may be used to separate ISA subset components to improve readability and to provide disambiguation. E.g.: rv32i2_m3_a1_f2_d2 - Version numbers are divided into major and minor numbers, separated by a 'p'. If the minor version is 0, then 'p0' can be omitted. - Additional checks for dependent extensions and invalid extensions combinations. E.g.: 'e' requires rv32 'e' can't be combined with 'f' nor 'd' 'q' requires rv64 - TODO items have also been marked with comments in the code. Reviewers: asb, kito-cheng Reviewed By: asb Subscribers: edward-jones, mgrang, zzheng, rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal, niosHD, shiva0217, cfe-commits Differential Revision: https://reviews.llvm.org/D45284 llvm-svn: 330880
* [PATCH] [RISCV] Verify the input value of -march=Shiva Chen2018-03-281-6/+67
| | | | | | | | | | | | | | Summary: This patch doing more check and verify the -march= string and will issue an error if it's a invalid combination. Reviewers: asb, apazos Differential Revision: https://reviews.llvm.org/D44189 Patch by Kito Cheng. llvm-svn: 328690
* [RISCV] Add the RISCV target and compiler driverAlex Bradbury2018-01-111-0/+61
As RV64 codegen has not yet been upstreamed into LLVM, we focus on RV32 driver support (RV64 to follow). Differential Revision: https://reviews.llvm.org/D39963 llvm-svn: 322276
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