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path: root/clang/lib/Driver/ToolChains/Arch/AArch64.cpp
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* AArch64: add missing Apple CPU names and use them by default.Tim Northover2020-01-081-4/+5
| | | | | | | | Apple's CPUs are called A7-A13 in official communication, occasionally with weird suffixes which we probably don't need to care about. This adds each one and describes its features. It also switches the default CPU to the canonical name for Cyclone, but leaves legacy support in so that existing bitcode still compiles.
* Move endian constant from Host.h to SwapByteOrder.h, prune includeReid Kleckner2019-10-191-0/+1
| | | | | | | | | | | | | | Works on this dependency chain: ArrayRef.h -> Hashing.h -> --CUT-- Host.h -> StringMap.h / StringRef.h ArrayRef is very popular, but Host.h is rarely needed. Move the IsBigEndianHost constant to SwapByteOrder.h. Clients of that header are more likely to need it. llvm-svn: 375316
* [AArch64] Support selecting TPIDR_EL[1-3] as the thread baseOliver Stannard2019-03-291-0/+12
| | | | | | | | | | | | | | Add an -mtp=el[0-3] option to select which of the AArch64 thread ID registers will be used for the TLS base pointer. This is a followup to rL356657 which added subtarget features to enable accesses to the privileged thread ID registers. Patch by Philip Derrin! Differential revision: https://reviews.llvm.org/D59631 llvm-svn: 357250
* [Driver] Pass +reserve-x25 to backend if -ffixed-x25 is specifiedPetr Hosek2019-02-131-0/+3
| | | | | | This was accidentally omitted in r353957 breaking the Clang test. llvm-svn: 353960
* [AArch64] Support reserving arbitrary general purpose registersPetr Hosek2019-02-131-0/+42
| | | | | | | | | | | | This is a follow up to D48580 and D48581 which allows reserving arbitrary general purpose registers with the exception of registers with special purpose (X8, X16-X18, X29, X30) and registers used by LLVM (X0, X19). This change also generalizes some of the existing logic to rely entirely on values generated from tablegen. Differential Revision: https://reviews.llvm.org/D56305 llvm-svn: 353957
* Use llvm::is_contained. NFCFangrui Song2019-02-101-3/+2
| | | | llvm-svn: 353635
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
| | | | | | | | | | | | | | | | | to reflect the new license. We understand that people may be surprised that we're moving the header entirely to discuss the new license. We checked this carefully with the Foundation's lawyer and we believe this is the correct approach. Essentially, all code in the project is now made available by the LLVM project under our new license, so you will see that the license headers include that license only. Some of our contributors have contributed code under our old license, and accordingly, we have retained a copy of our old license notice in the top-level files in each project and repository. llvm-svn: 351636
* [darwin][arm64] use the "cyclone" CPU for Darwin even when `-arch`Alex Lorenz2018-12-171-10/+20
| | | | | | | | | | | | | | | | is not specified The -target option allows the user to specify the build target using LLVM triple. The triple includes the arch, and so the -arch option is redundant. This should work just as well without the -arch. However, the driver has a bug in which it doesn't target the "Cyclone" CPU for darwin if -target is used without -arch. This commit fixes this issue. rdar://46743182 Differential Revision: https://reviews.llvm.org/D55731 llvm-svn: 349382
* [AArch64][ARM] Context sensitive meaning of cryptoSjoerd Meijer2018-10-041-0/+81
| | | | | | | | | | | | | | For AArch64, crypto means: - sm4 + sha3 + sha2 + aes for Armv8.4-A and up, and - sha2 + aes for Armv8.3-A and earlier. For AArch32: Crypto means sha2 + aes, because the Armv8.2-A crypto instructions were added to AArch64 only. Differential Revision: https://reviews.llvm.org/D50179 llvm-svn: 343758
* [AArch64] Support adding X[8-15,18] registers as CSRs.Tri Vo2018-09-251-0/+27
| | | | | | | | | | | | | | | | | | Summary: Making X[8-15,18] registers call-saved is used to support CONFIG_ARM64_LSE_ATOMICS in Linux kernel. Signed-off-by: Tri Vo <trong@android.com> Reviewers: srhines, nickdesaulniers, javed.absar Reviewed By: nickdesaulniers Subscribers: kristof.beyls, jfb, cfe-commits Differential Revision: https://reviews.llvm.org/D52399 llvm-svn: 342990
* [ARM][AArch64] Add feature +fp16fmlSjoerd Meijer2018-09-241-0/+26
| | | | | | | | | | | | | | | | | | | | | Armv8.4-A adds a few FP16 instructions that can optionally be implemented in CPUs of Armv8.2-A and above. This patch adds a feature to clang to permit selection of these instructions. This interacts with the +fp16 option as follows: Prior to Armv8.4-A: *) +fp16fml implies +fp16 *) +nofp16 implies +nofp16fml From Armv8.4-A: *) The above conditions apply, additionally: +fp16 implies +fp16fml Patch by Bernard Ogden. Differential Revision: https://reviews.llvm.org/D50229 llvm-svn: 342862
* [AArch64] Support reserving x1-7 registers.Tri Vo2018-09-121-0/+21
| | | | | | | | | | | | | | Summary: Reserving registers x1-7 is used to support CONFIG_ARM64_LSE_ATOMICS in Linux kernel. This change adds support for reserving registers x1 through x7. Reviewers: javed.absar, efriedma, nickdesaulniers, srhines, phosek Reviewed By: nickdesaulniers Subscribers: manojgupta, jfb, cfe-commits, kristof.beyls Differential Revision: https://reviews.llvm.org/D48581 llvm-svn: 342100
* [Driver,AArch64] Add support for -mcpu=native.Florian Hahn2018-07-061-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | This patches adds support for passing -mcpu=native for AArch64. It will get turned into the host CPU name, before we get the target features. CPU = native is handled in a similar fashion in getAArch64MicroArchFetauresFromMtune and getAArch64TargetCPU already. Having a good test case for this is hard, as it depends on the host CPU of the machine running the test. But we can check that native has been replaced with something else. When cross-compiling, we will get a CPU name from the host architecture and get ` the clang compiler does not support '-mcpu=native'` as error message, which seems reasonable to me. Reviewers: rengolin, peter.smith, dlj, javed.absar, t.p.northover Reviewed By: peter.smith Tags: #clang Differential Revision: https://reviews.llvm.org/D48931 llvm-svn: 336429
* [AArch64] Support reserving x20 registerPetr Hosek2018-06-121-0/+3
| | | | | | | | | | | | Register x20 is a callee-saved register which may be used for other purposes in certain contexts, for example to hold special variables within the kernel. This change adds support for reserving this register both to frontend and backend to make this register usable for these purposes. Differential Revision: https://reviews.llvm.org/D46552 llvm-svn: 334531
* [AArch64] Fix PR34625 -mtune without -mcpu should not set -target-cpuPeter Smith2017-10-241-6/+10
| | | | | | | | | | | | | | | | | | | | When -mtune is used on AArch64 the -target-cpu is passed the value of the cpu given to -mtune. As well as setting micro-architectural features of the -mtune cpu, this will also add the architectural features such as support for instructions. This can result in the backend using instructions that are supported in the -mtune cpu but not supported in the target architecture. For example use of the v8.1-a LSE extensions with -march=v8. This change removes the setting of -target-cpu for -mtune, the -mcpu must be used to set -target-cpu. This has the effect of removing all non-hard coded benefits of mtune but it does produce correct output when -mtune cpu with a later architecture than v8 is used. Fixes PR34625 Differential Revision: https://reviews.llvm.org/D39179 llvm-svn: 316424
* Update to use enum classes for various ARM *Kind enumsFlorian Hahn2017-07-271-3/+3
| | | | | | | | | | | | | | Summary: This updates the relevant Clang parts for the LLVM change D35882. Reviewers: rengolin, chandlerc, javed.absar, rovka Reviewed By: rovka Subscribers: aemerson, cfe-commits, kristof.beyls Differential Revision: https://reviews.llvm.org/D35884 llvm-svn: 309289
* [ARM] Add a driver option for +no-neg-immediatesSanne Wouda2017-03-271-0/+3
| | | | | | | | | | | | Reviewers: olista01, rengolin, javed.absar, samparker Reviewed By: samparker Subscribers: samparker, llvm-commits, aemerson Differential Revision: https://reviews.llvm.org/D31197 llvm-svn: 298850
* [Driver] Consolidate tools and toolchains by target platform. (NFC)David L. Jones2017-03-081-0/+196
Summary: (This is a move-only refactoring patch. There are no functionality changes.) This patch splits apart the Clang driver's tool and toolchain implementation files. Each target platform toolchain is moved to its own file, along with the closest-related tools. Each target platform toolchain has separate headers and implementation files, so the hierarchy of classes is unchanged. There are some remaining shared free functions, mostly from Tools.cpp. Several of these move to their own architecture-specific files, similar to r296056. Some of them are only used by a single target platform; since the tools and toolchains are now together, some helpers now live in a platform-specific file. The balance are helpers related to manipulating argument lists, so they are now in a new file pair, CommonArgs.h and .cpp. I've tried to cluster the code logically, which is fairly straightforward for most of the target platforms and shared architectures. I think I've made reasonable choices for these, as well as the various shared helpers; but of course, I'm happy to hear feedback in the review. There are some particular things I don't like about this patch, but haven't been able to find a better overall solution. The first is the proliferation of files: there are several files that are tiny because the toolchain is not very different from its base (usually the Gnu tools/toolchain). I think this is mostly a reflection of the true complexity, though, so it may not be "fixable" in any reasonable sense. The second thing I don't like are the includes like "../Something.h". I've avoided this largely by clustering into the current file structure. However, a few of these includes remain, and in those cases it doesn't make sense to me to sink an existing file any deeper. Reviewers: rsmith, mehdi_amini, compnerd, rnk, javed.absar Subscribers: emaste, jfb, danalbert, srhines, dschuff, jyknight, nemanjai, nhaehnle, mgorny, cfe-commits Differential Revision: https://reviews.llvm.org/D30372 llvm-svn: 297250
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