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* Move TargetInfo::adjustInlineAsmType to TargetCodeGenInfoPeter Collingbourne2011-02-181-0/+22
| | | | llvm-svn: 125819
* Triple::MinGW64 is deprecated and removed. We can use Triple::MinGW32 instead.NAKAMURA Takumi2011-02-171-1/+1
| | | | | | No one uses *-mingw64. mingw-w64 is represented as {i686|x86_64}-w64-mingw32. llvm-svn: 125742
* Fix whitespace.NAKAMURA Takumi2011-02-171-1/+1
| | | | llvm-svn: 125741
* Add NetBSD target support. Patch by Joerg Sonnenberger.Benjamin Kramer2011-02-021-0/+1
| | | | llvm-svn: 124736
* lib/CodeGen/TargetInfo.cpp: Fix coding style and erase an obsolete comment.NAKAMURA Takumi2011-01-191-6/+4
| | | | llvm-svn: 123790
* lib/CodeGen/TargetInfo.cpp: Add Win64 calling conversion.NAKAMURA Takumi2011-01-171-2/+49
| | | | | | | FIXME: It would be incompatible to Microsoft's in one point. On mingw64-gcc, {i128} is expanded for args and returned as {rax, rdx}. llvm-svn: 123692
* Remove special handling for opaque Neon vector types.Bob Wilson2011-01-111-9/+0
| | | | | | Clang does not wrap the vectors in structs anymore so this isn't needed. llvm-svn: 123241
* Move DefaultABIInfo::classifyReturnType where it belongs. No functional change.Bob Wilson2011-01-101-15/+15
| | | | llvm-svn: 123195
* 1. Add some ABI information for the Microblaze.Wesley Peck2010-12-191-0/+113
| | | | | | 2. Add attibutes "interrupt_handler" and "save_volatiles" for the Microblaze target. llvm-svn: 122184
* Use a twine.Benjamin Kramer2010-11-121-3/+1
| | | | llvm-svn: 118892
* Rename getBaseClassOffset to getBaseClassOffsetInBits and introduce a ↵Anders Carlsson2010-10-311-2/+2
| | | | | | getBaseClassOffset which returns the offset in CharUnits. Do the same thing for getVBaseClassOffset. llvm-svn: 117881
* Fix Whitespace.Michael J. Spencer2010-10-191-11/+11
| | | | llvm-svn: 116798
* We shouldn't keep track of MMX registers "needed" separately from the SSEBill Wendling2010-10-181-21/+11
| | | | | | registers needed. llvm-svn: 116772
* Reapply r116684 with fixes. The test cases needed to be updated.Bill Wendling2010-10-181-12/+47
| | | | llvm-svn: 116696
* Temporarily revert r116684. It was causing failures with Bill Wendling2010-10-171-47/+12
| | | | | | | Clang :: CodeGen/x86_32-arguments-darwin.c Clang :: CodeGen/x86_32-arguments-linux.c llvm-svn: 116687
* The "gcc.dg/compat/vector-1 -m32" test was broken after the MMX rewrite. TheBill Wendling2010-10-171-12/+47
| | | | | | | | function parameters weren't converted to use the correct type (x86_mmx). Add a check, similar to the one in llvm-gcc, to see if we need the x86_mmx type for that function parameter. If so, it coerces the type to be that. llvm-svn: 116684
* Per discussion with Sanjiv, remove the PIC16 target from mainline. When/ifChris Lattner2010-10-111-73/+0
| | | | | | | it comes back, it will be largely a rewrite, so keeping the old codebase in tree isn't helping anyone. llvm-svn: 116191
* IRgen/ABI/ARM: Return large vectors in memory.Daniel Dunbar2010-09-231-0/+4
| | | | llvm-svn: 114619
* IRgen/ABI/ARM: Trust the backend to pass vectors correctly for the given ABI.Daniel Dunbar2010-09-231-0/+11
| | | | | | | | | | - Therefore, we can lower out the NEON wrapper structs and pass the vectors directly. This makes a huge difference in the cleanliness of the IR after optimization. - I will trust, but verify, via future ABITest testing (for APCS-GNU, at least). llvm-svn: 114618
* IRgen/ABI/x86-32: Realign indirect arguments when the ABI requires us to passDaniel Dunbar2010-09-161-15/+24
| | | | | | them with a smaller alignment than the rest of codegen expects. llvm-svn: 114115
* IRgen/ABI: Add support for realigning structures which are passed by indirectDaniel Dunbar2010-09-161-1/+2
| | | | | | reference. llvm-svn: 114114
* IRgen/ABI/x86_32/Darwin: On Darwin, only structures with SSE vector types ↵Daniel Dunbar2010-09-161-3/+32
| | | | | | | | | | | get passed with a non-default-stack-ABI-alignment (of 16). - This fixes the ABI convenient, but breaks codegen since we now have underaligned arguments. Marginal improvement overall though, and will be fixed in next commit. llvm-svn: 114113
* IRgen/x86_32/Linux: Linux seems to align all stack objects to 4 bytes, unlikeDaniel Dunbar2010-09-161-3/+23
| | | | | | | Darwin. Checked vs the handiest Linux llvm-gcc I had around, someone on Linux is welcome to investigate more. llvm-svn: 114112
* fix rdar://8360877 a really nasty miscompilation in Boost.XpressiveChris Lattner2010-09-011-3/+47
| | | | | | | | | | | | | | | caused by my ABI work. Passing: struct outer { int x; struct epsilon_matcher {} e; int f; }; as {i32,i32} isn't safe, because the offset of the second element needs to be at 8 when it is interpreted as a memory value. llvm-svn: 112686
* same refactoring as before, this time on the argument side.Chris Lattner2010-09-011-16/+17
| | | | llvm-svn: 112684
* refactor some code to cut down on redundancy, no functionality change.Chris Lattner2010-09-011-22/+19
| | | | llvm-svn: 112683
* Add support for windows x86-64 varargs, patch by Cameron Esfahani!Chris Lattner2010-08-311-2/+63
| | | | llvm-svn: 112603
* Fix PR8029, a x86-32 ABI regression in introduced in r112211Chris Lattner2010-08-301-1/+0
| | | | llvm-svn: 112537
* improve comments.Chris Lattner2010-08-261-5/+2
| | | | llvm-svn: 112214
* fix 2xi16 to pass as i32 instead of <2 x i16>. The former passes inChris Lattner2010-08-261-0/+19
| | | | | | | memory (as required) the later now passes in an xmm register. This fixes gcc.dg/compat/vector_1 on x86-32. llvm-svn: 112211
* vector of long and ulong are also classified as INTEGER in x86-64 abi,Chris Lattner2010-08-261-1/+3
| | | | | | | this fixes rdar://8358475 a failure of the gcc.dg/compat/vector_1 abi test. llvm-svn: 112205
* 1 x ulonglong needs to be classified as INTEGER, just like 1 x longlong,Chris Lattner2010-08-261-1/+2
| | | | | | this fixes a miscompilation on the included testcase, rdar://8359248 llvm-svn: 112201
* tame an assertion, fixing rdar://8357396Chris Lattner2010-08-261-1/+1
| | | | llvm-svn: 112174
* Finally pass "two floats in a 64-bit unit" as a <2 x float> instead ofChris Lattner2010-08-251-6/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | as a double in the x86-64 ABI. This allows us to generate much better code for certain things, e.g.: _Complex float f32(_Complex float A, _Complex float B) { return A+B; } Used to compile into (look at the integer silliness!): _f32: ## @f32 ## BB#0: ## %entry movd %xmm1, %rax movd %eax, %xmm1 movd %xmm0, %rcx movd %ecx, %xmm0 addss %xmm1, %xmm0 movd %xmm0, %edx shrq $32, %rax movd %eax, %xmm0 shrq $32, %rcx movd %ecx, %xmm1 addss %xmm0, %xmm1 movd %xmm1, %eax shlq $32, %rax addq %rdx, %rax movd %rax, %xmm0 ret Now we get: _f32: ## @f32 movdqa %xmm0, %xmm2 addss %xmm1, %xmm2 pshufd $16, %xmm2, %xmm2 pshufd $1, %xmm1, %xmm1 pshufd $1, %xmm0, %xmm0 addss %xmm1, %xmm0 pshufd $16, %xmm0, %xmm1 movdqa %xmm2, %xmm0 unpcklps %xmm1, %xmm0 ret and compile stuff like: extern float _Complex ccoshf( float _Complex ) ; float _Complex ccosf ( float _Complex z ) { float _Complex iz; (__real__ iz) = -(__imag__ z); (__imag__ iz) = (__real__ z); return ccoshf(iz); } into: _ccosf: ## @ccosf ## BB#0: ## %entry pshufd $1, %xmm0, %xmm1 xorps LCPI4_0(%rip), %xmm1 unpcklps %xmm0, %xmm1 movaps %xmm1, %xmm0 jmp _ccoshf ## TAILCALL instead of: _ccosf: ## @ccosf ## BB#0: ## %entry movd %xmm0, %rax movq %rax, %rcx shlq $32, %rcx shrq $32, %rax xorl $-2147483648, %eax ## imm = 0xFFFFFFFF80000000 addq %rcx, %rax movd %rax, %xmm0 jmp _ccoshf ## TAILCALL There is still "stuff to be done" here for the struct case, but this resolves rdar://6379669 - [x86-64 ABI] Pass and return _Complex float / double efficiently llvm-svn: 112111
* Fix horrible white space errors.Michael J. Spencer2010-08-251-69/+69
| | | | llvm-svn: 112067
* Experiment with using first-class aggregates to represent member functionJohn McCall2010-08-221-11/+16
| | | | | | | | | | pointers. I find the resulting code to be substantially cleaner, and it makes it very easy to use the same APIs for data member pointers (which I have conscientiously avoided here), and it avoids a plethora of potential inefficiencies due to excessive memory copying, but we'll have to see if it actually works. llvm-svn: 111776
* fix PR5179 and correctly fix PR5831 to not miscompile.Chris Lattner2010-07-301-10/+32
| | | | | | | | | | | | | | | | | | | | The X86-64 ABI code didn't handle the case when a struct would get classified and turn up as "NoClass INTEGER" for example. This is perfectly possible when the first slot is all padding (e.g. due to empty base classes). In this situation, the first 8-byte doesn't take a register at all, only the second 8-byte does. This fixes this by enhancing the x86-64 abi stuff to allow and handle this case, reverts the broken fix for PR5831, and enhances the target independent stuff to be able to handle an argument value in registers being accessed at an offset from the memory value. This is the last x86-64 calling convention related miscompile that I'm aware of. llvm-svn: 109848
* move the last hunk of getCoerceResult into the placeChris Lattner2010-07-291-32/+27
| | | | | | that needs it and remove getCoerceResult. llvm-svn: 109807
* now that direct and coerce are merged, getCoerceResult gets simpler.Chris Lattner2010-07-291-5/+0
| | | | llvm-svn: 109805
* now that GetSSETypeAtOffset handles passing SSE class values asChris Lattner2010-07-291-14/+0
| | | | | | float, the special case hack in getCoerceResult can go away. llvm-svn: 109804
* Implement the clang-side of detection for when to pass asChris Lattner2010-07-291-3/+39
| | | | | | | | <2 x float> instead of double. This works but can't be turned on until I teach codegen to pass <2 x float> as one XMM register instead of two. llvm-svn: 109790
* Look at me, I can count!Chris Lattner2010-07-291-1/+1
| | | | llvm-svn: 109786
* fix rdar://8251384, another case where we could access beyond theChris Lattner2010-07-291-21/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | end of a struct. This improves the case when the struct being passed contains 3 floats, either due to a struct or array of 3 things. Before we'd generate this IR for the testcase: define float @bar(double %X.coerce0, double %X.coerce1) nounwind { entry: %X = alloca %struct.foof, align 8 ; <%struct.foof*> [#uses=2] %0 = bitcast %struct.foof* %X to %1* ; <%1*> [#uses=2] %1 = getelementptr %1* %0, i32 0, i32 0 ; <double*> [#uses=1] store double %X.coerce0, double* %1 %2 = getelementptr %1* %0, i32 0, i32 1 ; <double*> [#uses=1] store double %X.coerce1, double* %2 %tmp = getelementptr inbounds %struct.foof* %X, i32 0, i32 2 ; <float*> [#uses=1] %tmp1 = load float* %tmp ; <float> [#uses=1] ret float %tmp1 } which compiled (with optimization) to: _bar: ## @bar ## BB#0: ## %entry movd %xmm1, %rax movd %eax, %xmm0 ret Now we produce: define float @bar(double %X.coerce0, float %X.coerce1) nounwind { entry: %X = alloca %struct.foof, align 8 ; <%struct.foof*> [#uses=2] %0 = bitcast %struct.foof* %X to %0* ; <%0*> [#uses=2] %1 = getelementptr %0* %0, i32 0, i32 0 ; <double*> [#uses=1] store double %X.coerce0, double* %1 %2 = getelementptr %0* %0, i32 0, i32 1 ; <float*> [#uses=1] store float %X.coerce1, float* %2 %tmp = getelementptr inbounds %struct.foof* %X, i32 0, i32 2 ; <float*> [#uses=1] %tmp1 = load float* %tmp ; <float> [#uses=1] ret float %tmp1 } and: _bar: ## @bar ## BB#0: ## %entry movaps %xmm1, %xmm0 ret llvm-svn: 109776
* start setting up infrastructure for passing multi-floatsChris Lattner2010-07-291-15/+33
| | | | | | | as <2 x float> instead of as double. The backend isn't ready yet, but infrastructure in the frontend can come up. llvm-svn: 109768
* rename Get8ByteTypeAtOffset -> GetINTEGERTypeAtOffset toChris Lattner2010-07-291-17/+18
| | | | | | | make it clear that this function should only return a type that the codegen will classify the same as an INTEGER type. llvm-svn: 109763
* handle a case where we could access off the end of a functionChris Lattner2010-07-291-9/+6
| | | | | | that Eli pointed out, rdar://8249586 llvm-svn: 109762
* fix PR7742 / rdar://8250764, a miscompilation of structChris Lattner2010-07-291-2/+3
| | | | | | | | | | | return where the struct has a base but no fields. This was because the x86-64 abi logic was checking the wrong predicate in one place. This was introduced in r91874, which was a fix for PR5831, which lacked a CHECK line, so I verified and added it. llvm-svn: 109759
* This is a little bit far, but optimize cases like:Chris Lattner2010-07-291-3/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | struct a { struct c { double x; int y; } x[1]; }; void foo(struct a A) { } into: define void @foo(double %A.coerce0, i32 %A.coerce1) nounwind { entry: %A = alloca %struct.a, align 8 ; <%struct.a*> [#uses=1] %0 = bitcast %struct.a* %A to %struct.c* ; <%struct.c*> [#uses=2] %1 = getelementptr %struct.c* %0, i32 0, i32 0 ; <double*> [#uses=1] store double %A.coerce0, double* %1 %2 = getelementptr %struct.c* %0, i32 0, i32 1 ; <i32*> [#uses=1] store i32 %A.coerce1, i32* %2 instead of: define void @foo(double %A.coerce0, i64 %A.coerce1) nounwind { entry: %A = alloca %struct.a, align 8 ; <%struct.a*> [#uses=1] %0 = bitcast %struct.a* %A to %0* ; <%0*> [#uses=2] %1 = getelementptr %0* %0, i32 0, i32 0 ; <double*> [#uses=1] store double %A.coerce0, double* %1 %2 = getelementptr %0* %0, i32 0, i32 1 ; <i64*> [#uses=1] store i64 %A.coerce1, i64* %2 I only do this now because I never want to look at this code again :) llvm-svn: 109738
* implement a todo: pass a eight-byte that consists of aChris Lattner2010-07-291-6/+92
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | small integer + padding as that small integer. On code like: struct c { double x; int y; }; void bar(struct c C) { } This means that we compile to: define void @bar(double %C.coerce0, i32 %C.coerce1) nounwind { entry: %C = alloca %struct.c, align 8 ; <%struct.c*> [#uses=2] %0 = getelementptr %struct.c* %C, i32 0, i32 0 ; <double*> [#uses=1] store double %C.coerce0, double* %0 %1 = getelementptr %struct.c* %C, i32 0, i32 1 ; <i32*> [#uses=1] store i32 %C.coerce1, i32* %1 instead of: define void @bar(double %C.coerce0, i64 %C.coerce1) nounwind { entry: %C = alloca %struct.c, align 8 ; <%struct.c*> [#uses=3] %0 = bitcast %struct.c* %C to %0* ; <%0*> [#uses=2] %1 = getelementptr %0* %0, i32 0, i32 0 ; <double*> [#uses=1] store double %C.coerce0, double* %1 %2 = getelementptr %0* %0, i32 0, i32 1 ; <i64*> [#uses=1] store i64 %C.coerce1, i64* %2 which gives SRoA heartburn. This implements rdar://5711709, a nice low number :) llvm-svn: 109737
* Kill off the 'coerce' ABI passing form. Now 'direct' and 'extend' alwaysChris Lattner2010-07-291-24/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | have a "coerce to" type which often matches the default lowering of Clang type to LLVM IR type, but the coerce case can be handled by making them not be the same. This simplifies things and fixes issues where X86-64 abi lowering would return coerce after making preferred types exactly match up. This caused us to compile: typedef float v4f32 __attribute__((__vector_size__(16))); v4f32 foo(v4f32 X) { return X+X; } into this code at -O0: define <4 x float> @foo(<4 x float> %X.coerce) nounwind { entry: %retval = alloca <4 x float>, align 16 ; <<4 x float>*> [#uses=2] %coerce = alloca <4 x float>, align 16 ; <<4 x float>*> [#uses=2] %X.addr = alloca <4 x float>, align 16 ; <<4 x float>*> [#uses=3] store <4 x float> %X.coerce, <4 x float>* %coerce %X = load <4 x float>* %coerce ; <<4 x float>> [#uses=1] store <4 x float> %X, <4 x float>* %X.addr %tmp = load <4 x float>* %X.addr ; <<4 x float>> [#uses=1] %tmp1 = load <4 x float>* %X.addr ; <<4 x float>> [#uses=1] %add = fadd <4 x float> %tmp, %tmp1 ; <<4 x float>> [#uses=1] store <4 x float> %add, <4 x float>* %retval %0 = load <4 x float>* %retval ; <<4 x float>> [#uses=1] ret <4 x float> %0 } Now we get: define <4 x float> @foo(<4 x float> %X) nounwind { entry: %X.addr = alloca <4 x float>, align 16 ; <<4 x float>*> [#uses=3] store <4 x float> %X, <4 x float>* %X.addr %tmp = load <4 x float>* %X.addr ; <<4 x float>> [#uses=1] %tmp1 = load <4 x float>* %X.addr ; <<4 x float>> [#uses=1] %add = fadd <4 x float> %tmp, %tmp1 ; <<4 x float>> [#uses=1] ret <4 x float> %add } This implements rdar://8248065 llvm-svn: 109733
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