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* [CUDA] 32-bit NVPTX should have 32-bit long type.Artem Belevich2015-09-281-0/+1
| | | | | | | | | Currently it's 64-bit which will lead to mismatch between host and device code if we compile for i386. Differential Revision: http://reviews.llvm.org/D13181 llvm-svn: 248753
* [OPENMP 4.1] Add 'simd' clause for 'ordered' directive.Alexey Bataev2015-09-281-0/+2
| | | | | | | | | | | Parsing and sema analysis for 'simd' clause in 'ordered' directive. Description If the simd clause is specified, the ordered regions encountered by any thread will use only a single SIMD lane to execute the ordered regions in the order of the loop iterations. Restrictions An ordered construct with the simd clause is the only OpenMP construct that can appear in the simd region llvm-svn: 248696
* [OPENMP 4.1] Add 'threads' clause for '#pragma omp ordered'.Alexey Bataev2015-09-251-1/+12
| | | | | | | | OpenMP 4.1 extends format of '#pragma omp ordered'. It adds 3 additional clauses: 'threads', 'simd' and 'depend'. If no clause is specified, the ordered construct behaves as if the threads clause had been specified. If the threads clause is specified, the threads in the team executing the loop region execute ordered regions sequentially in the order of the loop iterations. The loop region to which an ordered region without any clause or with a threads clause binds must have an ordered clause without the parameter specified on the corresponding loop directive. llvm-svn: 248569
* Move the darwin define static function to be close to the OS define.Eric Christopher2015-09-241-24/+23
| | | | llvm-svn: 248539
* Use just one larger anonymous namespace instead of a lot of smaller ones.Eric Christopher2015-09-241-15/+0
| | | | llvm-svn: 248538
* Recommit r248154: [ARM] Handle DSP feature as an ArchExtKindArtyom Skrobov2015-09-241-10/+8
| | | | | | | | | | | | | | | | Currently, the availability of DSP instructions (ACLE 6.4.7) is handled in a hand-rolled tricky condition block in lib/Basic/Targets.cpp, with a FIXME: attached. http://reviews.llvm.org/D12937 moved the handling of the DSP feature over to ARMTargetParser.def in LLVM, to be in line with other architecture extensions. This is the corresponding patch to clang, to clear the FIXME: and update the tests. Differential Revision: http://reviews.llvm.org/D12938 llvm-svn: 248521
* Improve the printing of ranges when macros are involved.Richard Trieu2015-09-241-2/+7
| | | | | | | | | | | | Trace the ranges through the macro backtrace better. This allows better range highlighting through all levels of the macro bracktrace. Also some improvements to backtrace printer for omitting different backtraces. Patch by Zhengkai Wu. Differential Revision: http://reviews.llvm.org/D12379 llvm-svn: 248454
* [CUDA] Allow parsing of host and device code simultaneously.Artem Belevich2015-09-221-3/+16
| | | | | | | | | | | | * adds -aux-triple option to specify target triple * propagates aux target info to AST context and Preprocessor * pulls in target specific preprocessor macros. * pulls in target-specific builtins from aux target. * sets appropriate host or device attribute on builtins. Differential Revision: http://reviews.llvm.org/D12917 llvm-svn: 248299
* Revert "[ARM] Handle +t2dsp feature as an ArchExtKind in ARMTargetParser.def"James Molloy2015-09-211-5/+5
| | | | | | | | This was committed without the code review (http://reviews.llvm.org/D12938) being approved. This reverts commit r248154. llvm-svn: 248173
* [ARM] Handle +t2dsp feature as an ArchExtKind in ARMTargetParser.defArtyom Skrobov2015-09-211-5/+5
| | | | | | | | | | | | | | | | Currently, the availability of DSP instructions (ACLE 6.4.7) is handled in a hand-rolled tricky condition block in lib/Basic/Targets.cpp, with a FIXME: attached. http://reviews.llvm.org/D12937 moved the handling of +t2dsp over to ARMTargetParser.def in LLVM, to be in line with other architecture extensions. This is the corresponding patch to clang, to clear the FIXME: and update the tests. Differential Revision: http://reviews.llvm.org/D12938 llvm-svn: 248154
* Reduce indentation in the TargetInfo implementations and fix upEric Christopher2015-09-181-369/+362
| | | | | | a couple of macro builtin redefines. llvm-svn: 248046
* [OPENMP 4.0] Add 'if' clause for 'cancel' directive.Alexey Bataev2015-09-181-1/+10
| | | | | | Add parsing, sema analysis and codegen for 'if' clause in 'cancel' directive. llvm-svn: 247976
* Support __builtin_ms_va_list.Charles Davis2015-09-172-0/+4
| | | | | | | | | | | | | | | | | | Summary: This change adds support for `__builtin_ms_va_list`, a GCC extension for variadic `ms_abi` functions. The existing `__builtin_va_list` support is inadequate for this because `va_list` is defined differently in the Win64 ABI vs. the System V/AMD64 ABI. Depends on D1622. Reviewers: rsmith, rnk, rjmccall CC: cfe-commits Differential Revision: http://reviews.llvm.org/D1623 llvm-svn: 247941
* Doxygen fix InitializeBuiltins -> initializeBuiltinsIsmail Donmez2015-09-151-1/+1
| | | | llvm-svn: 247668
* [WebAssembly] Define the atomic type sizesDan Gohman2015-09-141-4/+3
| | | | | | | | | | | | | WebAssembly's spec has now been updated to specify some guarantees about lock free atomic accesses. Update clang to match. This also updates sig_atomic_t to be 64-bit on wasm64. WebAssembly does not presently have asynchronous interrupts, but this change is within the spirit of how they will work if they are added. Differential Revision: http://reviews.llvm.org/D12862 llvm-svn: 247624
* [WebAssembly] Use "long long" for int_fast64_t and int_least64_t on wasm64Dan Gohman2015-09-141-0/+13
| | | | | | | | | This makes int_fast64_t and int_least64_t the same type as int64_t, and eliminates a difference between wasm32 and wasm64. Differential Revision: http://reviews.llvm.org/D12861 llvm-svn: 247622
* Test commitRachel Craik2015-09-141-2/+2
| | | | | | Remove some trailing whitespace llvm-svn: 247560
* Re-commit r247218: "Fix Clang-tidy misc-use-override warnings, other minor ↵Hans Wennborg2015-09-101-13/+14
| | | | | | | | fixes" This never broke the build; it was the LLVM side, r247216, that caused problems. llvm-svn: 247302
* Revert r247218: "Fix Clang-tidy misc-use-override warnings, other minor fixes"Hans Wennborg2015-09-101-14/+13
| | | | | | | | | | | Seems it broke the Polly build. From http://lab.llvm.org:8011/builders/perf-x86_64-penryn-O3-polly-fast/builds/11687/steps/compile/logs/stdio: In file included from /home/grosser/buildslave/perf-x86_64-penryn-O3-polly-fast/llvm.src/lib/TableGen/Record.cpp:14:0: /home/grosser/buildslave/perf-x86_64-penryn-O3-polly-fast/llvm.src/include/llvm/TableGen/Record.h:369:3: error: looser throw specifier for 'virtual llvm::TypedInit::~TypedInit()' /home/grosser/buildslave/perf-x86_64-penryn-O3-polly-fast/llvm.src/include/llvm/TableGen/Record.h:270:11: error: overriding 'virtual llvm::Init::~Init() noexcept (true)' llvm-svn: 247222
* Fix Clang-tidy misc-use-override warnings, other minor fixesHans Wennborg2015-09-101-13/+14
| | | | | | | | Patch by Eugene Zelenko! Differential Revision: http://reviews.llvm.org/D12741 llvm-svn: 247218
* Refactoring of how ARMTargetInfo handles default target features.Alexandros Lamprineas2015-09-061-31/+14
| | | | | | Differential Revision: http://reviews.llvm.org/D11299 llvm-svn: 246946
* [X86-64] Allow additional register names in inline assembler.Alexey Bataev2015-09-041-0/+8
| | | | | | | Patch allows to recognize additional registers x8d, x8b, x8w - x15d, x15b, x15w in inline assembler, already recognized by backend Differential Revision: http://reviews.llvm.org/D12594 llvm-svn: 246835
* [WebAssembly] Initial WebAssembly support in clangDan Gohman2015-09-031-0/+176
| | | | | | | | | | This implements basic support for compiling (though not yet assembling or linking) for a WebAssembly target. Note that ABI details are not yet finalized, and may change. Differential Revision: http://reviews.llvm.org/D12002 llvm-svn: 246814
* Implement ACLE 2.0 macros of chapters 6.4 and 6.5 for [ARM] and [Aarch64] ↵Alexandros Lamprineas2015-09-031-29/+122
| | | | | | | | | targets. Differential Revision: http://reviews.llvm.org/D12244 Change-Id: Iffd4e822c15e18668fe8868278230ff232ef50aa llvm-svn: 246768
* [ARM] Allow passing/returning of __fp16 argumentsOliver Stannard2015-09-031-0/+4
| | | | | | | | | | | | | | | | | | | | | The ACLE (ARM C Language Extensions) 2.0 allows the __fp16 type to be used as a functon argument or return type (ACLE 1.1 did not). The current public release of the AAPCS (2.09) states that __fp16 values should be converted to single-precision before being passed or returned, but AAPCS 2.10 (to be released shortly) changes this, so that they are passed in the least-significant 16 bits of either a GPR (for base AAPCS) or a single-precision register (for AAPCS-VFP). This does not change how arguments are passed if they get passed on the stack. This patch brings clang up to compliance with the latest versions of both of these specs. We can now set the __ARM_FP16_ARGS ACLE predefine, and we have always been able to set the __ARM_FP16_FORMAT_IEEE predefine (we do not support the alternative format). llvm-svn: 246764
* Revert 246755 as it breaks buildbotsOliver Stannard2015-09-031-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | Original commit message: [ARM] Allow passing/returning of __fp16 arguments The ACLE (ARM C Language Extensions) 2.0 allows the __fp16 type to be used as a functon argument or return type (ACLE 1.1 did not). The current public release of the AAPCS (2.09) states that __fp16 values should be converted to single-precision before being passed or returned, but AAPCS 2.10 (to be released shortly) changes this, so that they are passed in the least-significant 16 bits of either a GPR (for base AAPCS) or a single-precision register (for AAPCS-VFP). This does not change how arguments are passed if they get passed on the stack. This patch brings clang up to compliance with the latest versions of both of these specs. We can now set the __ARM_FP16_ARGS ACLE predefine, and we have always been able to set the __ARM_FP16_FORMAT_IEEE predefine (we do not support the alternative format). llvm-svn: 246760
* [ARM] Allow passing/returning of __fp16 argumentsOliver Stannard2015-09-031-0/+4
| | | | | | | | | | | | | | | | | | | | | The ACLE (ARM C Language Extensions) 2.0 allows the __fp16 type to be used as a functon argument or return type (ACLE 1.1 did not). The current public release of the AAPCS (2.09) states that __fp16 values should be converted to single-precision before being passed or returned, but AAPCS 2.10 (to be released shortly) changes this, so that they are passed in the least-significant 16 bits of either a GPR (for base AAPCS) or a single-precision register (for AAPCS-VFP). This does not change how arguments are passed if they get passed on the stack. This patch brings clang up to compliance with the latest versions of both of these specs. We can now set the __ARM_FP16_ARGS ACLE predefine, and we have always been able to set the __ARM_FP16_FORMAT_IEEE predefine (we do not support the alternative format). llvm-svn: 246755
* Pull initFeatureMap out of line now that it's used in multiple places.Eric Christopher2015-09-011-0/+12
| | | | llvm-svn: 246565
* Revert "Pull the target attribute parsing out of CGCall and onto TargetInfo."Eric Christopher2015-08-311-47/+0
| | | | | | This reverts commit r246468 while we figure out what to do about Basic and AST. llvm-svn: 246508
* Pull the target attribute parsing out of CGCall and onto TargetInfo.Eric Christopher2015-08-311-0/+47
| | | | | | | | | Also: - Add a typedef to make working with the result easier. - Update callers to use the new function. - Make initFeatureMap out of line. llvm-svn: 246468
* Pull out the ppc incompatible features check into a separate function.Eric Christopher2015-08-311-27/+36
| | | | llvm-svn: 246467
* Update for several APIs in LLVM that now use StringRefs rather thanChandler Carruth2015-08-301-5/+2
| | | | | | | | const char pointers. In turn, push this through Clang APIs as well, simplifying a number of bits of code that was handling the oddities of nullptrs. llvm-svn: 246375
* Update for API change in LLVM: ARMTargetParser class is just the ARMChandler Carruth2015-08-301-9/+9
| | | | | | namespace. llvm-svn: 246368
* Fold TargetInfo::handleUserFeatures into TargetInfo::initFeatureMap.Eric Christopher2015-08-281-44/+38
| | | | llvm-svn: 246346
* Instead of duplicating code, call the base implementation.Eric Christopher2015-08-281-7/+1
| | | | llvm-svn: 246260
* Merge the two feature map setting functions into a single functionEric Christopher2015-08-281-29/+34
| | | | | | and replace all callers. llvm-svn: 246259
* [X86] Bump Darwin MaxVectorAlign to 64 when AVX512 is enabled.Ahmed Bougacha2015-08-271-4/+6
| | | | | | | | | | | Without this, 64-byte vector types (__m512), specified to be 64-byte aligned in the AVX512 draft SysV ABI, will only be 32-byte aligned. This is analoguous to AVX, for which we accept 32-byte max alignment. Differential Revision: http://reviews.llvm.org/D10724 llvm-svn: 246230
* [X86] Conditionalize Darwin MaxVectorAlign on the presence of AVX.Ahmed Bougacha2015-08-271-2/+19
| | | | | | | | | There's no point in using a larger alignment if we have no instructions that would benefit from it. Differential Revision: http://reviews.llvm.org/D12389 llvm-svn: 246229
* [X86] Use AVX features instead of ABI to init. SimdDefaultAlign.Ahmed Bougacha2015-08-271-1/+1
| | | | | | | | | | | | | | | The ABI string only exists to communicate with TargetCodeGenInfo. Concretely, since we only used "avx*" ABI strings on x86_64 (as AVX doesn't affect the i386 ABIs), this meant that, when initializing SimdDefaultAlign, we would ignore AVX/AVX512 on i386, for no good reason. Instead, directly check the features. A similar change for MaxVectorAlign will follow. Differential Revision: http://reviews.llvm.org/D12390 llvm-svn: 246228
* Remove a dead assert, we'd have gotten the case above.Eric Christopher2015-08-271-1/+0
| | | | llvm-svn: 246202
* const-ify TargetInfo::handleUserFeatures.Eric Christopher2015-08-271-2/+2
| | | | llvm-svn: 246180
* Pass in a cpu to initDefaultFeatures so that we can share this codeEric Christopher2015-08-271-9/+16
| | | | | | | | | with multiple uses of feature map construction. Note: We could make this a static function on TargetInfo if we fix the x86 port needing to check the triple in an isolated case. llvm-svn: 246128
* const-ify X86TargetInfo::getCPUKind.Eric Christopher2015-08-271-1/+1
| | | | llvm-svn: 246127
* Pull out cpu string -> enum parsing for x86 as a separate function,Eric Christopher2015-08-261-66/+70
| | | | | | this is going to see use shortly in unifying feature set construction. llvm-svn: 246122
* Convert a bunch of loops to ranged-for and clean up accordingly.Eric Christopher2015-08-261-170/+69
| | | | llvm-svn: 246027
* Remove dead code associated with parsing and setting ABI based onEric Christopher2015-08-261-15/+0
| | | | | | string name. llvm-svn: 246021
* Remove a TODO that isn't going to get fixed in this way.Eric Christopher2015-08-261-3/+0
| | | | llvm-svn: 246020
* Update file comment to more accurately describe what's implemented.Eric Christopher2015-08-261-1/+1
| | | | llvm-svn: 246006
* Rewrite the PPC target feature handling to more resemble other targets.Eric Christopher2015-08-251-32/+42
| | | | | | | | | This involved specializing handleUserFeatures so that we could perform diagnostics on -only- user supplied features and migrating the rest of the initialization functions to set features based on enabling and disabling full feature sets. No functional change intended. llvm-svn: 245936
* Extract handling of user defined features into a function so we canEric Christopher2015-08-251-6/+2
| | | | | | specialize it on the targets. llvm-svn: 245935
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