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| author | Artem Belevich <tra@google.com> | 2015-09-28 22:54:08 +0000 |
|---|---|---|
| committer | Artem Belevich <tra@google.com> | 2015-09-28 22:54:08 +0000 |
| commit | 236cfdc4be85e3d62f356ee4f0a072e927a6561f (patch) | |
| tree | 0f8daeedcc9743ae97bf39d10628f1bd84f8b0c8 /clang/lib/Basic | |
| parent | 88d8534e87fdd84e3589a34dfaac8973f1c2f934 (diff) | |
| download | bcm5719-llvm-236cfdc4be85e3d62f356ee4f0a072e927a6561f.tar.gz bcm5719-llvm-236cfdc4be85e3d62f356ee4f0a072e927a6561f.zip | |
[CUDA] 32-bit NVPTX should have 32-bit long type.
Currently it's 64-bit which will lead to mismatch between host and
device code if we compile for i386.
Differential Revision: http://reviews.llvm.org/D13181
llvm-svn: 248753
Diffstat (limited to 'clang/lib/Basic')
| -rw-r--r-- | clang/lib/Basic/Targets.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/clang/lib/Basic/Targets.cpp b/clang/lib/Basic/Targets.cpp index da91694768b..a544573567d 100644 --- a/clang/lib/Basic/Targets.cpp +++ b/clang/lib/Basic/Targets.cpp @@ -1716,6 +1716,7 @@ void NVPTXTargetInfo::getGCCRegNames(const char *const *&Names, class NVPTX32TargetInfo : public NVPTXTargetInfo { public: NVPTX32TargetInfo(const llvm::Triple &Triple) : NVPTXTargetInfo(Triple) { + LongWidth = LongAlign = 32; PointerWidth = PointerAlign = 32; SizeType = TargetInfo::UnsignedInt; PtrDiffType = TargetInfo::SignedInt; |
