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* [CUDA] Allow sm_50,52,53 GPUsArtem Belevich2016-05-191-0/+15
| | | | | | | | LLVM accepts them since r233575. Differential Revision: http://reviews.llvm.org/D20405 llvm-svn: 270084
* [Hexagon] Recognize "q" and "v" in inline-asm as register constraintsKrzysztof Parzyszek2016-05-181-1/+10
| | | | | | Clang follow-up to r269933. llvm-svn: 269934
* Add new intrinsic support for MONITORX and MWAITX instructionsAshutosh Nema2016-05-181-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: MONITORX/MWAITX instructions provide similar capability to the MONITOR/MWAIT pair while adding a timer function, such that another termination of the MWAITX instruction occurs when the timer expires. The presence of the MONITORX and MWAITX instructions is indicated by CPUID 8000_0001, ECX, bit 29. The MONITORX and MWAITX instructions are intercepted by the same bits that intercept MONITOR and MWAIT. MONITORX instruction establishes a range to be monitored. MWAITX instruction causes the processor to stop instruction execution and enter an implementation-dependent optimized state until occurrence of a class of events. Opcode of MONITORX instruction is "0F 01 FA". Opcode of MWAITX instruction is "0F 01 FB". These opcode information is used in adding tests for the disassembler. These instructions are enabled for AMD's bdver4 architecture. Patch by Ganesh Gopalasubramanian! Reviewers: echristo, craig.topper Subscribers: RKSimon, joker.eph, llvm-commits, cfe-commits Differential Revision: http://reviews.llvm.org/D19796 llvm-svn: 269907
* [PS4] Change the names of some "environmental" things to what ourPaul Robinson2016-05-161-1/+1
| | | | | | | | licensees actually see in the toolchain we deliver to them. This will reduce the set of local patches we have to maintain. The triple is not changing. (The term ORBIS is an internal code name for PS4.) llvm-svn: 269671
* [OpenCL] Add supported OpenCL extensions to target info.Yaxun Liu2016-05-161-11/+37
| | | | | | | | | | Add supported OpenCL extensions to target info. It serves as default values to save the users of the burden setting each supported extensions and optional core features in command line. Re-commit after fixing build error due to missing override attribute. Differential Revision: http://reviews.llvm.org/D19484 llvm-svn: 269670
* ARM-MachO: stop claiming to be EABITim Northover2016-05-131-1/+1
| | | | | | | | | | Embedded ARM MachO targets are AAPCS but not full EABI (we don't use __aeabi_whatever and the functions are allowed to be hard-float). Turns out there was already a test for this, but its original purpose had become corrupted over the years. llvm-svn: 269487
* Revert "[OpenCL] Add supported OpenCL extensions to target info."Yaxun Liu2016-05-131-37/+11
| | | | | | | | | Revert r269431 due to build failure caused by warning msg: llvm/tools/clang/lib/Basic/Targets.cpp:2090:9: error: 'setSupportedOpenCLOpts' overrides a member function but is not marked 'override' [-Werror,-Winconsistent-missing-override] void setSupportedOpenCLOpts() { llvm-svn: 269435
* [OpenCL] Add supported OpenCL extensions to target info.Yaxun Liu2016-05-131-11/+37
| | | | | | | | Add supported OpenCL extensions to target info. It serves as default values to save the users of the burden setting each supported extensions and optional core features in command line. Differential Revision: http://reviews.llvm.org/D19484 llvm-svn: 269431
* Update clang support on recent HaikuReid Kleckner2016-05-111-9/+28
| | | | | | | | | | | | | | | | | | [ Copied from https://llvm.org/bugs/show_bug.cgi?id=26404 ] clang support on Haiku is lagging a bit, and missing on x86_64. This patch updates support for x86 and add support for x86_64. It should apply directly to trunk and it's harmless in the sense that it only affects Haiku. Reviewers: rnk, rsmith Patch by Jérôme Duval Differential Revision: http://reviews.llvm.org/D16797 llvm-svn: 269201
* [Power9] Enable -mcpu=pwr9 (-mcpu=power9) in the front endNemanja Ivanovic2016-05-091-2/+22
| | | | | | | | | This patch corresponds to review: http://reviews.llvm.org/D19684 It simply adds the handling for the option and the corresponding macros. llvm-svn: 268951
* Enable support for __float128 in Clang and enable it on pertinent platformsNemanja Ivanovic2016-05-091-4/+23
| | | | | | | | | | | | | | | | | | This patch corresponds to reviews: http://reviews.llvm.org/D15120 http://reviews.llvm.org/D19125 It adds support for the __float128 keyword, literals and target feature to enable it. Based on the latter of the two aforementioned reviews, this feature is enabled on Linux on i386/X86 as well as SystemZ. This is also the second attempt in commiting this feature. The first attempt did not enable it on required platforms which caused failures when compiling type_traits with -std=gnu++11. If you see failures with compiling this header on your platform after this commit, it is likely that your platform needs to have this feature enabled. llvm-svn: 268898
* [Sparc] Implement __builtin_setjmp, __builtin_longjmp back-end.Chris Dewhurst2016-05-041-0/+4
| | | | | | | | | | | | | | This code implements builtin_setjmp and builtin_longjmp exception handling intrinsics for 32-bit Sparc back-ends. The code started as a mash-up of the PowerPC and X86 versions, although there are sufficient differences to both that had to be made for Sparc handling. Note: I have manual tests running. I'll work on a unit test and add that to the rest of this diff in the next day. Also, this implementation is only for 32-bit Sparc. I haven't focussed on a 64-bit version, although I have left the code in a prepared state for implementing this, including detecting pointer size and comments indicating where I suspect there may be differences. Differential Revision: http://reviews.llvm.org/D19798 llvm-svn: 268483
* [CUDA] Copy host builtin types to NVPTXTargetInfo.Justin Lebar2016-04-291-1/+63
| | | | | | | | | | | | | | | | | Summary: Host and device types must match, otherwise when we pass values back and forth between the host and device, we will get the wrong result. This patch makes NVPTXTargetInfo inherit most of its type information from the host's target info. Reviewers: rsmith Subscribers: cfe-commits, jhen, tra Differential Revision: http://reviews.llvm.org/D19346 llvm-svn: 268131
* [Clang][Darwin] Define __ARM_DWARF_EH__ for WatchABIChris Bieneman2016-04-291-0/+4
| | | | | | | | | | | | Summary: The Darwin armv7k ABI uses Dwarf EH, so we need to set the OS define correctly. Without this the gcc_personality fails to build. Reviewers: t.p.northover Subscribers: aemerson, cfe-commits, rengolin Differential Revision: http://reviews.llvm.org/D19693 llvm-svn: 268078
* ARMv7k: define __ARM_PCS_VFP since we're hard-float.Tim Northover2016-04-281-3/+4
| | | | | | | | It's a little debateable because we're not truly AAPCS, so I'm certainly not going to define __ARM_PCS, but __ARM_PCS_VFP seems to be really an "hard-float" define, which is a useful thing to have. llvm-svn: 267880
* [SystemZ] Support Swift calling conventionBryan Chan2016-04-281-0/+10
| | | | | | | | | | | | | | | Summary: Port rL265324 to SystemZ to allow using the 'swiftcall' attribute on that architecture. Depends on D19414. Reviewers: kbarton, rjmccall, uweigand Subscribers: cfe-commits Differential Revision: http://reviews.llvm.org/D19432 llvm-svn: 267879
* PR27216: Only define __ARM_FEATURE_FMA when the target has VFPv4Silviu Baranga2016-04-281-1/+1
| | | | | | | | | | | | | | | | | | | | | Summary: According to the ACLE spec, "__ARM_FEATURE_FMA is defined to 1 if the hardware floating-point architecture supports fused floating-point multiply-accumulate". This changes clang's behaviour from emitting this macro for v7-A and v7-R cores to only emitting it when the target has VFPv4 (and therefore support for the floating point multiply-accumulate instruction). Fixes PR27216 Reviewers: t.p.northover, rengolin Subscribers: aemerson, rengolin, cfe-commits Differential Revision: http://reviews.llvm.org/D18963 llvm-svn: 267869
* [Hexagon] Define architecture version macros for hexagonv55Krzysztof Parzyszek2016-04-211-0/+5
| | | | llvm-svn: 266989
* [Hexagon] Define macros __HVX__ and __HVXDBL__ when appropriateKrzysztof Parzyszek2016-04-181-0/+6
| | | | llvm-svn: 266647
* [ARM] predefines __ELF__ macro for arm-none-eabiWeiming Zhao2016-04-181-0/+4
| | | | | | | | | | | | Summary: predefines __ELF__ macro for arm-none-eabi Reviewers: silviu.baranga, rengolin Subscribers: aemerson, rengolin, cfe-commits Differential Revision: http://reviews.llvm.org/D19225 llvm-svn: 266625
* Revert 266186 as it breaks anything that includes type_traits on some platformsNemanja Ivanovic2016-04-151-21/+5
| | | | | | | | | | Since this patch provided support for the __float128 type but disabled it on all platforms by default, some platforms can't compile type_traits with -std=gnu++11 since there is a specialization with __float128. This reverts the patch until D19125 is approved (i.e. we know which platforms need this support enabled). llvm-svn: 266460
* Enable support for __float128 in ClangNemanja Ivanovic2016-04-131-5/+21
| | | | | | | | | | | | | | | | This patch corresponds to review: http://reviews.llvm.org/D15120 It adds support for the __float128 keyword, literals and a target feature to enable it. This support is disabled by default on all targets and any target that has support for this type is free to add it. Based on feedback that I've received from target maintainers, this appears to be the right thing for most targets. I have not heard from the maintainers of X86 which I believe supports this type. I will subsequently investigate the impact of enabling this on X86. llvm-svn: 266186
* Basic: fix profiling with GNU EABISaleem Abdulrasool2016-04-121-0/+4
| | | | | | | | | The GNU profiling support indicates that the interface is `_mcount` rather than `mcount`. Conditionalise the behaviour according to the `-meabi gnu` flag. Resolves PR27311 llvm-svn: 266039
* Correct pg instrumentation for AArch64Saleem Abdulrasool2016-04-101-5/+0
| | | | | | | | | It seems that there was a miscommunication between Renato and I, and the original behaviour of AArch64 was to be preserved and not to mirror the new behaviour. Restore the original behaviour for AArch64. Addresses post-commit review comments from Renato Golin. llvm-svn: 265899
* Add support for __gnu_mcount_nc as the pg interfaceSaleem Abdulrasool2016-04-101-2/+11
| | | | | | | | | | | This adds support to optionally support using `__gnu_mcount_nc` as the mcount interface rather than `mcount` for Linux and EABI. The other targets do not provide an implementation for `__gnu_mcount_nc`. This can be activated via the `-meabi gnu` flag. Resolves PR23969. llvm-svn: 265888
* Basic: thread TargetOptions into TargetInfoSaleem Abdulrasool2016-04-091-292/+335
| | | | | | | | This threads TargetOptions into the TargetInfo hierarchy. This is a rework of the original attempt to thread additional information into the TargetInfo to make decisions based on additional ABI related options. llvm-svn: 265878
* revert SVN r265702, r265640Saleem Abdulrasool2016-04-081-358/+293
| | | | | | | | | | | Revert the two changes to thread CodeGenOptions into the TargetInfo allocation and to fix the layering violation by moving CodeGenOptions into Basic. Code Generation is arguably not particularly "basic". This addresses Richard's post-commit review comments. This change purely does the mechanical revert and will be followed up with an alternate approach to thread the desired information into TargetInfo. llvm-svn: 265806
* Basic: move CodeGenOptions from FrontendSaleem Abdulrasool2016-04-071-2/+2
| | | | | | | | This is a mechanical move of CodeGenOptions from libFrontend to libBasic. This fixes the layering violation introduced earlier by threading CodeGenOptions into TargetInfo. It should also fix the modules based self-hosting builds. NFC. llvm-svn: 265702
* Basic: thread CodeGenOptions into TargetInfoSaleem Abdulrasool2016-04-071-292/+357
| | | | | | | | | This threads CodeGenOptions into the TargetInfo hierarchy. This is motivated by ARM which can change some target information based on the EABI selected (-meabi). Similar options exist for other platforms (e.g. MIPS) and thus is generally useful. NFC. llvm-svn: 265640
* [X86] Introduction of -march=lakemont.Andrey Turetskiy2016-04-051-3/+16
| | | | | | Differential Revision: http://reviews.llvm.org/D18651 llvm-svn: 265405
* [CodeGenCXX] Fix ItaniumCXXABI::getAlignmentOfExnObject to return 8-byteAkira Hatanaka2016-03-311-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | alignment on Darwin. Itanium C++ ABI specifies that _Unwind_Exception should be double-word aligned (16B). To conform to the ABI, libraries implementing exception handling declare the struct with __attribute__((aligned)), which aligns the unwindHeader field (and the end of __cxa_exception) to the default target alignment (which is typically 16-bytes). struct __cxa_exception { ... // struct is declared with __attribute__((aligned)). _Unwind_Exception unwindHeader; }; Based on the assumption that _Unwind_Exception is declared with __attribute__((aligned)), ItaniumCXXABI::getAlignmentOfExnObject returns the target default alignment for __attribute__((aligned)). It turns out that libc++abi, which is used on Darwin, doesn't declare the struct with the attribute and therefore doesn't guarantee that unwindHeader is aligned to the alignment specified by the ABI, which in some cases causes the program to crash because of unaligned memory accesses. This commit avoids crashes due to unaligned memory accesses by having getAlignmentOfExnObject return an 8-byte alignment on Darwin. I've only fixed the problem for Darwin, but we should also figure out whether other platforms using libc++abi need similar fixes. rdar://problem/25314277 Differential revision: http://reviews.llvm.org/D18479 llvm-svn: 264998
* AMDGPU: Remove separate r600 double data layoutMatt Arsenault2016-03-301-5/+1
| | | | | | This is identical to the other r600 datalayout string. llvm-svn: 264931
* [SystemZ] Specify required features for builtins.Jonas Paulsson2016-03-301-0/+2
| | | | | | | | | | | | | BuiltinsSystemZ.def is extended to include the required processor features per intrinsic. New test test/CodeGen/builtins-systemz-error2.c that checks for expected errors when instrinsics are used with a subtarget that does not support the required feature (e.g. vector support). Reviewed by Ulrich Weigand. llvm-svn: 264873
* Add additional Hi/Lo registers to Clang MipsTargetInfoBaseHrvoje Varga2016-03-291-1/+2
| | | | | | Differential Revision: http://reviews.llvm.org/D17378 llvm-svn: 264727
* [lanai] Add Lanai backend to clang driver.Jacques Pienaar2016-03-281-0/+108
| | | | | | | | | | Changes to clang to add Lanai backend. Adds a new target, ABI and toolchain. General Lanai backend discussion on llvm-dev thread "[RFC] Lanai backend" (http://lists.llvm.org/pipermail/llvm-dev/2016-February/095118.html). Differential Revision: http://reviews.llvm.org/D17002 llvm-svn: 264655
* Fix a missing comma between two string literals.Etienne Bergeron2016-03-241-1/+1
| | | | | | | | | | | | | | | | | Summary: The two literals are currently appended. I'm not sure what was broken by this. Please double check carefully. Silly bug found by an on-going checker for clang-tidy. Reviewers: alexfh, arsenm, rnk Subscribers: cfe-commits Differential Revision: http://reviews.llvm.org/D18454 llvm-svn: 264315
* [X86] Add "x87" in x86 target feature map.Andrey Turetskiy2016-03-231-0/+3
| | | | | | Differential Revision: http://reviews.llvm.org/D13980 llvm-svn: 264149
* Add attributes for preserve_mostcc/preserve_allcc calling conventions to the ↵Roman Levenstein2016-03-161-0/+4
| | | | | | | | | | | | | | | C/C++ front-end Till now, preserve_mostcc/preserve_allcc calling convention attributes were only available at the LLVM IR level. This patch adds attributes for preserve_mostcc/preserve_allcc calling conventions to the C/C++ front-end. The code was mostly written by Juergen Ributzka. I just added support for the AArch64 target and tests. Differential Revision: http://reviews.llvm.org/D18025 llvm-svn: 263647
* Myriad: define __myriad2 macro automaticallyDouglas Katzman2016-03-151-1/+22
| | | | llvm-svn: 263596
* Implement __builtin_eh_return_data_regno for SPARC and SPARC64.Joerg Sonnenberger2016-03-071-0/+6
| | | | llvm-svn: 262838
* [X86] AMD Bobcat CPU (btver1) doesn't support XSAVE Simon Pilgrim2016-03-051-1/+0
| | | | | | | | btver1 is a SSSE3/SSE4a only CPU - it doesn't have AVX and doesn't support XSAVE. Differential Revision: http://reviews.llvm.org/D17682 llvm-svn: 262772
* Make TargetInfo store an actual DataLayout instead of a string.James Y Knight2016-03-041-127/+95
| | | | | | | | | | | | | | Use it to calculate UserLabelPrefix, instead of specifying it (often incorrectly). Note that the *actual* user label prefix has always come from the DataLayout, and is handled within LLVM. The main thing clang's TargetInfo::UserLabelPrefix did was to set the #define value. Having these be different from each-other is just silly. Differential Revision: http://reviews.llvm.org/D17183 llvm-svn: 262737
* [MIPS] initFeatureMap() to handle empty string argumentBhushan D. Attarde2016-03-041-0/+2
| | | | | | | | | | | SUMMARY: This patch sets CPU string to its default value when it is not supplied by caller. Reviewers: vkalintiris, dsanders Subscribers: mohit.bhakkad, sagar, jaydeep, cfe-commits Differential Revision: http://reviews.llvm.org/D16139 llvm-svn: 262691
* [ARM] Add Clang targeting for ARMv8-M Baseline/MainlineBradley Smith2016-03-031-7/+13
| | | | llvm-svn: 262619
* Semantic analysis for the swiftcall calling convention.John McCall2016-03-031-13/+42
| | | | | | | I've tried to keep the infrastructure behind parameter ABI treatments fairly general. llvm-svn: 262587
* AMDGPU: Add missing Volcanic Islands targetsTom Stellard2016-02-291-0/+2
| | | | | | | | | | Reviewers: arsenm Subscribers: cfe-commits Differential Revision: http://reviews.llvm.org/D17645 llvm-svn: 262228
* [X86] Disabling avx512f should also disable avx512vbmi and avx512ifma. ↵Craig Topper2016-02-291-3/+9
| | | | | | Enabling avx512vbmi or avx512ifma should enable avx512f. Add command line switches and header defines for avx512ifma and avx512vbmi. llvm-svn: 262201
* [X86] Enabling xsave should not enable AVX. I seem to have done this, but I ↵Craig Topper2016-02-291-6/+2
| | | | | | don't know why. llvm-svn: 262200
* AMDGPU: Fix broken/confusing predefined macroMatt Arsenault2016-02-271-1/+5
| | | | | | amdgcn should not be defining __R600__ llvm-svn: 262124
* AMDGPU: Fix inconsistent register name for flat_scratchMatt Arsenault2016-02-271-2/+2
| | | | llvm-svn: 262123
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