[Hexagon] Recognize "q" and "v" in inline-asm as register constraints

Clang follow-up to r269933.

llvm-svn: 269934

1 files changed, 10 insertions, 1 deletions

diff --git a/clang/lib/Basic/Targets.cpp b/clang/lib/Basic/Targets.cpp
index 91e00c03ba7..b63eac907eb 100644
--- a/clang/lib/Basic/Targets.cpp
+++ b/clang/lib/Basic/Targets.cpp
@@ -6016,7 +6016,16 @@ public:
 
   bool validateAsmConstraint(const char *&Name,
                              TargetInfo::ConstraintInfo &Info) const override {
-    return true;
+    switch (*Name) {
+      case 'v':
+      case 'q':
+        if (HasHVX) {
+          Info.setAllowsRegister();
+          return true;
+        }
+        break;
+    }
+    return false;
   }
 
   void getTargetDefines(const LangOptions &Opts,