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* [X86] Add Indirect Thunk Support to X86 to mitigate Load Value Injection (LVI)Scott Constable2020-06-241-0/+4
| | | | | | | | | | | | | | | | | This pass replaces each indirect call/jump with a direct call to a thunk that looks like: lfence jmpq *%r11 This ensures that if the value in register %r11 was loaded from memory, then the value in %r11 is (architecturally) correct prior to the jump. Also adds a new target feature to X86: +lvi-cfi ("cfi" meaning control-flow integrity) The feature can be added via clang CLI using -mlvi-cfi. This is an alternate implementation to https://reviews.llvm.org/D75934 That merges the thunk insertion functionality with the existing X86 retpoline code. Differential Revision: https://reviews.llvm.org/D76812
* Generate docsHans Wennborg2020-01-301-110/+490
| | | | | | | | | | | | | | bin/clang-tblgen -gen-diag-docs -I../clang/include \ -I../clang/include/clang/Basic/ \ ../clang/include/clang/Basic/Diagnostic.td -o \ ../clang/docs/DiagnosticsReference.rst && \ bin/clang-tblgen -gen-attr-docs -I../clang/include \ ../clang/include/clang/Basic/Attr.td -o \ ../clang/docs/AttributeReference.rst && \ bin/clang-tblgen -gen-opt-docs -I../clang/include \ -I../clang/include/clang/Driver -I../llvm/include \ ../clang/include/clang/Driver/ClangOptionDocs.td -o \ ../clang/docs/ClangCommandLineReference.rst
* [Remarks][Docs] Enhance documentation for opt-remarks driver optionsFrancis Visoiu Mistrih2019-12-101-2/+13
| | | | | Add better documentation about the naming scheme, add a few more explicit descriptions and make the sphinx look better.
* [Remarks][Driver] Error on -foptimization-record-file with multiple -arch ↵Francis Visoiu Mistrih2019-12-091-1/+1
| | | | | | | | | options This adds a check for the usage of -foptimization-record-file with multiple -arch options. This is not permitted since it would require us to rename the file requested by the user to avoid overwriting it for the second cc1 invocation.
* Revert "[ARM] Allocatable Global Register Variables for ARM"Carey Williams2019-11-291-21/+0
| | | | This reverts commit 2d739f98d8a53e38bf9faa88cdb6b0c2a363fb77.
* [ARM] Allocatable Global Register Variables for ARMAnna Welker2019-11-181-0/+21
| | | | | | | | | | | | Provides support for using r6-r11 as globally scoped register variables. This requires a -ffixed-rN flag in order to reserve rN against general allocation. If for a given GRV declaration the corresponding flag is not found, or the the register in question is the target's FP, we fail with a diagnostic. Differential Revision: https://reviews.llvm.org/D68862
* Add Windows Control Flow Guard checks (/guard:cf).Andrew Paverd2019-10-281-1/+5
| | | | | | | | | | | | | | | | | | | Summary: A new function pass (Transforms/CFGuard/CFGuard.cpp) inserts CFGuard checks on indirect function calls, using either the check mechanism (X86, ARM, AArch64) or or the dispatch mechanism (X86-64). The check mechanism requires a new calling convention for the supported targets. The dispatch mechanism adds the target as an operand bundle, which is processed by SelectionDAG. Another pass (CodeGen/CFGuardLongjmp.cpp) identifies and emits valid longjmp targets, as required by /guard:cf. This feature is enabled using the `cfguard` CC1 option. Reviewers: thakis, rnk, theraven, pcc Subscribers: ychen, hans, metalcanine, dmajor, tomrittervg, alex, mehdi_amini, mgorny, javed.absar, kristof.beyls, hiraditya, steven_wu, dexonsmith, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D65761
* Decrease the verbosity of the -ftime-trace optionSylvestre Ledru2019-10-011-1/+2
| | | | | | | | | | | | | | | | | | | | | And move the relevant information in the doc. Summary: Currently, building a large software like Firefox shows 'Use chrome://tracing or Speedscope App (https://www.speedscope.app) for flamegraph visualization' for each file. Reviewers: anton-afanasyev Reviewed By: anton-afanasyev Subscribers: cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D68260 llvm-svn: 373308
* [static analyzer] Remove --analyze-autoJan Korous2019-09-241-2/+0
| | | | | | Differential Revision: https://reviews.llvm.org/D67934 llvm-svn: 372680
* [SystemZ] Add SystemZ as supporting target in help text for -mfentry.Jonas Paulsson2019-09-201-1/+1
| | | | | | | => "Insert calls to fentry at function entry (x86/SystemZ only)" Review: Ulrich Weigand llvm-svn: 372387
* Fix -dA flag, it is not a preprocessor flag.Erich Keane2019-08-261-3/+1
| | | | | | | | | -dA was in the d_group, which is a preprocessor state dumping group. However -dA is a debug flag to cause a verbose asm. It was already implemented to do the same thing as -fverbose-asm, so make it just be an alias. llvm-svn: 369926
* [Support] Fix `-ftime-trace-granularity` optionAnton Afanasyev2019-07-241-0/+8
| | | | | | | | | | | | | | | | Summary: Move `-ftime-trace-granularity` option to frontend options. Without patch this option is showed up in the help for any tool that links libSupport. Reviewers: sammccall Subscribers: hiraditya, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D65202 llvm-svn: 366911
* [Driver] -noprofilelib flagPetr Hosek2019-07-111-0/+2
| | | | | | | | | | This flag is analoguous to other flags like -nostdlib or -nolibc and could be used to disable linking of profile runtime library. This is useful in certain environments like kernel, where profile instrumentation is still desirable, but we cannot use the standard runtime library. llvm-svn: 365808
* print-supported-cpus quality of life patch.Ziang Wan2019-06-251-0/+4
| | | | | | | Claim all input files so that clang does not give a warning. Add two short-cut aliases: -mcpu=? and -mtune=?. llvm-svn: 364362
* Add --print-supported-cpus flag for clang.Ziang Wan2019-06-141-0/+4
| | | | | | | | | | | | This patch allows clang users to print out a list of supported CPU models using clang [--target=<target triple>] --print-supported-cpus Then, users can select the CPU model to compile to using clang --target=<triple> -mcpu=<model> a.c It is a handy feature to help cross compilation. llvm-svn: 363464
* [AMDGPU] gfx1010 wave32 clang supportStanislav Mekhanoshin2019-06-131-0/+4
| | | | | | Differential Revision: https://reviews.llvm.org/D63209 llvm-svn: 363341
* [X86] Add ENQCMD instructionsPengfei Wang2019-06-061-0/+2
| | | | | | | | | | | | For more details about these instructions, please refer to the latest ISE document: https://software.intel.com/en-us/download/intel-architecture-instruction-set-extensions-programming-reference. Patch by Tianqing Wang (tianqing) Differential Revision: https://reviews.llvm.org/D62282 llvm-svn: 362685
* [X86] Add VP2INTERSECT instructionsPengfei Wang2019-05-311-0/+2
| | | | | | | | | | Support intel AVX512 VP2INTERSECT instructions in clang Patch by Xiang Zhang (xiangzhangllvm) Differential Revision: https://reviews.llvm.org/D62367 llvm-svn: 362196
* [Docs] Modernize references to macOSJ. Ryan Stinnett2019-05-301-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Summary: This updates all places in documentation that refer to "Mac OS X", "OS X", etc. to instead use the modern name "macOS" when no specific version number is mentioned. If a specific version is mentioned, this attempts to use the OS name at the time of that version: * Mac OS X for 10.0 - 10.7 * OS X for 10.8 - 10.11 * macOS for 10.12 - present Reviewers: JDevlieghere Subscribers: mgorny, christof, arphaman, cfe-commits, lldb-commits, libcxx-commits, llvm-commits Tags: #clang, #lldb, #libc, #llvm Differential Revision: https://reviews.llvm.org/D62654 llvm-svn: 362113
* [AMDGPU] gfx1010 clang targetStanislav Mekhanoshin2019-05-131-0/+5
| | | | | | Differential Revision: https://reviews.llvm.org/D61875 llvm-svn: 360634
* Enable intrinsics of AVX512_BF16, which are supported for BFLOAT16 in Cooper ↵Luo, Yuanke2019-05-061-0/+2
| | | | | | | | | | | | | | | | | | | | | | | Lake Summary: 1. Enable infrastructure of AVX512_BF16, which is supported for BFLOAT16 in Cooper Lake; 2. Enable intrinsics for VCVTNE2PS2BF16, VCVTNEPS2BF16 and DPBF16PS instructions, which are Vector Neural Network Instructions supporting BFLOAT16 inputs and conversion instructions from IEEE single precision. For more details about BF16 intrinsic, please refer to the latest ISE document: https://software.intel.com/en-us/download/intel-architecture-instruction-set-extensions-programming-reference Patch by LiuTianle Reviewers: craig.topper, smaslov, LuoYuanke, wxiao3, annita.zhang, spatel, RKSimon Reviewed By: craig.topper Subscribers: mgorny, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D60552 llvm-svn: 360018
* Fix some typos in the clang doc.Sylvestre Ledru2019-01-011-1/+1
| | | | | | | Fixed with: $ codespell -w ClangFormatStyleOptions.rst Toolchain.rst LanguageExtensions.rst ClangCommandLineReference.rst llvm-svn: 350192
* Implement -frecord-command-line (-frecord-gcc-switches)Scott Linder2018-12-141-1/+11
| | | | | | | | | | | | | | | | | | | | | | | | Implement options in clang to enable recording the driver command-line in an ELF section. Implement a new special named metadata, llvm.commandline, to support frontends embedding their command-line options in IR/ASM/ELF. This differs from the GCC implementation in some key ways: * In GCC there is only one command-line possible per compilation-unit, in LLVM it mirrors llvm.ident and multiple are allowed. * In GCC individual options are separated by NULL bytes, in LLVM entire command-lines are separated by NULL bytes. The advantage of the GCC approach is to clearly delineate options in the face of embedded spaces. The advantage of the LLVM approach is to support merging multiple command-lines unambiguously, while handling embedded spaces with escaping. Differential Revision: https://reviews.llvm.org/D54487 Clang Differential Revision: https://reviews.llvm.org/D54489 llvm-svn: 349155
* [asan] Add clang flag -fsanitize-address-use-odr-indicatorVitaly Buka2018-12-051-0/+4
| | | | | | | | | | Reviewers: eugenis, m.ostapenko, ygribov Subscribers: hiraditya, llvm-commits Differential Revision: https://reviews.llvm.org/D55157 llvm-svn: 348327
* Change -fsanitize-address-poison-class-member-array-new-cookie to ↵Filipe Cabecinhas2018-11-021-2/+4
| | | | | | | | | | | | | | -fsanitize-address-poison-custom-array-cookie Handle it in the driver and propagate it to cc1 Reviewers: rjmccall, kcc, rsmith Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D52615 llvm-svn: 346001
* [Hexagon] Remove support for V4Krzysztof Parzyszek2018-10-191-1/+1
| | | | llvm-svn: 344786
* [AArch64] Support adding X[8-15,18] registers as CSRs.Tri Vo2018-09-251-0/+36
| | | | | | | | | | | | | | | | | | Summary: Making X[8-15,18] registers call-saved is used to support CONFIG_ARM64_LSE_ATOMICS in Linux kernel. Signed-off-by: Tri Vo <trong@android.com> Reviewers: srhines, nickdesaulniers, javed.absar Reviewed By: nickdesaulniers Subscribers: kristof.beyls, jfb, cfe-commits Differential Revision: https://reviews.llvm.org/D52399 llvm-svn: 342990
* [AArch64] Support reserving x1-7 registers.Tri Vo2018-09-121-0/+28
| | | | | | | | | | | | | | Summary: Reserving registers x1-7 is used to support CONFIG_ARM64_LSE_ATOMICS in Linux kernel. This change adds support for reserving registers x1 through x7. Reviewers: javed.absar, efriedma, nickdesaulniers, srhines, phosek Reviewed By: nickdesaulniers Subscribers: manojgupta, jfb, cfe-commits, kristof.beyls Differential Revision: https://reviews.llvm.org/D48581 llvm-svn: 342100
* [docs] Regenerate ClangCommandLineReference.rstVedant Kumar2018-08-231-96/+192
| | | | llvm-svn: 340559
* [docs] Correct -fvisibility-inlines-hidden descriptionFangrui Song2018-07-191-1/+1
| | | | llvm-svn: 337505
* [clang]: Add support for "-fno-delete-null-pointer-checks"Manoj Gupta2018-07-191-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Support for this option is needed for building Linux kernel. This is a very frequently requested feature by kernel developers. More details : https://lkml.org/lkml/2018/4/4/601 GCC option description for -fdelete-null-pointer-checks: This Assume that programs cannot safely dereference null pointers, and that no code or data element resides at address zero. -fno-delete-null-pointer-checks is the inverse of this implying that null pointer dereferencing is not undefined. This feature is implemented in as the function attribute "null-pointer-is-valid"="true". This CL only adds the attribute on the function. It also strips "nonnull" attributes from function arguments but keeps the related warnings unchanged. Corresponding LLVM change rL336613 already updated the optimizations to not treat null pointer dereferencing as undefined if the attribute is present. Reviewers: t.p.northover, efriedma, jyknight, chandlerc, rnk, srhines, void, george.burgess.iv Reviewed By: jyknight Subscribers: drinkcat, xbolva00, cfe-commits Differential Revision: https://reviews.llvm.org/D47894 llvm-svn: 337433
* Add -fforce-emit-vtablesPiotr Padlewski2018-06-131-0/+6
| | | | | | | | | | | | | | | | | | | Summary: In many cases we can't devirtualize because definition of vtable is not present. Most of the time it is caused by inline virtual function not beeing emitted. Forcing emitting of vtable adds a reference of these inline virtual functions. Note that GCC was always doing it. Reviewers: rjmccall, rsmith, amharc, kuhar Subscribers: llvm-commits, cfe-commits Differential Revision: https://reviews.llvm.org/D47108 Co-authored-by: Krzysztof Pszeniczny <krzysztof.pszeniczny@gmail.com> llvm-svn: 334600
* [AArch64] Support reserving x20 registerPetr Hosek2018-06-121-0/+4
| | | | | | | | | | | | Register x20 is a callee-saved register which may be used for other purposes in certain contexts, for example to hold special variables within the kernel. This change adds support for reserving this register both to frontend and backend to make this register usable for these purposes. Differential Revision: https://reviews.llvm.org/D46552 llvm-svn: 334531
* This patch aims to match the changes introducedAlexander Ivchenko2018-05-181-2/+0
| | | | | | | | | | | | | | | | | in gcc by https://gcc.gnu.org/ml/gcc-cvs/2018-04/msg00534.html. The -mibt feature flag is being removed, and the -fcf-protection option now also defines a CET macro and causes errors when used on non-X86 targets, while X86 targets no longer check for -mibt and -mshstk to determine if -fcf-protection is supported. -mshstk is now used only to determine availability of shadow stack intrinsics. Comes with an LLVM patch (D46882). Patch by mike.dvoretsky Differential Revision: https://reviews.llvm.org/D46881 llvm-svn: 332704
* [X86] directstore and movdir64b intrinsicsGabor Buella2018-05-011-0/+4
| | | | | | | | | | Reviewers: spatel, craig.topper, RKSimon Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D45984 llvm-svn: 331249
* [Docs] Regenerate command line documentation.Craig Topper2018-04-231-0/+14
| | | | llvm-svn: 330654
* [docs] Regenerate command line referenceJonas Hahnfeld2018-04-201-19/+77
| | | | | | | This will correctly sort some manually added entries which should generally be avoided! llvm-svn: 330430
* [x86] wbnoinvd intrinsicGabor Buella2018-04-111-0/+2
| | | | | | | | | | | | | | The WBNOINVD instruction writes back all modified cache lines in the processor’s internal cache to main memory but does not invalidate (flush) the internal caches. Reviewers: craig.topper, zvi, ashlykov Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D43817 llvm-svn: 329848
* [CUDA] Added --[no-]cuda-include-ptx=sm_XX|all option.Artem Belevich2018-04-101-0/+4
| | | | | | | | | | | | | | Currently we always include PTX into the fatbin along with the GPU code.It about doubles the size of the GPU binary we need to carry in the executable. These options allow control inclusion of PTX into GPU binary. This patch does not change the defaults, though we may consider making no-PTX the default in the future. Differential Revision: https://reviews.llvm.org/D45495 llvm-svn: 329737
* [Hexagon] Remove -mhvx-double and the corresponding subtarget featureKrzysztof Parzyszek2018-04-031-4/+0
| | | | | | | Specifying the HVX vector length should be done via the -mhvx-length option. llvm-svn: 329077
* [WebAssembly] Add exception handling optionHeejin Ahn2018-03-021-0/+2
| | | | | | | | | | | | Summary: Add exception handling option to clang. Reviewers: dschuff Subscribers: jfb, sbc100, jgravelle-google, sunfish, cfe-commits Differential Revision: https://reviews.llvm.org/D43681 llvm-svn: 326517
* [DebugInfo] Support DWARF v5 source code embedding extensionScott Linder2018-02-261-0/+4
| | | | | | | | | | | | | In DWARF v5 the Line Number Program Header is extensible, allowing values with new content types. This vendor extension to DWARF v5 allows source text to be embedded directly in the line tables of the debug line section. Add new flag (-g[no-]embed-source) to Driver and CC1 which indicates that source should be passed through to LLVM during CodeGen. Differential Revision: https://reviews.llvm.org/D42766 llvm-svn: 326102
* Support for the mno-stack-arg-probe flagHans Wennborg2018-02-231-0/+4
| | | | | | | | | | | | Adds support for this flag. There is also another piece for llvm (separate review). More info: https://bugs.llvm.org/show_bug.cgi?id=36221 By Ruslan Nikolaev! Differential Revision: https://reviews.llvm.org/D43108 llvm-svn: 325901
* [docs] Regenerate command line referenceJonas Hahnfeld2018-02-221-16/+30
| | | | llvm-svn: 325807
* [Docs] Re-generate command line documentation.Craig Topper2018-01-231-0/+18
| | | | llvm-svn: 323235
* [WebAssembly] Add target flags for sign-ext opcodes.Dan Gohman2018-01-191-0/+2
| | | | | | | Add -msign-ext and -mno-sign-ext to control the new sign-ext target feature. llvm-svn: 322967
* [Docs] Re-generate command line documentation, primarily to get the icelake ↵Craig Topper2018-01-031-1/+21
| | | | | | feature command line options in, but there were a couple other changes too. llvm-svn: 321749
* [Driver][CodeGen] Add -mprefer-vector-width driver option and attribute ↵Craig Topper2017-12-111-0/+4
| | | | | | | | | | | | | | | | during CodeGen. This adds a new command line option -mprefer-vector-width to specify a preferred vector width for the vectorizers. Valid values are 'none' and unsigned integers. The driver will check that it meets those constraints. Specific supported integers will be managed by the targets in the backend. Clang will take the value and add it as a new function attribute during CodeGen. This represents the alternate direction proposed by Sanjay in this RFC: http://lists.llvm.org/pipermail/llvm-dev/2017-November/118734.html The syntax here matches gcc, though gcc treats it as an x86 specific command line argument. gcc only allows values of 128, 256, and 512. I'm not having clang check any values. Differential Revision: https://reviews.llvm.org/D40230 llvm-svn: 320419
* [Docs] Regenerate command line documentation.Craig Topper2017-12-111-8/+22
| | | | llvm-svn: 320418
* Toolchain: Normalize dwarf, sjlj and seh ehMartell Malone2017-11-291-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a re-apply of r319294. adds -fseh-exceptions and -fdwarf-exceptions flags clang will check if the user has specified an exception model flag, in the absense of specifying the exception model clang will then check the driver default and append the model flag for that target to cc1 -fno-exceptions has a higher priority then specifying the model move __SEH__ macro definitions out of Targets into InitPreprocessor behind the -fseh-exceptions flag move __ARM_DWARF_EH__ macrodefinitions out of verious targets and into InitPreprocessor behind the -fdwarf-exceptions flag and arm|thumb check remove unused USESEHExceptions from the MinGW Driver fold USESjLjExceptions into a new GetExceptionModel function that gives the toolchain classes more flexibility with eh models Reviewers: rnk, mstorsjo Differential Revision: https://reviews.llvm.org/D39673 llvm-svn: 319297
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