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* Disable the test I just added when testing C++03.Marshall Clow2018-04-251-1/+7
| | | | llvm-svn: 330838
* [InstCombine] add tests for select to logic folds; NFCSanjay Patel2018-04-251-0/+194
| | | | | | | | | | As discussed in D45862, we want these folds sometimes because they're good improvements. But as we can see here, the current logic doesn't check uses and doesn't produce optimal code in all cases. llvm-svn: 330837
* [clangd] Add "str()" method to SymbolID.Haojian Wu2018-04-253-4/+11
| | | | | | | | | | | | | | Summary: This is a convenient function when we try to get std::string of SymbolID. Reviewers: ioeric Subscribers: klimek, ilya-biryukov, MaskRay, jkorous, cfe-commits Differential Revision: https://reviews.llvm.org/D46065 llvm-svn: 330835
* [CostModel][X86] Recursive call for cost of imul for packed v16i16 constant ↵Simon Pilgrim2018-04-251-1/+3
| | | | | | | | shift left. Don't just assume cost = 1. llvm-svn: 330834
* [CodeComplete] Fix completion in the middle of ident in ctor lists.Ilya Biryukov2018-04-253-1/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | Summary: The example that was broken before (^ designates completion points): class Foo { Foo() : fie^ld^() {} // no completions were provided here. int field; }; To fix it we don't cut off lexing after an identifier followed by code completion token is lexed. Instead we skip the rest of identifier and continue lexing. This is consistent with behavior of completion when completion token is right before the identifier. Reviewers: sammccall, aaron.ballman, bkramer, sepavloff, arphaman, rsmith Reviewed By: aaron.ballman Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D44932 llvm-svn: 330833
* [clang-format] Start formatting cpp code in raw strings in google styleKrasimir Georgiev2018-04-251-12/+31
| | | | | | | | | | | | | | Summary: This adds some delimiters to detect cpp code in raw strings. Reviewers: klimek Reviewed By: klimek Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D46062 llvm-svn: 330832
* [AArch64][GlobalISel] Implement selection for the llvm.trap intrinsic.Amara Emerson2018-04-252-0/+41
| | | | | | rdar://38674040 llvm-svn: 330831
* Fix typo in static_assert for size of LoadSDNodeBitfields.Paul Walker2018-04-251-1/+1
| | | | | | | | | | | | Reviewers: fhahn, jlebar, delena, RKSimon Reviewed By: fhahn, jlebar Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D45769 llvm-svn: 330830
* [llvm-mca] Make ViewOptions static. NFCIFilipe Cabecinhas2018-04-251-1/+1
| | | | llvm-svn: 330829
* Fix static initialization of std::atomic_flag; Fixes PR#37226. Thanks to ↵Marshall Clow2018-04-252-1/+8
| | | | | | Ricky Zhou for the report and test case. llvm-svn: 330828
* [RISCV] Expand function call to "call" pseudoinstructionShiva Chen2018-04-2526-565/+249
| | | | | | | | | | | | | | | | To do this: 1. Change GlobalAddress SDNode to TargetGlobalAddress to avoid legalizer split the symbol. 2. Change ExternalSymbol SDNode to TargetExternalSymbol to avoid legalizer split the symbol. 3. Let PseudoCALL match direct call with target operand TargetGlobalAddress and TargetExternalSymbol. Differential Revision: https://reviews.llvm.org/D44885 llvm-svn: 330827
* [RISCV] Support "call" pseudoinstruction in the MC layerShiva Chen2018-04-259-4/+140
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | To do this: 1. Add PseudoCALLIndirct to match indirect function call. 2. Add PseudoCALL to support parsing and print pseudo `call` in assembly 3. Expand PseudoCALL to the following form with R_RISCV_CALL relocation type while encoding: auipc ra, func jalr ra, ra, 0 If we expand PseudoCALL before emitting assembly, we will see auipc and jalr pair when compile with -S. It's hard for assembly parser to parsing this pair and identify it's semantic is function call and then insert R_RISCV_CALL relocation type. Although we could insert R_RISCV_PCREL_HI20 and R_RISCV_PCREL_LO12_I relocation types instead of R_RISCV_CALL. Due to RISCV relocation design, auipc and jalr pair only can relax to jal with R_RISCV_CALL + R_RISCV_RELAX relocation types. We expand PseudoCALL as late as encoding(RISCVMCCodeEmitter) instead of before emitting assembly(RISCVAsmPrinter) because we want to preserve call pseudoinstruction in assembly code. It's more readable and assembly parser could identify call assembly and insert R_RISCV_CALL relocation type. Differential Revision: https://reviews.llvm.org/D45859 llvm-svn: 330826
* [mips] Teach the delay slot filler to transform 'jal' for microMIPSSimon Dardis2018-04-252-0/+71
| | | | | | | | | | ISel is currently picking 'JAL' over 'JAL_MM' for calling a function when targeting microMIPS. A later patch will correct this behaviour. This patch extends the mechanism for transforming instructions into their short delay to recognise 'JAL_MM' for transforming into 'JALS_MM'. llvm-svn: 330825
* [HIP] Add predefined macros __HIPCC__ and __HIP_DEVICE_COMPILE__Yaxun Liu2018-04-252-2/+21
| | | | | | Differential Revision: https://reviews.llvm.org/D45441 llvm-svn: 330824
* Fix -Wswitch warning after r330790.Benjamin Kramer2018-04-251-0/+3
| | | | | | | source/Symbol/ClangASTContext.cpp:391:13: error: enumeration value 'HIP' not handled in switch [-Werror,-Wswitch] switch (IK.getLanguage()) { llvm-svn: 330823
* [llvm-mca][X86] Updated fma3 tests after rL330820Simon Pilgrim2018-04-252-10/+10
| | | | llvm-svn: 330822
* Fix failure in lit test kernel-call.cu due to name manglingYaxun Liu2018-04-251-2/+2
| | | | llvm-svn: 330821
* [X86] Split WriteFMA into XMM, Scalar and YMM/ZMM scheduler classesSimon Pilgrim2018-04-2512-170/+201
| | | | | | | | This removes all the FMA InstRW overrides. If we ever get PR36924, then we can remove many of these declarations from models. llvm-svn: 330820
* [X86][AArch64][NFC] Finish adding 'bad' tests for masked merge unfolding ↵Roman Lebedev2018-04-252-82/+492
| | | | | | | | | | with constants. I have initially committed basic tests in, rL330771, but then quickly discovered that there are a few more interesting patterns. llvm-svn: 330819
* [AMDGPU] Revert b0efc4fd6 (https://reviews.llvm.org/D40556)Alexander Timofeev2018-04-255-109/+24
| | | | llvm-svn: 330818
* Avoid a warning on pointer casting, NFCGabor Buella2018-04-251-1/+3
| | | | | | | | | | Reviewers: philip.pfaffe Reviewed By: philip.pfaffe Differential Revision: https://reviews.llvm.org/D46012 llvm-svn: 330817
* [llvm-mca] Add a new option category for views.Andrea Di Biagio2018-04-251-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | With this patch, options to add/tweak views are all grouped together in the -help output. The new "View Options" category looks like this: ``` View Options: -dispatch-stats - Print dispatch statistics -instruction-info - Print the instruction info view -instruction-tables - Print instruction tables -register-file-stats - Print register file statistics -resource-pressure - Print the resource pressure view -retire-stats - Print retire control unit statistics -scheduler-stats - Print scheduler statistics -timeline - Print the timeline view -timeline-max-cycles=<uint> - Maximum number of cycles in the timeline view. Defaults to 80 cycles -timeline-max-iterations=<uint> - Maximum number of iterations to print in timeline view ``` llvm-svn: 330816
* [UpdateTestChecks] Change update_mca_test_checks.py file mode to match the ↵Greg Bedwell2018-04-251-0/+0
| | | | | | other scripts llvm-svn: 330815
* [ELF] - Eliminate the AssertCommand.George Rimar2018-04-254-55/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | Currently, LLD supports ASSERT as a separate command. We support two forms now. Assign expression-form: . = ASSERT(0x100) (old GNU ld required it and some scripts in the wild are still using something like . = ASSERT((_end - _text <= (512 * 1024 * 1024)), "kernel image bigger than KERNEL_IMAGE_SIZE"); Nowadays above is not a mandatory form and command-like form is commonly used: ASSERT(<expr>, "text); The return value of the ASSERT is Dot. That was implemented in D30171. It looks like (2) is just a short version of (1) then. GNU ld does *not* list ASSERT as a SECTIONS command: https://sourceware.org/binutils/docs/ld/SECTIONS.html#SECTIONS Given above we probably can change ASSERT to be an assignment to Dot. That makes the rest of the code much simpler. Patch do that. Differential revision: https://reviews.llvm.org/D45434 llvm-svn: 330814
* [X86][SKX] Setup WriteFAdd and remove unnecessary InstRW scheduler overrides.Simon Pilgrim2018-04-251-140/+7
| | | | llvm-svn: 330813
* [X86][SNB] Remove unnecessary WriteFBlendLd InstRW scheduler overrides.Simon Pilgrim2018-04-251-4/+2
| | | | llvm-svn: 330812
* [llvm-mca] run clang-format on a bunch of files. NFCAndrea Di Biagio2018-04-254-14/+13
| | | | llvm-svn: 330811
* [mips] Fix the definition of sync, synciSimon Dardis2018-04-2515-18/+78
| | | | | | | | | | Also, fix the disassembly of synci for microMIPS. Reviewers: abeserminji, smaksimovic, atanasyan Differential Revision: https://reviews.llvm.org/D45870 llvm-svn: 330810
* [llvm-mca] Default to the native host cpu if flag -mcpu is not specified.Andrea Di Biagio2018-04-253-6/+9
| | | | llvm-svn: 330809
* add check for long double for __builtin_dump_structPaul Semel2018-04-251-0/+24
| | | | llvm-svn: 330808
* [llvm-mca] Remove method Instruction::isZeroLatency(). NFCIAndrea Di Biagio2018-04-255-13/+11
| | | | llvm-svn: 330807
* [LoopInterchange] Use getExitBlock()/getExitingBlock instead of manual impl.Florian Hahn2018-04-252-37/+74
| | | | | | | | | | | | | | | This also means we have to check if the latch is the exiting block now, as `transform` expects the latches to be the exiting blocks too. https://bugs.llvm.org/show_bug.cgi?id=36586 Reviewers: efriedma, davide, karthikthecool Reviewed By: efriedma Differential Revision: https://reviews.llvm.org/D45279 llvm-svn: 330806
* [AArch64][SVE] Asm: Add AsmOperand classes for SVE gather/scatter addressing ↵Sander de Smalen2018-04-254-8/+150
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | modes. This patch adds parsing support for 'vector + shift/extend' and corresponding asm operand classes, needed for implementing SVE's gather/scatter addressing modes. The added combinations of vector (ZPR) and Shift/Extend are: Unscaled: ZPR64ExtLSL8: signed 64-bit offsets (z0.d) ZPR32ExtUXTW8: unsigned 32-bit offsets (z0.s, uxtw) ZPR32ExtSXTW8: signed 32-bit offsets (z0.s, sxtw) Unpacked and unscaled: ZPR64ExtUXTW8: unsigned 32-bit offsets (z0.d, uxtw) ZPR64ExtSXTW8: signed 32-bit offsets (z0.d, sxtw) Unpacked and scaled: ZPR64ExtUXTW<scale>: unsigned 32-bit offsets (z0.d, uxtw #<shift>) ZPR64ExtSXTW<scale>: signed 32-bit offsets (z0.d, sxtw #<shift>) Scaled: ZPR32ExtUXTW<scale>: unsigned 32-bit offsets (z0.s, uxtw #<shift>) ZPR32ExtSXTW<scale>: signed 32-bit offsets (z0.s, sxtw #<shift>) ZPR64ExtLSL<scale>: unsigned 64-bit offsets (z0.d, lsl #<shift>) ZPR64ExtLSL<scale>: signed 64-bit offsets (z0.d, lsl #<shift>) Patch [1/3] in series to add support for SVE's gather load instructions that use scalar+vector addressing modes: - Patch [1/3]: https://reviews.llvm.org/D45951 - Patch [2/3]: https://reviews.llvm.org/D46023 - Patch [3/3]: https://reviews.llvm.org/D45958 Reviewers: fhahn, rengolin, samparker, SjoerdMeijer, t.p.northover, echristo, evandro, javed.absar Reviewed By: fhahn Differential Revision: https://reviews.llvm.org/D45951 llvm-svn: 330805
* [DebugInfo] Invalidate debug info in ReassociatePass::RewriteExprTreeBjorn Pettersson2018-04-252-0/+92
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: When Reassociate is rewriting an expression tree it may reuse old binary expression nodes, for new expressions. Whenever an expression node is reused, but with a non-trivial change in the result, we need to invalidate any debug info that is associated with the node. If for example rewriting x = mul a, b y = mul c, x into x = mul c, b y = mul a, x we still get the same result for 'y', but 'x' is a new expression. All debug info referring to 'x' must be invalidated (marked as optimized out) since we no longer calculate the expected value. As a side-effect this patch avoid (at least some) problems where reassociate could end up creating IR with debug-use before def. Earlier the dbg.value nodes where left untouched in the IR, while the reused binary nodes where sinked to just before the root node of the rewritten expression tree. See PR27273 for more info about such problems. Reviewers: dblaikie, aprantl, dexonsmith Reviewed By: aprantl Subscribers: JDevlieghere, llvm-commits Tags: #debug-info Differential Revision: https://reviews.llvm.org/D45975 llvm-svn: 330804
* [clangd] Minor fixes for C++ standard library header mapping.Eric Liu2018-04-251-7/+24
| | | | llvm-svn: 330803
* Fix buildbot problems after rC330794Bjorn Pettersson2018-04-251-1/+2
| | | | | | | | | | | | | | Avoiding error: no matching function for call to 'makeArrayRef' at ../tools/clang/lib/Parse/ParseTemplate.cpp:373:17 By using a local C array as input to makeArrayRef. Not sure if this is the best solution, but it makes the code compile again. llvm-svn: 330802
* [TableGen] Fix bad indentation in tablegen output file.Craig Topper2018-04-251-2/+2
| | | | llvm-svn: 330801
* Update isl to isl-0.19-114-g385262afTobias Grosser2018-04-2513-41/+248
| | | | llvm-svn: 330800
* Merging r46043:David Bolvansky2018-04-251-3/+3
| | | | | | ------------------------------------------------------------------------ llvm-svn: 330799
* [NFC] Make dependent parameter non-deducible, so that we are forced to use ↵Faisal Vali2018-04-251-1/+2
| | | | | | | | the default template parameter. This might provide users with more graceful diagnostics if they should ever try and call this function with non-ConceptDecls. llvm-svn: 330798
* [X86] Auto-generate complete checks. NFCCraig Topper2018-04-251-53/+178
| | | | llvm-svn: 330797
* Fix rC330794 - a parameter that should have been dependent was inadvertently ↵Faisal Vali2018-04-251-2/+4
| | | | | | | | | | not - and compiled in MSVC - but not so for the other bots. The fix was to make it dependent as intended. llvm-svn: 330796
* Fix lit test kernel-call.cu failure on ps4 due to dso_localYaxun Liu2018-04-251-2/+2
| | | | llvm-svn: 330795
* [c++2a] [concepts] Add rudimentary parsing support for template concept ↵Faisal Vali2018-04-2533-72/+635
| | | | | | | | | | | | | | declarations This patch is a tweak of changyu's patch: https://reviews.llvm.org/D40381. It differs in that the recognition of the 'concept' token is moved into the machinery that recognizes declaration-specifiers - this allows us to leverage the attribute handling machinery more seamlessly. See the test file to get a sense of the basic parsing that this patch supports. There is much more work to be done before concepts are usable... Thanks Changyu! llvm-svn: 330794
* Fix failure in lit test kernel-call.cuYaxun Liu2018-04-251-1/+1
| | | | | | There is signext on ppc64. Just remove check for function argument. llvm-svn: 330793
* [DivRemPairs] Fix non-determinism in use list order.Geoff Berry2018-04-251-3/+8
| | | | | | | | | | | | | | | | | Summary: Use a MapVector instead of a DenseMap for RemMap since it is iteratated over and the order of iteration can effect the order that new instructions are created. This can in turn effect the use list order of div/rem input values if multiple new instructions are created that share any input values. Reviewers: spatel Subscribers: mcrosier, llvm-commits Differential Revision: https://reviews.llvm.org/D45858 llvm-svn: 330792
* [libcxx] [test] Remove nonportable that errc::is_a_directory produces "Is a ↵Billy Robert O'Neal III2018-04-252-2/+6
| | | | | | | | | | directory" from ios_base::failure tests These io_error asserts that std::errc::is_a_directory has message "Is a directory". On MSVC++ it reports "is a directory" (with a lowercase I). That doesn't matter for the ios_failure component being tested, so just implement in terms of system_category().message(). Reviewed as https://reviews.llvm.org/D45715 llvm-svn: 330791
* [HIP] Add hip input kind and codegen for kernel launchingYaxun Liu2018-04-2513-67/+151
| | | | | | | | | | | | | | | | | | | | | | | HIP is a language similar to CUDA (https://github.com/ROCm-Developer-Tools/HIP/blob/master/docs/markdown/hip_kernel_language.md ). The language syntax is very similar, which allows a hip program to be compiled as a CUDA program by Clang. The main difference is the host API. HIP has a set of vendor neutral host API which can be implemented on different platforms. Currently there is open source implementation of HIP runtime on amdgpu target (https://github.com/ROCm-Developer-Tools/HIP). This patch adds support of input kind and language standard hip. When hip file is compiled, both LangOpts.CUDA and LangOpts.HIP is turned on. This allows compilation of hip program as CUDA in most cases and only special handling of hip program is needed LangOpts.HIP is checked. This patch also adds support of kernel launching of HIP program using HIP host API. When -x hip is not specified, there is no behaviour change for CUDA. Patch by Greg Rodgers. Revised and lit test added by Yaxun Liu. Differential Revision: https://reviews.llvm.org/D44984 llvm-svn: 330790
* [ODRHash] Hash template arguments of methods.Richard Trieu2018-04-254-1/+219
| | | | llvm-svn: 330789
* Bring r329960 back.Rafael Espindola2018-04-253-62/+50
| | | | | | | | | | | | | | | | | | | | The fix is to copy Used when replacing the symbol. Original message: Do not keep shared symbols created from garbage-collected eliminated DSOs. If all references to a DSO happen to be weak, and if the DSO is specified with --as-needed, the DSO is not added to DT_NEEDED. If that happens, we also need to eliminate shared symbols created from the DSO. Otherwise, they become dangling references that point to non-exsitent DSO. Fixes https://bugs.llvm.org/show_bug.cgi?id=36991 Differential Revision: https://reviews.llvm.org/D45536 llvm-svn: 330788
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