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* AMDGPU: Make i32 uaddo/usubo legalMatt Arsenault2017-01-304-58/+195
| | | | llvm-svn: 293514
* DAG: Fold fneg into compare with constant into the constantMatt Arsenault2017-01-304-6/+273
| | | | | | | | fcmp (fneg x), c, pred -> fcmp x, -c, (swap pred) InstCombine already does this. llvm-svn: 293512
* [Orc] Add missing include.Benjamin Kramer2017-01-301-0/+1
| | | | llvm-svn: 293511
* [RDF] Extract the physical register information into a separate classKrzysztof Parzyszek2017-01-307-254/+344
| | | | llvm-svn: 293510
* Revert "AMDGPU/GlobalISel: Add support for simple shaders"Tom Stellard2017-01-3022-1496/+10
| | | | | | | | This reverts commit r293503. Revert while I investigate some of the buildbot failures. llvm-svn: 293509
* [InstCombine] use auto with obvious type; NFCSanjay Patel2017-01-301-3/+3
| | | | llvm-svn: 293508
* [InstCombine] enable (X <<nsw C1) >>s C2 --> X <<nsw (C1-C2) for vectors ↵Sanjay Patel2017-01-302-23/+19
| | | | | | with splat constants llvm-svn: 293507
* unique_ptrify some containers in GlobalISel::RegisterBankInfoDavid Blaikie2017-01-302-23/+13
| | | | | | | | | To simplify/clarify memory ownership, make leaks (as one was found/fixed recently) harder to write, etc. (also, while I was there - removed a duplicate lookup in a container) llvm-svn: 293506
* [XRay][ARM32][AArch64] Fix unstable FDR tests on weak-ordering CPUsSerge Rogatch2017-01-301-4/+4
| | | | | | | | | | | | | | Summary: Change from `compare_exchange_weak()` to `compare_exchange_strong()` where appropriate, because on ARM ( http://lab.llvm.org:8011/builders/clang-cmake-armv7-a15-full/builds/3190 , http://lab.llvm.org:8011/builders/clang-cmake-armv7-a15-full/builds/3191 ) and AArch64 ( http://lab.llvm.org:8011/builders/clang-cmake-aarch64-42vma/builds/3900 ) it fails even in single-threaded scenarios. Reviewers: dberris, rengolin Reviewed By: rengolin Subscribers: aemerson, llvm-commits, iid_iunknown Differential Revision: https://reviews.llvm.org/D29286 llvm-svn: 293505
* AMDGPU: Fix atomic_inc/atomic_dec + ds_swizzle not being divergentMatt Arsenault2017-01-303-0/+46
| | | | llvm-svn: 293504
* AMDGPU/GlobalISel: Add support for simple shadersTom Stellard2017-01-3022-10/+1496
| | | | | | | | | | | | Summary: We can select constant/global G_LOAD, global G_STORE, and G_GEP. Reviewers: qcolombet, MatzeB, t.p.northover, ab, arsenm Subscribers: mehdi_amini, vkalintiris, kzhuravl, wdng, nhaehnle, mgorny, yaxunl, tony-tye, modocache, llvm-commits, dberris Differential Revision: https://reviews.llvm.org/D26730 llvm-svn: 293503
* Update pr31758.ll for unreachable revertDaniel Berlin2017-01-301-1/+1
| | | | llvm-svn: 293502
* Revert "NewGVN: Make unreachable blocks be marked with unreachable"Daniel Berlin2017-01-303-33/+38
| | | | | | | | | This reverts commit r293196 Besides making things look nicer, ATM, we'd like to preserve analysis more than we'd like to destroy the CFG. We'll probably revisit in the future llvm-svn: 293501
* [X86][SSE] Add support for combining PINSRW+ASSERTZEXT+PEXTRW patterns with ↵Simon Pilgrim2017-01-302-15/+21
| | | | | | target shuffles llvm-svn: 293500
* DAG: Constant fold fp16_to_fp/fp16_to_fpMatt Arsenault2017-01-3014-163/+142
| | | | | | | This fixes emitting conversions of constants on targets without legal f16 that need to use these for legalization. llvm-svn: 293499
* [InstCombine] fixed to propagate 'exact' on lshrSanjay Patel2017-01-302-2/+2
| | | | | | | | | | | | | | | | | The original shift is bigger, so this may qualify as 'obvious', but here's an attempt at an Alive-based proof: Name: exact Pre: (C1 u< C2) %a = shl i8 %x, C1 %b = lshr exact i8 %a, C2 => %c = lshr exact i8 %x, C2 - C1 %b = and i8 %c, ((1 << width(C1)) - 1) u>> C2 Optimization is correct! llvm-svn: 293498
* [InstCombine] add 'exact' to lshr to show that it got dropped; NFC Sanjay Patel2017-01-301-1/+2
| | | | llvm-svn: 293496
* [Coroutines] Add header guard to header that's missing one.Benjamin Kramer2017-01-301-0/+5
| | | | llvm-svn: 293494
* Adjust tests after folding inlining analysis into missed remarksAdam Nemet2017-01-302-7/+7
| | | | llvm-svn: 293493
* [Inliner] Fold analysis remarks into missed remarksAdam Nemet2017-01-303-19/+14
| | | | | | This significantly reduces the noise level of these messages. llvm-svn: 293492
* [RDF] Add phis for entry block live-ins (in addition to function live-ins)Krzysztof Parzyszek2017-01-303-14/+22
| | | | llvm-svn: 293491
* [Inliner] Fix a comment to match the code. NFC.Haicheng Wu2017-01-301-2/+2
| | | | | | | | TotalAltCost => TotalSecondaryCost Differential Revision: https://reviews.llvm.org/D29231 llvm-svn: 293490
* [InstCombine] enable lshr(shl X, C1), C2 folds for vectors with splat constantsSanjay Patel2017-01-302-29/+28
| | | | llvm-svn: 293489
* [AST] Make header standalone.Benjamin Kramer2017-01-301-0/+1
| | | | | | | Most implementations get ptrdiff_t transitively, some don't. Explicitly include cstddef. llvm-svn: 293488
* [InstCombine] add tests for shift-shift patterns; NFCSanjay Patel2017-01-301-0/+57
| | | | llvm-svn: 293487
* Bring back r293480. It is safe now.Rafael Espindola2017-01-301-10/+10
| | | | | | | | | | | | | | | Original message: Fix the values of two xcore ELF flags. The values in llvm grew from a pre-MC day when they would not show up in .o files and are outside of the SHF_MASKPROC. Fortunately the MC output is not currently used as xcore has its own assemble and that assembler uses valid values. This updates llvm to use the same values as the xmos assembler. llvm-svn: 293486
* [IRGen] Make header standalone.Benjamin Kramer2017-01-301-0/+1
| | | | llvm-svn: 293485
* Only print architecture dependent flags for that architecture.Rafael Espindola2017-01-309-15/+27
| | | | | | | | | | Different architectures can have different meaning for flags in the SHF_MASKPROC mask, so we should always check what the architecture use before checking the flag. NFC for now, but will allow fixing the value of an xmos flag. llvm-svn: 293484
* TableGen: Fix infinite recursion in RegisterBankEmitterTom Stellard2017-01-302-3/+26
| | | | | | | | | | | | | | | | Summary: AMDGPU has two register classes with the same set of registers, and this was causing this tablegen backend would get stuck in infinite recursion. Reviewers: dsanders Reviewed By: dsanders Subscribers: tpr, wdng, llvm-commits Differential Revision: https://reviews.llvm.org/D29049 llvm-svn: 293483
* [Hexagon] Make header self-contained.Benjamin Kramer2017-01-301-0/+3
| | | | llvm-svn: 293482
* Revert "Fix the values of two xcore ELF flags."Rafael Espindola2017-01-301-10/+10
| | | | | | | | This reverts commit r293480. The patch is correct, but found bugs in other areas that need to be fixed. llvm-svn: 293481
* Fix the values of two xcore ELF flags.Rafael Espindola2017-01-301-10/+10
| | | | | | | | | | | The values in llvm grew from a pre-MC day when they would not show up in .o files and are outside of the SHF_MASKPROC. Fortunately the MC output is not currently used as xcore has its own assemble and that assembler uses valid values. This updates llvm to use the same values as the xmos assembler. llvm-svn: 293480
* [ELF] - Change i386 i386-pc8.s/i386-pc16.test to work with 8/16 bits values ↵George Rimar2017-01-302-5/+5
| | | | | | | | | | | | | | | | | accordingly. ld.bfd showed error on previous inputs, result values were larger than 8/16 bits, though ld.gold accepted them. ABI says "The R_386_16, and R_386_8 relocations truncate the computed value to 16-bits and 8-bits respectively". Patch changes inputs to have result calculated values of relocations to fit 8 and 16 bits. That can be used for implementation of more strict checks, like bfd do. Differential revision: https://reviews.llvm.org/D29270 llvm-svn: 293479
* [X86][MCU] Minor bug fix for r293469 + test caseAsaf Badouh2017-01-302-1/+15
| | | | llvm-svn: 293478
* AMDGPU: Remove a useless VI SMRD patternMarek Olsak2017-01-302-10/+0
| | | | | | | | | | | | Summary: already covered by complex patterns Reviewers: arsenm, nhaehnle, tstellarAMD Subscribers: kzhuravl, wdng, yaxunl, tony-tye Differential Revision: https://reviews.llvm.org/D28995 llvm-svn: 293477
* AMDGPU: Fix assembler encoding for EXP instructions on VIMarek Olsak2017-01-302-30/+60
| | | | | | | | | | Reviewers: arsenm, tstellarAMD Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, tony-tye Differential Revision: https://reviews.llvm.org/D28992 llvm-svn: 293476
* Revert "r293343 - [ubsan] Sanity-check shift amounts before truncationAlex Lorenz2017-01-302-31/+2
| | | | | | | | | | | (fixes PR27271)" After r293343 clang fails to compile itself with -fsanitize=undefined ( http://lab.llvm.org:8080/green/job/clang-stage2-cmake-RgSan_build/). rdar://30259929 llvm-svn: 293475
* Revert "[MemorySSA] Revert r293361 and r293363, as the tests fail under asan."Daniel Berlin2017-01-305-20/+98
| | | | | | | This reverts commit r293471, reapplying r293361 and r293363 with a fix for an out-of-bounds read. llvm-svn: 293474
* Revert r293455, which breaks v8 with a spurious error. Testcase added.Sam McCall2017-01-3010-204/+41
| | | | | | | | | | | | Summary: Revert r293455, which breaks v8 with a spurious error. Testcase added. Reviewers: klimek Subscribers: cfe-commits, rsmith Differential Revision: https://reviews.llvm.org/D29271 llvm-svn: 293473
* Correct wrong comment in bug_nested_proxy_task.cJonas Hahnfeld2017-01-301-1/+1
| | | | | | The nested proxy task does not have dependencies. llvm-svn: 293472
* [MemorySSA] Revert r293361 and r293363, as the tests fail under asan.Sam McCall2017-01-305-91/+17
| | | | llvm-svn: 293471
* [GlobalISel] Add support for indirectbrKristof Beyls2017-01-3010-3/+108
| | | | | | Differential Revision: https://reviews.llvm.org/D28079 llvm-svn: 293470
* [X86][MCU] replace select with bit manipulation instead of branchesAsaf Badouh2017-01-302-2/+84
| | | | | | | | | Differential Revision: https://reviews.llvm.org/D28354 llvm-svn: 293469
* [libomptarget] Fix Debug build with glibc < 2.18Jonas Hahnfeld2017-01-301-0/+1
| | | | | | | | | | | glibc < 2.18 is C99 compliant and only provides the format macros in C++ if __STDC_FORMAT_MACROS is defined. This change fixes the debug build for GCC 4.8, GCC 6.2 and Clang 3.9.1 that were previously broken on my machine. It shows no regression for libc++ >= 4.0.0 which has a fix since September: http://lists.llvm.org/pipermail/cfe-commits/Week-of-Mon-20160926/171659.html llvm-svn: 293468
* [LanRef] Fix typo in getelementptr example.Alexey Bader2017-01-301-1/+1
| | | | | | | | | | | | | | Summary: Change B type from double to pointer to double. Reviewers: delena, sanjoy Reviewed By: sanjoy Subscribers: sanjoy, llvm-commits Differential Revision: https://reviews.llvm.org/D29009 llvm-svn: 293467
* [c-index-test] CMake: add missing reference to clangSerialization library.Argyrios Kyrtzidis2017-01-301-0/+1
| | | | llvm-svn: 293466
* clang-format: [JavaScript] Undo r291974 for JavaScript.Daniel Jasper2017-01-302-1/+18
| | | | | | | | | | | | | | | | | | | | | This had significant negative consequences and I don't have a good solution for it yet. Before: var string = [ 'aaaaaa', 'bbbbbb', ] .join('+'); After: var string = [ 'aaaaaa', 'bbbbbb', ].join('+'); llvm-svn: 293465
* [AVX-512] Remove duplicate CodeGenOnly patterns for scalar register ↵Craig Topper2017-01-306-72/+40
| | | | | | | | broadcast. We can use COPY_TO_REGCLASS like AVX does. This causes stack spill slots be oversized sometimes, but the same should already be happening with AVX. llvm-svn: 293464
* [index] CMake: add missing reference to clangSerialization library.Argyrios Kyrtzidis2017-01-301-0/+1
| | | | llvm-svn: 293463
* Reapply "DebugInfo: Omit class definitions even in the presence of ↵David Blaikie2017-01-304-13/+51
| | | | | | | | | | | available_externally vtables" Accounts for a case that caused an assertion failure by attempting to query for the vtable linkage of a non-dynamic type.t This reverts commit r292801. llvm-svn: 293462
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