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| author | Asaf Badouh <asaf.badouh@intel.com> | 2017-01-30 13:14:37 +0000 |
|---|---|---|
| committer | Asaf Badouh <asaf.badouh@intel.com> | 2017-01-30 13:14:37 +0000 |
| commit | e11d2d73bf05528ffdc33536d78e2ac441096a8c (patch) | |
| tree | fa7c5750e228f4b9d03d26be1b83efb6da7532d5 | |
| parent | e81adb52b17d405624356b5b280dbcf195adc937 (diff) | |
| download | bcm5719-llvm-e11d2d73bf05528ffdc33536d78e2ac441096a8c.tar.gz bcm5719-llvm-e11d2d73bf05528ffdc33536d78e2ac441096a8c.zip | |
[X86][MCU] Minor bug fix for r293469 + test case
llvm-svn: 293478
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/select.ll | 14 |
2 files changed, 15 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 8a43771d85d..b3ae9d767ef 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -17395,7 +17395,7 @@ SDValue X86TargetLowering::LowerSELECT(SDValue Op, SelectionDAG &DAG) const { DAG.getNode(ISD::ANY_EXTEND, DL, VT, CmpOp0.getOperand(0)), DAG.getConstant(1, DL, VT)); else - Neg = Cmp; + Neg = CmpOp0; SDValue Mask = DAG.getNode(ISD::SUB, DL, VT, DAG.getConstant(0, DL, VT), Neg); // -(and (x, 0x1)) SDValue And = DAG.getNode(ISD::AND, DL, VT, Mask, Src1); // Mask & z diff --git a/llvm/test/CodeGen/X86/select.ll b/llvm/test/CodeGen/X86/select.ll index caf9d2384f2..e6cce778b21 100644 --- a/llvm/test/CodeGen/X86/select.ll +++ b/llvm/test/CodeGen/X86/select.ll @@ -678,3 +678,17 @@ entry: %1 = select i1 %cmp10, i32 %A, i32 %0 ret i32 %1 } + +define i32 @select_or_1(i32 %A, i32 %B, i32 %cond) { +; CHECK-LABEL: select_or_1: +; MCU: andl $1, %ecx +; MCU-NEXT: negl %ecx +; MCU-NEXT: andl %edx, %ecx +; MCU-NEXT: orl %ecx, %eax +entry: + %and = and i32 %cond, 1 + %cmp10 = icmp eq i32 %and, 0 + %0 = or i32 %B, %A + %1 = select i1 %cmp10, i32 %A, i32 %0 + ret i32 %1 +}
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