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* [RISCV] Properly evaluate fixup_riscv_pcrel_lo12Alex Bradbury2018-12-207-26/+159
| | | | | | | | | | | | | | | | | | | | This is a update to D43157 to correctly handle fixup_riscv_pcrel_lo12. Notable changes: Rebased onto trunk Handle and test S-type Test case pcrel-hilo.s is merged into relocations.s D43157 description: VK_RISCV_PCREL_LO has to be handled specially. The MCExpr inside is actually the location of an auipc instruction with a VK_RISCV_PCREL_HI fixup pointing to the real target. Differential Revision: https://reviews.llvm.org/D54029 Patch by Chih-Mao Chen and Michael Spencer. llvm-svn: 349764
* [X86][AVX512] Don't custom lower v16i8 rotations.Simon Pilgrim2018-12-202-134/+56
| | | | | | As discussed on D55747, the expansion to (wider) shifts is better on all AVX512 cases, not just BWI. llvm-svn: 349763
* [Sanitizer] Enable vis api on FreeBSDDavid Carlier2018-12-204-1/+8
| | | | | | | | | | Reviewers: krytarowski Reviewed By: krytarowski Differential Revision: https://reviews.llvm.org/D55923 llvm-svn: 349762
* [SystemZ] "Generic" vector assembler instructions shoud clobber CCUlrich Weigand2018-12-201-9/+14
| | | | | | | | | | | | | There are several vector instructions which may or may not set the condition code register, depending on the value of an argument. For codegen, we use two versions of the instruction, one that sets CC and one that doesn't, which hard-code appropriate values of that argument. But we also have a "generic" version of the instruction that is used for the assembler/disassembler. These generic versions should always be considered to clobber CC just to be safe. llvm-svn: 349761
* Fix gcc7 -Wdangling-else warning. NFCI.Simon Pilgrim2018-12-201-2/+4
| | | | llvm-svn: 349760
* [InstCombine] Make x86 PADDS/PSUBS constant folding tests genericSimon Pilgrim2018-12-202-399/+411
| | | | | | | | As discussed on D55894, this replaces the existing PADDS/PSUBUS intrinsics with the the sadd/ssub.sat generic intrinsics and moves the tests out of the x86 subfolder. PR40110 has been raised to fix the regression with constant folding vectors containing undef elements. llvm-svn: 349759
* [clang-tidy] Use translationUnitDecl() instead of a custom matcher.Alexander Kornienko2018-12-202-18/+5
| | | | llvm-svn: 349758
* [gn build] Add build files for clang/lib/{Analysis,Edit,Sema}Nico Weber2018-12-205-0/+166
| | | | | | Differential Revision: https://reviews.llvm.org/D55913 llvm-svn: 349757
* [gn build] Add build files for clang/lib/Lex and clang/lib/ASTNico Weber2018-12-205-1/+218
| | | | | | Differential Revision: https://reviews.llvm.org/D55912 llvm-svn: 349756
* [Sema][NFC] Add test for static_assert diagnistics with constexpr template ↵Clement Courbet2018-12-201-0/+7
| | | | | | functions. llvm-svn: 349755
* [Driver] Fix accidentally reversed condition in r349752Michal Gorny2018-12-201-1/+1
| | | | llvm-svn: 349754
* [SystemZ] Improve testing of vecintrin.h intrinsicsUlrich Weigand2018-12-202-3/+1819
| | | | | | | | This adds assembly-level tests to verify that the high-level intrinsics generate the instructions they're supposed to. These tests would have caught the codegen bugs I just fixed. llvm-svn: 349753
* Replace getOS() == llvm::Triple::*BSD with isOS*BSD() [NFCI]Michal Gorny2018-12-2012-43/+43
| | | | | | | | | | | | Replace multiple comparisons of getOS() value with FreeBSD, NetBSD, OpenBSD and DragonFly with matching isOS*BSD() methods. This should improve the consistency of coding style without changing the behavior. Direct getOS() comparisons were left whenever used in switch or switch- like context. Differential Revision: https://reviews.llvm.org/D55916 llvm-svn: 349752
* [SystemZ] Fix wrong codegen caused by typos in vecintrin.hUlrich Weigand2018-12-202-8/+8
| | | | | | | | | | | | | | | The following two bugs in SystemZ high-level vector intrinsics are fixes by this patch: - The float case of vec_insert_and_zero should generate a VLLEZF pattern, but currently erroneously generates VLLEZLF. - The float and double versions of vec_orc erroneously generate and-with-complement instead of or-with-complement. The patch also fixes a couple of typos in the associated test. llvm-svn: 349751
* [clangd] Don't miss the expected type in merge.Haojian Wu2018-12-202-0/+4
| | | | | | | | | | Reviewers: ilya-biryukov Subscribers: ioeric, MaskRay, jkorous, arphaman, kadircet, cfe-commits Differential Revision: https://reviews.llvm.org/D55918 llvm-svn: 349750
* [SystemZ] Make better use of VLLEZUlrich Weigand2018-12-204-24/+78
| | | | | | | | | | | | | | | | This patch fixes two deficiencies in current code that recognizes the VLLEZ idiom: - For the floating-point versions, we have ISel patterns that match on a bitconvert as the top node. In more complex cases, that bitconvert may already have been merged into something else. Fix the patterns to match the inner nodes instead. - For the 64-bit integer versions, depending on the surrounding code, we may get either a DAG tree based on JOIN_DWORDS or one based on INSERT_VECTOR_ELT. Use a PatFrags to simply match both variants. llvm-svn: 349749
* [SystemZ] Make better use of VGEF/VGEGUlrich Weigand2018-12-202-1/+33
| | | | | | | | | Current code in SystemZDAGToDAGISel::tryGather refuses to perform any transformation if the Load SDNode has more than one use. This (erronously) counts uses of the chain result, which prevents the optimization in many cases unnecessarily. Fixed by this patch. llvm-svn: 349748
* Re-land r349731 "[CodeGen][ExpandMemcmp] Add an option for allowing ↵Clement Courbet2018-12-207-273/+655
| | | | | | | | overlapping loads. Update PPC ir following GEP->bitcat to bitcat->GEP->bitcat change. llvm-svn: 349747
* [SystemZ] Make better use of VLDEBUlrich Weigand2018-12-203-4/+65
| | | | | | | | | | | We already have special code (DAG combine support for FP_ROUND) to recognize cases where we an use a vector version of VLEDB to perform two floating-point truncates in parallel, but equivalent support for VLEDB (vector floating-point extends) has been missing so far. This patch adds corresponding DAG combine support for FP_EXTEND. llvm-svn: 349746
* Revert "[sanitizer] Support running without fd 0,1,2."Ilya Biryukov2018-12-208-76/+10
| | | | | | | | This reverts commit r349699. Reason: the commit breaks compilation of sanitizer_rtems.cc when building for RTEMS. llvm-svn: 349745
* [X86][SSE] Auto upgrade PADDS/PSUBS intrinsics to SADD_SAT/SSUB_SAT generic ↵Simon Pilgrim2018-12-205-30/+898
| | | | | | | | | | intrinsics (llvm) Pulled out of D55894 to match the clang changes in D55890. Differential Revision: https://reviews.llvm.org/D55890 llvm-svn: 349744
* [X86][SSE] Auto upgrade PADDS/PSUBS intrinsics to SADD_SAT/SSUB_SAT generic ↵Simon Pilgrim2018-12-205-42/+57
| | | | | | | | | | | | intrinsics (clang) This emits SADD_SAT/SSUB_SAT generic intrinsics for the SSE signed saturated math intrinsics. LLVM counterpart: https://reviews.llvm.org/D55894 Differential Revision: https://reviews.llvm.org/D55890 llvm-svn: 349743
* [X86] Update PADDSW/PSUBSW intrinsic usage with generic saturated intrinsics.Simon Pilgrim2018-12-201-11/+11
| | | | | | As discussed on D55894, this makes no difference to the actual test. llvm-svn: 349742
* [llvm-objcopy] Use ELFOSABI_NONE instead of 0. NFC.George Rimar2018-12-201-1/+1
| | | | | | | This was requested during the review of D55886. (sorry, forgot to address this) llvm-svn: 349741
* [asan] Revert still Androind incompatible tests enabled in r349736Vitaly Buka2018-12-202-0/+4
| | | | llvm-svn: 349740
* [X86] Change 'simple nonmem' intrinsic test to not use PADDSWSimon Pilgrim2018-12-201-5/+5
| | | | | | Those intrinsics will be autoupgraded soon to @llvm.sadd.sat generics (D55894), so to keep a x86-specific case I'm replacing it with @llvm.x86.sse2.pmulhu.w llvm-svn: 349739
* [llvm-objcopy] - Do not drop the OS/ABI and ABIVersion fields of ELF headerGeorge Rimar2018-12-203-2/+24
| | | | | | | | | | | This is https://bugs.llvm.org/show_bug.cgi?id=40005, Patch teaches llvm-objcopy to preserve OS/ABI and ABIVersion fields of ELF header. (Currently, it drops them to zero). Differential revision: https://reviews.llvm.org/D55886 llvm-svn: 349738
* [yaml2obj/obj2yaml] - Support dumping/parsing ABI version.George Rimar2018-12-205-1/+20
| | | | | | | | | | | These tools were assuming ABI version is 0, that is not always true. Patch teaches them to work with that field. Differential revision: https://reviews.llvm.org/D55884 llvm-svn: 349737
* [asan] Fix and re-enable few test on AndroidVitaly Buka2018-12-206-38/+23
| | | | llvm-svn: 349736
* [InstCombine][AMDGPU] Handle more buffer intrinsicsPiotr Sobczak2018-12-202-0/+964
| | | | | | | | | | | | | | | | | | | | | | | Summary: Include the following intrinsics in the InsctCombine simplification: * amdgcn_raw_buffer_load * amdgcn_raw_buffer_load_format * amdgcn_struct_buffer_load * amdgcn_struct_buffer_load_format Change-Id: I14deceff74bcb21179baf6aa6e94bf39e7d63d5d Reviewers: arsenm Reviewed By: arsenm Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, llvm-commits Differential Revision: https://reviews.llvm.org/D55882 llvm-svn: 349735
* [MSan] Don't emit __msan_instrument_asm_load() callsAlexander Potapenko2018-12-202-16/+4
| | | | | | | | | | | LLVM treats void* pointers passed to assembly routines as pointers to sized types. We used to emit calls to __msan_instrument_asm_load() for every such void*, which sometimes led to false positives. A less error-prone (and truly "conservative") approach is to unpoison only assembly output arguments. llvm-svn: 349734
* Revert r349731 "[CodeGen][ExpandMemcmp] Add an option for allowing ↵Clement Courbet2018-12-206-639/+265
| | | | | | | | overlapping loads." Forgot to update PowerPC tests for the GEP->bitcast change. llvm-svn: 349733
* [NFC] Fix trailing comma after function.Clement Courbet2018-12-201-1/+1
| | | | | | lib/Analysis/VectorUtils.cpp:482:2: warning: extra ‘;’ [-Wpedantic] llvm-svn: 349732
* [CodeGen][ExpandMemcmp] Add an option for allowing overlapping loads.Clement Courbet2018-12-206-265/+639
| | | | | | | | | | | | | | Summary: This allows expanding {7,11,13,14,15,21,22,23,25,26,27,28,29,30,31}-byte memcmp in just two loads on X86. These were previously calling memcmp. Reviewers: spatel, gchatelet Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D55263 llvm-svn: 349731
* [HWASAN] Add support for memory intrinsicsEugene Leviant2018-12-206-60/+172
| | | | | | | | | This is patch complements D55117 implementing __hwasan_mem* functions in runtime Differential revision: https://reviews.llvm.org/D55554 llvm-svn: 349730
* [Sema] Better static assert diagnostics for expressions involving ↵Clement Courbet2018-12-206-14/+92
| | | | | | | | | | | | | | | | | | temporaries/casts/.... Summary: Handles expressions such as: - `std::is_const<T>()` - `std::is_const<T>()()`; - `std::is_same(decltype(U()), V>::value`; Reviewers: aaron.ballman, Quuxplusone Subscribers: cfe-commits, llvm-commits Differential Revision: https://reviews.llvm.org/D55552 llvm-svn: 349729
* [HWASAN] Add support for memory intrinsicsEugene Leviant2018-12-202-0/+82
| | | | | | Differential revision: https://reviews.llvm.org/D55117 llvm-svn: 349728
* [PowerPC] Implement the isSelectSupported() target hookKang Zhang2018-12-202-12/+13
| | | | | | | | | | | | | | | | Summary: PowerPC has scalar selects (isel) and vector mask selects (xxsel). But PowerPC does not have vector CR selects, PowerPC does not support scalar condition selects on vectors. In addition to implementing this hook, isSelectSupported() should return false when the SelectSupportKind is ScalarCondVectorVal, so that predictable selects are converted into branch sequences. Reviewed By: steven.zhang, hfinkel Differential Revision: https://reviews.llvm.org/D55754 llvm-svn: 349727
* [DAGCombiner] Fix a place that was creating a SIGN_EXTEND with an extra operand.Craig Topper2018-12-201-1/+1
| | | | llvm-svn: 349726
* Introduce llvm.loop.parallel_accesses and llvm.access.group metadata.Michael Kruse2018-12-2040-244/+868
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current llvm.mem.parallel_loop_access metadata has a problem in that it uses LoopIDs. LoopID unfortunately is not loop identifier. It is neither unique (there's even a regression test assigning the some LoopID to multiple loops; can otherwise happen if passes such as LoopVersioning make copies of entire loops) nor persistent (every time a property is removed/added from a LoopID's MDNode, it will also receive a new LoopID; this happens e.g. when calling Loop::setLoopAlreadyUnrolled()). Since most loop transformation passes change the loop attributes (even if it just to mark that a loop should not be processed again as llvm.loop.isvectorized does, for the versioned and unversioned loop), the parallel access information is lost for any subsequent pass. This patch unlinks LoopIDs and parallel accesses. llvm.mem.parallel_loop_access metadata on instruction is replaced by llvm.access.group metadata. llvm.access.group points to a distinct MDNode with no operands (avoiding the problem to ever need to add/remove operands), called "access group". Alternatively, it can point to a list of access groups. The LoopID then has an attribute llvm.loop.parallel_accesses with all the access groups that are parallel (no dependencies carries by this loop). This intentionally avoid any kind of "ID". Loops that are clones/have their attributes modifies retain the llvm.loop.parallel_accesses attribute. Access instructions that a cloned point to the same access group. It is not necessary for each access to have it's own "ID" MDNode, but those memory access instructions with the same behavior can be grouped together. The behavior of llvm.mem.parallel_loop_access is not changed by this patch, but should be considered deprecated. Differential Revision: https://reviews.llvm.org/D52116 llvm-svn: 349725
* [WebAssembly] Emit a splat for v128 IMPLICIT_DEFThomas Lively2018-12-202-8/+12
| | | | | | | | | | | | | | Summary: This is a code size savings and is also important to get runnable code while engines do not support v128.const. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D55910 llvm-svn: 349724
* Fix build errors introduced by r349712 on aarch64 bots.Amara Emerson2018-12-202-7/+6
| | | | llvm-svn: 349723
* [lldbsuite] Un-xfail TestRedefinitionsInInlines on WindowsStella Stamenova2018-12-201-6/+4
| | | | llvm-svn: 349722
* [lldbsuite] Un-xfail TestDataFormatterSynthVal on WindowsStella Stamenova2018-12-201-3/+0
| | | | llvm-svn: 349721
* [WebAssembly] Gate unimplemented SIMD ops on flagThomas Lively2018-12-207-16/+39
| | | | | | | | | | | | | | | Summary: Gates v128.const, f32x4.sqrt, f32x4.div, i8x16.extract_lane_u, and i16x8.extract_lane_u on the --wasm-enable-unimplemented-simd flag, since these ops are not implemented yet in V8. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D55904 llvm-svn: 349720
* [lldbsuite] Un-xfail tests on Windows that are now passing (pt.5)Stella Stamenova2018-12-206-18/+5
| | | | | | This is a set of tests that were all marked as failing becuse of pr24764. The bug is not fixed (as in more of the tests that were marked this way are failing), but this set is passing. It is possible that some of them are false positives, but there's a large number of unexpectedly passing tests on Windows, so I am doing a bulk un-xfail to get the buildbot to green. llvm-svn: 349719
* [lldb] Retrieve currently handled Obj-C exception via ↵Kuba Mracek2018-12-2014-35/+355
| | | | | | | | | | | | __cxa_current_exception_type and add GetCurrentExceptionBacktrace SB ABI This builds on https://reviews.llvm.org/D43884 and https://reviews.llvm.org/D43886 and extends LLDB support of Obj-C exceptions to also look for a "current exception" for a thread in the C++ exception handling runtime metadata (via call to __cxa_current_exception_type). We also construct an actual historical SBThread/ThreadSP that contains frames from the backtrace in the Obj-C exception object. The high level goal this achieves is that when we're already crashed (because an unhandled exception occurred), we can still access the exception object and retrieve the backtrace from the throw point. In Obj-C, this is particularly useful because a catch+rethrow is very common and in those cases you currently don't have any access to the throw point backtrace. Differential Revision: https://reviews.llvm.org/D44072 llvm-svn: 349718
* Remove pointless casts.Evgeniy Stepanov2018-12-201-2/+2
| | | | llvm-svn: 349717
* AMDGPU: Make i1/i64/v2i32 and/or/xor legalMatt Arsenault2018-12-208-36/+354
| | | | | | | The 64-bit types do depend on the register bank, but that's another issue to deal with later. llvm-svn: 349716
* AMDGPU/GlobalISel: Fix ValueMapping tables for i1Matt Arsenault2018-12-203-28/+98
| | | | | | | This was incorrectly selecting SGPR for any i1 values, e.g. G_TRUNC to i1 from a VGPR was still an SGPR. llvm-svn: 349715
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