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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-12-20 10:54:59 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-12-20 10:54:59 +0000 |
| commit | 6199784c5a26750448fbb5656b9cdbf2322dc4a2 (patch) | |
| tree | 0a0a01add933dab03cce68bc4e6ea71dc459de93 | |
| parent | 4ded77334e152360ef23e62722e82cccc70493fb (diff) | |
| download | bcm5719-llvm-6199784c5a26750448fbb5656b9cdbf2322dc4a2.tar.gz bcm5719-llvm-6199784c5a26750448fbb5656b9cdbf2322dc4a2.zip | |
[X86] Change 'simple nonmem' intrinsic test to not use PADDSW
Those intrinsics will be autoupgraded soon to @llvm.sadd.sat generics (D55894), so to keep a x86-specific case I'm replacing it with @llvm.x86.sse2.pmulhu.w
llvm-svn: 349739
| -rw-r--r-- | llvm/test/Instrumentation/MemorySanitizer/msan_x86intrinsics.ll | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/llvm/test/Instrumentation/MemorySanitizer/msan_x86intrinsics.ll b/llvm/test/Instrumentation/MemorySanitizer/msan_x86intrinsics.ll index c4ec7fa2919..14aaec92388 100644 --- a/llvm/test/Instrumentation/MemorySanitizer/msan_x86intrinsics.ll +++ b/llvm/test/Instrumentation/MemorySanitizer/msan_x86intrinsics.ll @@ -46,14 +46,14 @@ declare <16 x i8> @llvm.x86.sse3.ldu.dq(i8* %p) nounwind ; Check that shadow is OR'ed, and origin is Select'ed ; And no shadow checks! -define <8 x i16> @Paddsw128(<8 x i16> %a, <8 x i16> %b) nounwind uwtable sanitize_memory { - %call = call <8 x i16> @llvm.x86.sse2.padds.w(<8 x i16> %a, <8 x i16> %b) +define <8 x i16> @Pmulhuw128(<8 x i16> %a, <8 x i16> %b) nounwind uwtable sanitize_memory { + %call = call <8 x i16> @llvm.x86.sse2.pmulhu.w(<8 x i16> %a, <8 x i16> %b) ret <8 x i16> %call } -declare <8 x i16> @llvm.x86.sse2.padds.w(<8 x i16> %a, <8 x i16> %b) nounwind +declare <8 x i16> @llvm.x86.sse2.pmulhu.w(<8 x i16> %a, <8 x i16> %b) nounwind -; CHECK-LABEL: @Paddsw128 +; CHECK-LABEL: @Pmulhuw128 ; CHECK-NEXT: load <8 x i16>, <8 x i16>* {{.*}} @__msan_param_tls ; CHECK-ORIGINS: load i32, i32* {{.*}} @__msan_param_origin_tls ; CHECK-NEXT: load <8 x i16>, <8 x i16>* {{.*}} @__msan_param_tls @@ -62,7 +62,7 @@ declare <8 x i16> @llvm.x86.sse2.padds.w(<8 x i16> %a, <8 x i16> %b) nounwind ; CHECK-ORIGINS: = bitcast <8 x i16> {{.*}} to i128 ; CHECK-ORIGINS-NEXT: = icmp ne i128 {{.*}}, 0 ; CHECK-ORIGINS-NEXT: = select i1 {{.*}}, i32 {{.*}}, i32 -; CHECK-NEXT: call <8 x i16> @llvm.x86.sse2.padds.w +; CHECK-NEXT: call <8 x i16> @llvm.x86.sse2.pmulhu.w ; CHECK-NEXT: store <8 x i16> {{.*}} @__msan_retval_tls ; CHECK-ORIGINS: store i32 {{.*}} @__msan_retval_origin_tls ; CHECK-NEXT: ret <8 x i16> |
