| Commit message (Collapse) | Author | Age | Files | Lines |
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The test is "passing" on windows, but it is a false positive. Skip it on Windows until it is fixed on all platforms.
llvm-svn: 349775
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Preserve llvm.access.group metadata when combining store instructions.
This was forgotten in r349725.
Fixes llvm.org/PR40117
llvm-svn: 349774
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llvm-svn: 349773
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Differential Revision: https://reviews.llvm.org/D54907
llvm-svn: 349772
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Fix a simple typo.
llvm-svn: 349771
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llvm-svn: 349770
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Ideally we'd figure out a way to run this test without any sleeps, this
workaround is only there to avoid annoying people with test failures
around the holiday period when everyone is on vacation.
llvm-svn: 349769
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Summary:
Add an LSP extension "textDocument/clangd.fileStatus" to emit file-status information.
Reviewers: ilya-biryukov
Subscribers: javed.absar, ioeric, MaskRay, jkorous, arphaman, kadircet, cfe-commits
Differential Revision: https://reviews.llvm.org/D55363
llvm-svn: 349768
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Differential Revision: https://reviews.llvm.org/D55841
llvm-svn: 349767
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Differential Revision: https://reviews.llvm.org/D55472
llvm-svn: 349766
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This patch enables funnel shift -> rotate building for all ROTL/ROTR custom/legal operations.
AFAICT X86 was the last target that was missing modulo support (PR38243), but I've tried to CC stakeholders for every target that has ROTL/ROTR custom handling for their final OK.
Differential Revision: https://reviews.llvm.org/D55747
llvm-svn: 349765
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This is a update to D43157 to correctly handle fixup_riscv_pcrel_lo12.
Notable changes:
Rebased onto trunk
Handle and test S-type
Test case pcrel-hilo.s is merged into relocations.s
D43157 description:
VK_RISCV_PCREL_LO has to be handled specially. The MCExpr inside is
actually the location of an auipc instruction with a VK_RISCV_PCREL_HI fixup
pointing to the real target.
Differential Revision: https://reviews.llvm.org/D54029
Patch by Chih-Mao Chen and Michael Spencer.
llvm-svn: 349764
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As discussed on D55747, the expansion to (wider) shifts is better on all AVX512 cases, not just BWI.
llvm-svn: 349763
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Reviewers: krytarowski
Reviewed By: krytarowski
Differential Revision: https://reviews.llvm.org/D55923
llvm-svn: 349762
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There are several vector instructions which may or may not set the
condition code register, depending on the value of an argument.
For codegen, we use two versions of the instruction, one that sets
CC and one that doesn't, which hard-code appropriate values of that
argument. But we also have a "generic" version of the instruction
that is used for the assembler/disassembler. These generic versions
should always be considered to clobber CC just to be safe.
llvm-svn: 349761
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llvm-svn: 349760
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As discussed on D55894, this replaces the existing PADDS/PSUBUS intrinsics with the the sadd/ssub.sat generic intrinsics and moves the tests out of the x86 subfolder.
PR40110 has been raised to fix the regression with constant folding vectors containing undef elements.
llvm-svn: 349759
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llvm-svn: 349758
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Differential Revision: https://reviews.llvm.org/D55913
llvm-svn: 349757
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Differential Revision: https://reviews.llvm.org/D55912
llvm-svn: 349756
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functions.
llvm-svn: 349755
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llvm-svn: 349754
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This adds assembly-level tests to verify that the high-level
intrinsics generate the instructions they're supposed to.
These tests would have caught the codegen bugs I just fixed.
llvm-svn: 349753
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Replace multiple comparisons of getOS() value with FreeBSD, NetBSD,
OpenBSD and DragonFly with matching isOS*BSD() methods. This should
improve the consistency of coding style without changing the behavior.
Direct getOS() comparisons were left whenever used in switch or switch-
like context.
Differential Revision: https://reviews.llvm.org/D55916
llvm-svn: 349752
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The following two bugs in SystemZ high-level vector intrinsics are
fixes by this patch:
- The float case of vec_insert_and_zero should generate a VLLEZF
pattern, but currently erroneously generates VLLEZLF.
- The float and double versions of vec_orc erroneously generate
and-with-complement instead of or-with-complement.
The patch also fixes a couple of typos in the associated test.
llvm-svn: 349751
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Reviewers: ilya-biryukov
Subscribers: ioeric, MaskRay, jkorous, arphaman, kadircet, cfe-commits
Differential Revision: https://reviews.llvm.org/D55918
llvm-svn: 349750
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This patch fixes two deficiencies in current code that recognizes
the VLLEZ idiom:
- For the floating-point versions, we have ISel patterns that match
on a bitconvert as the top node. In more complex cases, that
bitconvert may already have been merged into something else.
Fix the patterns to match the inner nodes instead.
- For the 64-bit integer versions, depending on the surrounding code,
we may get either a DAG tree based on JOIN_DWORDS or one based on
INSERT_VECTOR_ELT. Use a PatFrags to simply match both variants.
llvm-svn: 349749
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Current code in SystemZDAGToDAGISel::tryGather refuses to perform
any transformation if the Load SDNode has more than one use. This
(erronously) counts uses of the chain result, which prevents the
optimization in many cases unnecessarily. Fixed by this patch.
llvm-svn: 349748
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overlapping loads.
Update PPC ir following GEP->bitcat to bitcat->GEP->bitcat change.
llvm-svn: 349747
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We already have special code (DAG combine support for FP_ROUND)
to recognize cases where we an use a vector version of VLEDB to
perform two floating-point truncates in parallel, but equivalent
support for VLEDB (vector floating-point extends) has been
missing so far. This patch adds corresponding DAG combine
support for FP_EXTEND.
llvm-svn: 349746
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This reverts commit r349699.
Reason: the commit breaks compilation of sanitizer_rtems.cc when
building for RTEMS.
llvm-svn: 349745
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intrinsics (llvm)
Pulled out of D55894 to match the clang changes in D55890.
Differential Revision: https://reviews.llvm.org/D55890
llvm-svn: 349744
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intrinsics (clang)
This emits SADD_SAT/SSUB_SAT generic intrinsics for the SSE signed saturated math intrinsics.
LLVM counterpart: https://reviews.llvm.org/D55894
Differential Revision: https://reviews.llvm.org/D55890
llvm-svn: 349743
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As discussed on D55894, this makes no difference to the actual test.
llvm-svn: 349742
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This was requested during the review of D55886.
(sorry, forgot to address this)
llvm-svn: 349741
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llvm-svn: 349740
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Those intrinsics will be autoupgraded soon to @llvm.sadd.sat generics (D55894), so to keep a x86-specific case I'm replacing it with @llvm.x86.sse2.pmulhu.w
llvm-svn: 349739
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This is https://bugs.llvm.org/show_bug.cgi?id=40005,
Patch teaches llvm-objcopy to preserve OS/ABI and ABIVersion fields of ELF header.
(Currently, it drops them to zero).
Differential revision: https://reviews.llvm.org/D55886
llvm-svn: 349738
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These tools were assuming ABI version is 0,
that is not always true.
Patch teaches them to work with that field.
Differential revision: https://reviews.llvm.org/D55884
llvm-svn: 349737
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llvm-svn: 349736
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Summary:
Include the following intrinsics in the InsctCombine
simplification:
* amdgcn_raw_buffer_load
* amdgcn_raw_buffer_load_format
* amdgcn_struct_buffer_load
* amdgcn_struct_buffer_load_format
Change-Id: I14deceff74bcb21179baf6aa6e94bf39e7d63d5d
Reviewers: arsenm
Reviewed By: arsenm
Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D55882
llvm-svn: 349735
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LLVM treats void* pointers passed to assembly routines as pointers to
sized types.
We used to emit calls to __msan_instrument_asm_load() for every such
void*, which sometimes led to false positives.
A less error-prone (and truly "conservative") approach is to unpoison
only assembly output arguments.
llvm-svn: 349734
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overlapping loads."
Forgot to update PowerPC tests for the GEP->bitcast change.
llvm-svn: 349733
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lib/Analysis/VectorUtils.cpp:482:2: warning: extra ‘;’ [-Wpedantic]
llvm-svn: 349732
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Summary:
This allows expanding {7,11,13,14,15,21,22,23,25,26,27,28,29,30,31}-byte memcmp
in just two loads on X86. These were previously calling memcmp.
Reviewers: spatel, gchatelet
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D55263
llvm-svn: 349731
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This is patch complements D55117 implementing __hwasan_mem*
functions in runtime
Differential revision: https://reviews.llvm.org/D55554
llvm-svn: 349730
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temporaries/casts/....
Summary:
Handles expressions such as:
- `std::is_const<T>()`
- `std::is_const<T>()()`;
- `std::is_same(decltype(U()), V>::value`;
Reviewers: aaron.ballman, Quuxplusone
Subscribers: cfe-commits, llvm-commits
Differential Revision: https://reviews.llvm.org/D55552
llvm-svn: 349729
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Differential revision: https://reviews.llvm.org/D55117
llvm-svn: 349728
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Summary:
PowerPC has scalar selects (isel) and vector mask selects (xxsel). But PowerPC
does not have vector CR selects, PowerPC does not support scalar condition
selects on vectors.
In addition to implementing this hook, isSelectSupported() should return false
when the SelectSupportKind is ScalarCondVectorVal, so that predictable selects
are converted into branch sequences.
Reviewed By: steven.zhang, hfinkel
Differential Revision: https://reviews.llvm.org/D55754
llvm-svn: 349727
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llvm-svn: 349726
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