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* Revert "Reland 3: [analyzer] NFC: Update test infrastructure to support ↵Dominic Chen2017-03-02408-634/+755
| | | | | | | | multiple constraint managers" This reverts commit ea36f1406e1f36bf456c3f3929839b024128e468. llvm-svn: 296841
* Work around test failure on 32 bit OS XEric Fiselier2017-03-021-6/+13
| | | | llvm-svn: 296840
* ThinLTOBitcodeWriter: Do not follow operand edges of type GlobalValue when ↵Peter Collingbourne2017-03-022-0/+11
| | | | | | | | | | | | looking for virtual functions. Such edges may otherwise result in infinite recursion if a pointer to a vtable is reachable from the vtable itself. This can happen in practice if a TU defines the ABI types used to implement RTTI, and is itself compiled with RTTI. Fixes PR32121. llvm-svn: 296839
* Move defClobbersUseOrDef to being a protected member of a class since we ↵Daniel Berlin2017-03-023-8/+16
| | | | | | don't want anyone else using it llvm-svn: 296838
* Reland 3: [analyzer] NFC: Update test infrastructure to support multiple ↵Dominic Chen2017-03-02408-755/+634
| | | | | | | | | | | | | | constraint managers Summary: Replace calls to %clang/%clang_cc1 with %clang_analyze_cc1 when invoking static analyzer, and perform runtime substitution to select the appropriate constraint manager, per D28952. Reviewers: xazax.hun, NoQ, zaks.anna, dcoughlin Subscribers: mgorny, rgov, mikhail.ramalho, a.sidorin, cfe-commits Differential Revision: https://reviews.llvm.org/D30373 llvm-svn: 296837
* Revert "Reland 2: [analyzer] NFC: Update test infrastructure to support ↵Dominic Chen2017-03-02408-634/+755
| | | | | | | | multiple constraint managers" This reverts commit f93343c099fff646a2314cc7f4925833708298b1. llvm-svn: 296836
* Reland 2: [analyzer] NFC: Update test infrastructure to support multiple ↵Dominic Chen2017-03-02408-755/+634
| | | | | | | | | | | | | | constraint managers Summary: Replace calls to %clang/%clang_cc1 with %clang_analyze_cc1 when invoking static analyzer, and perform runtime substitution to select the appropriate constraint manager, per D28952. Reviewers: xazax.hun, NoQ, zaks.anna, dcoughlin Subscribers: mgorny, rgov, mikhail.ramalho, a.sidorin, cfe-commits Differential Revision: https://reviews.llvm.org/D30373 llvm-svn: 296835
* Python commands as first class citizens.Jim Ingham2017-03-021-1/+19
| | | | | | | This should be a necessary precursor to adding support for any future extension languages. llvm-svn: 296834
* Mention fetching thread lists lazily.Jim Ingham2017-03-021-0/+18
| | | | llvm-svn: 296833
* [BypassSlowDivision] Use ValueTracking to simplify run-time checksNikolai Bozhenov2017-03-022-29/+203
| | | | | | | | | | | | | | | | | | | | | | | | ValueTracking is used for more thorough analysis of operands. Based on the analysis, either run-time checks can be simplified (e.g. check only one operand instead of two) or the transformation can be avoided. For example, it is quite often the case that a divisor is promoted from a shorter type and run-time checks for it are redundant. With additional compile-time analysis of values, two special cases naturally arise and are addressed by the patch: 1) Both operands are known to be short enough. Then, the long division can be simply replaced with a short one without CFG modification. 2) If a division is unsigned and the dividend is known to be short then the long division is not needed at all. Because if the divisor is too big for short division then the quotient is obviously zero (and the remainder is equal to the dividend). Actually, the division is not needed when (divisor > dividend). Differential Revision: https://reviews.llvm.org/D29897 llvm-svn: 296832
* remove max_size() extension from polymorphic_allocator. It is unneededEric Fiselier2017-03-022-71/+6
| | | | llvm-svn: 296831
* Fix libc++ test experimental/algorithms/alg.random.sample/sample.pass.cpp ↵Mehdi Amini2017-03-021-5/+9
| | | | | | when ran in c++11 mode 32 bits llvm-svn: 296830
* CMake: Clean up VersionFromVCS.cmakeTom Stellard2017-03-021-33/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Fix a few problems in VersionFromVCS.cmake to make it more reliable: - Stop using git svn info to retrieve the svn revision. I am unable to determine what the svn revision returned by this command means. During my testing this command returned a revision from a month ago which was not the HEAD of any of my local branches. Also, this revision was never actually added to the version string due to a typo in the script. All it was used for was to reject the revision number returned by git svn find-rev HEAD when the revision numbers didn't match. - Populate GIT_COMMIT even when we detect a git repo without any svn information. Reviewers: mehdi_amini, beanz Reviewed By: beanz Subscribers: mgorny, llvm-commits Differential Revision: https://reviews.llvm.org/D30092 llvm-svn: 296829
* [BypassSlowDivision] Refactor fast division insertion logic (NFC)Nikolai Bozhenov2017-03-021-160/+218
| | | | | | | | | | The most important goal of the patch is to break large insertFastDiv function into separate pieces, so that later a different fast insertion logic can be implemented using some of these pieces. Differential Revision: https://reviews.llvm.org/D29896 llvm-svn: 296828
* Forgot about local variable lookup. Jim Ingham2017-03-021-0/+18
| | | | | | Yay for coffee lines. llvm-svn: 296826
* [DAGCombiner] Fix DebugLoc propagation when folding !(x cc y) -> (x !cc y)Taewook Oh2017-03-026-24/+93
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Currently, when 't1: i1 = setcc t2, t3, cc' followed by 't4: i1 = xor t1, Constant:i1<-1>' is folded into 't5: i1 = setcc t2, t3 !cc', SDLoc of newly created SDValue 't5' follows SDLoc of 't4', not 't1'. However, as the opcode of newly created SDValue is 'setcc', it make more sense to take DebugLoc from 't1' than 't4'. For the code below ``` extern int bar(); extern int baz(); int foo(int x, int y) { if (x != y) return bar(); else return baz(); } ``` , following is the bitcode representation of 'foo' at the end of llvm-ir level optimization: ``` define i32 @foo(i32 %x, i32 %y) !dbg !4 { entry: tail call void @llvm.dbg.value(metadata i32 %x, i64 0, metadata !9, metadata !11), !dbg !12 tail call void @llvm.dbg.value(metadata i32 %y, i64 0, metadata !10, metadata !11), !dbg !13 %cmp = icmp ne i32 %x, %y, !dbg !14 br i1 %cmp, label %if.then, label %if.else, !dbg !16 if.then: ; preds = %entry %call = tail call i32 (...) @bar() #3, !dbg !17 br label %return, !dbg !18 if.else: ; preds = %entry %call1 = tail call i32 (...) @baz() #3, !dbg !19 br label %return, !dbg !20 return: ; preds = %if.else, %if.then %retval.0 = phi i32 [ %call, %if.then ], [ %call1, %if.else ] ret i32 %retval.0, !dbg !21 } !14 = !DILocation(line: 5, column: 9, scope: !15) !16 = !DILocation(line: 5, column: 7, scope: !4) ``` As you can see, in 'entry' block, 'icmp' instruction and 'br' instruction have different debug locations. However, with current implementation, there's no distinction between debug locations of these two when they are lowered to asm instructions. This is because 'icmp' and 'br' become 'setcc' 'xor' and 'brcond' in SelectionDAG, where SDLoc of 'setcc' follows the debug location of 'icmp' but SDLOC of 'xor' and 'brcond' follows the debug location of 'br' instruction, and SDLoc of 'xor' overwrites SDLoc of 'setcc' when they are folded. This patch addresses this issue. Reviewers: atrick, bogner, andreadb, craig.topper, aprantl Reviewed By: andreadb Subscribers: jlebar, mkuper, jholewinski, andreadb, llvm-commits Differential Revision: https://reviews.llvm.org/D29813 llvm-svn: 296825
* [DAG] early exit to improve readability and formatting of visitMemCmpCall(); ↵Sanjay Patel2017-03-021-64/+53
| | | | | | NFCI llvm-svn: 296824
* Work around GCC linking errors within libc++abi due to missing new/delete ↵Eric Fiselier2017-03-021-1/+5
| | | | | | definitions llvm-svn: 296823
* Work around GCC linking errors within libc++abi due to missing new/delete ↵Eric Fiselier2017-03-021-1/+6
| | | | | | definitions llvm-svn: 296822
* [Hexagon] Pick the right branch opcode depending on branch probabilitiesKrzysztof Parzyszek2017-03-022-15/+113
| | | | | | | Specifically, pick the opcode with the correct branch prediction, i.e. jump:t or jump:nt. llvm-svn: 296821
* Revert "AMDGPU: Re-do update for branch-relaxation test"Tobias Grosser2017-03-021-9/+6
| | | | | | | | This commit also relied on r296812, which I just reverted. We should probably apply it again, after the r296812 has been discussed and been reapplied in some variant. llvm-svn: 296820
* Add a reference to the projects in the Get involved section.Jim Ingham2017-03-021-0/+2
| | | | llvm-svn: 296819
* CodeGen: MachineBlockPlacement: Remove the unused outlining heuristic.Kyle Butt2017-03-022-175/+1
| | | | | | | Outlining optional branches isn't a good heuristic, and it's never been on by default. Remove it to clean things up. llvm-svn: 296818
* Revert "Currently broken by recent LLVM upstream changes"Tobias Grosser2017-03-021-2/+0
| | | | | | | This reverts commit r296579, which is not needed anymore as the relevant changes in trunk have been reverted. llvm-svn: 296817
* Goals->Projects.Jim Ingham2017-03-021-1/+1
| | | | llvm-svn: 296816
* [ARM] Fix insert point for store rescheduling.Eli Friedman2017-03-023-25/+76
| | | | | | | | | | | | | | | | In ARMPreAllocLoadStoreOpt::RescheduleOps, LastOp should be the last operation which we want to merge. If we break out of the loop because an operation has the wrong offset, we shouldn't use that operation as LastOp. This patch fixes some cases where we would move stores to the wrong insert point. Re-commit with a fix to increment NumMove in the right place. Differential Revision: https://reviews.llvm.org/D30124 llvm-svn: 296815
* Added a list of outstanding projects that would benefit lldb.Jim Ingham2017-03-022-0/+380
| | | | | | | | | | | | | This was a list that I've had kicking around for a while, and would add to whenever some hallway conversation would bring up another good idea. It's not doing any good on my desktop, but it might generate some inspiration here. Please add to this if you have any other good ideas. I apologize for the formatting, but if I wait to get it looking nice it would probably stay on my desktop. llvm-svn: 296814
* Fix test failures caused by new/delete calls getting optimized awayEric Fiselier2017-03-025-5/+13
| | | | llvm-svn: 296813
* Revert "Fix PR 24415 (at least), by making our post-dominator tree behavior ↵Tobias Grosser2017-03-0216-196/+105
| | | | | | | | | | | | | | | sane." and also "clang-format GenericDomTreeConstruction.h, since the current formatting makes it look like their is a bug in the loop indentation, and there is not" This reverts commit r296535. There are still some open design questions which I would like to discuss. I revert this for Daniel (who gave the OK), as he is on vacation. llvm-svn: 296812
* [PPC] Fix code generation for bswap(int32) followed by store16Guozhi Wei2017-03-022-2/+26
| | | | | | | | | | | | | | | | | | | This patch fixes pr32063. Current code in PPCTargetLowering::PerformDAGCombine can transform bswap store into a single PPCISD::STBRX instruction. but it doesn't consider the case that the operand size of bswap may be larger than store size. When it occurs, we need 2 modifications, 1 For the last operand of PPCISD::STBRX, we should not use DAG.getValueType(N->getOperand(1).getValueType()), instead we should use cast<StoreSDNode>(N)->getMemoryVT(). 2 Before PPCISD::STBRX, we need to shift the original operand of bswap to the right side. Differential Revision: https://reviews.llvm.org/D30362 llvm-svn: 296811
* [Support] Move Stream library from MSF -> Support.Zachary Turner2017-03-0278-161/+162
| | | | | | | | | | After several smaller patches to get most of the core improvements finished up, this patch is a straight move and header fixup of the source. Differential Revision: https://reviews.llvm.org/D30266 llvm-svn: 296810
* [AArch64] Extend redundant copy elimination pass to handle non-zero stores.Chad Rosier2017-03-022-77/+455
| | | | | | | | | | | | | | | This patch extends the current functionality of the AArch64 redundant copy elimination pass to handle non-zero cases such as: BB#0: cmp x0, #1 b.eq .LBB0_1 .LBB0_1: orr x0, xzr, #0x1 ; <-- redundant copy; x0 known to hold #1. Differential Revision: https://reviews.llvm.org/D29344 llvm-svn: 296809
* [DAG] improve documentation comments; NFCSanjay Patel2017-03-022-90/+48
| | | | llvm-svn: 296808
* [MSP430] Add SRet support to MSP430 targetVadzim Dambrouski2017-03-0226-172/+277
| | | | | | | | | | | | | This patch adds support for struct return values to the MSP430 target backend. It also reverses the order of argument and return registers in the calling convention to bring it into closer alignment with the published EABI from TI. Patch by Andrew Wygle (awygle). Differential Revision: https://reviews.llvm.org/D29069 llvm-svn: 296807
* Promote ConstantInitBuilder to be a public CodeGen API; it'sJohn McCall2017-03-0212-107/+159
| | | | | | a generally useful utility for other frontends. NFC. llvm-svn: 296806
* Update ABI list for 4.0 releaseEric Fiselier2017-03-022-1905/+1906
| | | | llvm-svn: 296805
* The patch fixes r296770Evgeny Stupachenko2017-03-021-2/+2
| | | | | | | | | | Summary: Extend -unroll-partial-threshold to 200 for runtime-loop3.ll test as epilogue unroll initially add 1 more IV to the loop. From: Evgeny Stupachenko <evstupac@gmail.com> llvm-svn: 296803
* [libc++] Add option to disable new/delete overloads when libc++abi provides ↵Eric Fiselier2017-03-022-2/+17
| | | | | | | | | | | | | | | | | | | | | them. Summary: Currently both libc++ and libc++abi provide definitions for operator new/delete. However I believe this is incorrect and that one or the other should offer them. This patch adds the CMake option `-DLIBCXX_ENABLE_NEW_DELETE_DEFINITIONS` which defaults no `ON` unless `-DLIBCXXABI_ENABLE_NEW_DELETE_DEFINITIONS=ON` is specified. Reviewers: mclow.lists, mehdi_amini, dexonsmith, danalbert, smeenai, mgorny, rmaprath Reviewed By: mehdi_amini Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D30516 llvm-svn: 296802
* [libc++abi] Add option to enable definitions for the new/delete overloads.Eric Fiselier2017-03-022-5/+10
| | | | | | | | | | | | | | | | | | | | Summary: Currently both libc++ and libc++abi provide definitions for operator new/delete. However I believe this is incorrect and that one or the other should offer them. This patch adds the CMake option `-DLIBCXXABI_ENABLE_NEW_DELETE_DEFINITIONS` which defaults to `OFF` unless otherwise specified. This means that by default only libc++ provides the new/delete definitions. Reviewers: mclow.lists, mehdi_amini, dexonsmith, beanz, jroelofs, danalbert, smeenai, rmaprath, mgorny Reviewed By: mehdi_amini Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D30517 llvm-svn: 296801
* Pass a callback to resolveReloc. NFC.Rafael Espindola2017-03-021-13/+15
| | | | | | | This is consistent with rest of the file and opens the way for a relocation keeping multiple sections alive. llvm-svn: 296788
* [libc++abi] Update new/delete definitions to match libc++Eric Fiselier2017-03-021-71/+157
| | | | | | | | | | | | | | | | | | | | | Summary: Currently both libc++ and libc++abi provide definitions for new/delete. However libc++abi's definitions haven't been updated to include aligned new/delete or sized deallocation. I don't see any reason why libc++abi shouldn't provide these newer overloads. This patch copies libc++'s implementation of `new/delete` into libc++abi so that it's now up to date. After applying this patch I plan to fix a longstanding bug where both libc++ and libc++abi provide definitions for new/delete. Reviewers: mclow.lists, mehdi_amini, dexonsmith, danalbert, smeenai, rmaprath, jroelofs Reviewed By: mehdi_amini Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D30514 llvm-svn: 296787
* Simplify test by producing an executable.Rafael Espindola2017-03-021-11/+5
| | | | llvm-svn: 296786
* [NVPTX] Reduce amount of boilerplate code used to select load instruction ↵Artem Belevich2017-03-021-1781/+587
| | | | | | | | | | | | | | opcode. Make opcode selection code for the load instruction a bit easier to read and maintain. This patch also catches number of f16 load/store variants that were not handled before. Differential Revision: https://reviews.llvm.org/D30513 llvm-svn: 296785
* [NVPTX] Added missing LDU/LDG intrinsics for f16.Artem Belevich2017-03-022-2/+19
| | | | | | Differential Revision: https://reviews.llvm.org/D30512 llvm-svn: 296784
* Fix some Wdocumentation warningsSimon Pilgrim2017-03-021-2/+2
| | | | llvm-svn: 296783
* [X86][MMX] Fixed i32 extraction on 32-bit targetsSimon Pilgrim2017-03-022-21/+16
| | | | | | MMX extraction often ends up as extract_i32(bitcast_v2i32(extract_i64(bitcast_v1i64(x86mmx v), 0)), 0) which fails to simplify on 32-bit targets as i64 isn't legal llvm-svn: 296782
* Add coding and shebang.Vassil Vassilev2017-03-022-0/+6
| | | | | | Reviewed by Artem Dergachev (D26030)! llvm-svn: 296781
* Mark function as llvm dump method.Vassil Vassilev2017-03-021-7/+1
| | | | llvm-svn: 296779
* Cast to the right type on Windows.Vassil Vassilev2017-03-021-1/+1
| | | | llvm-svn: 296778
* [Hexagon] Skip blocks that define vector predicate registers in early-ifKrzysztof Parzyszek2017-03-022-2/+45
| | | | llvm-svn: 296777
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